source: rtems/c/src/lib/libbsp/i386/shared/irq/irq_asm.h @ 93fb8797

Last change on this file since 93fb8797 was 93fb8797, checked in by Chris Johns <chrisj@…>, on May 6, 2016 at 7:55:29 AM

i386/pc386: Fix interrupt support.

Fix the interrupt and stop the spurious interrupt from happening.

The fix moves the EOI to C code and cleans that functionality out
of the asm part of the ISR handler.

The code checks the ISR and IRR registers on the enable.

Only ack the master for a slave IRQ if the slave has no other pending
requests.

  • Property mode set to 100644
File size: 1.6 KB
Line 
1/**
2 * @file
3 * @ingroup i386_irq
4 * @brief
5 */
6
7/* irq_asm.h
8 *
9 *  This include file has defines to represent some contant used
10 *  to program and manage the  Intel 8259 interrupt controller
11 *
12 *
13 *  COPYRIGHT (c) 1998 valette@crf.canon.fr
14 *
15 *  Copyright (c) 2016 Chris Johns <chrisj@rtems.org>
16 *
17 *  The license and distribution terms for this file may be
18 *  found in the file LICENSE in this distribution or at
19 *  http://www.rtems.org/license/LICENSE.
20 */
21#ifndef __I8259S_H__
22#define __I8259S_H__
23
24#define BSP_ASM_IRQ_VECTOR_BASE 0x20
25    /** @brief PIC's command and mask registers */
26#define PIC_MASTER_COMMAND_IO_PORT              0x20    ///< Master PIC command register
27#define PIC_SLAVE_COMMAND_IO_PORT               0xa0    ///< Slave PIC command register
28#define PIC_MASTER_IMR_IO_PORT                  0x21    ///< Master PIC Interrupt Mask Register
29#define PIC_SLAVE_IMR_IO_PORT                   0xa1    ///< Slave PIC Interrupt Mask Register
30
31    /** @brief Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
32#define PIC_EOSI        0x60    ///< End of Specific Interrupt (EOSI)
33#define PIC_EOI         0x20    ///< Generic End of Interrupt (EOI)
34
35/* Operation control word type 3.  Bit 3 (0x08) must be set. Even address. */
36#define PIC_OCW3_RIS        0x01            /* 1 = read IS, 0 = read IR */
37#define PIC_OCW3_RR         0x02            /* register read */
38#define PIC_OCW3_P          0x04            /* poll mode command */
39/* 0x08 must be 1 to select OCW3 vs OCW2 */
40#define PIC_OCW3_SEL        0x08            /* must be 1 */
41/* 0x10 must be 0 to select OCW3 vs ICW1 */
42#define PIC_OCW3_SMM        0x20            /* special mode mask */
43#define PIC_OCW3_ESMM       0x40            /* enable SMM */
44
45#endif
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