source: rtems/c/src/lib/libbsp/i386/shared/irq/irq.c @ 3bc12a8f

Last change on this file since 3bc12a8f was 3bc12a8f, checked in by Sebastian Huber <sebastian.huber@…>, on Jan 26, 2016 at 10:16:56 AM

Delete unused API extensions

  • Property mode set to 100644
File size: 6.2 KB
Line 
1/*
2 *  This file contains the implementation of the function described in irq.h
3 */
4
5/*
6 *  Copyright (c) 2009 embedded brains GmbH
7 *  Copyright (C) 1998 valette@crf.canon.fr
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.org/license/LICENSE.
12 */
13
14#include <bsp.h>
15#include <bsp/irq.h>
16#include <bsp/irq-generic.h>
17
18#include <stdlib.h>
19#include <stdio.h>
20#include <inttypes.h>
21
22/*
23 * pointer to the mask representing the additionnal irq vectors
24 * that must be disabled when a particular entry is activated.
25 * They will be dynamically computed from teh prioruty table given
26 * in BSP_rtems_irq_mngt_set();
27 * CAUTION : this table is accessed directly by interrupt routine
28 *           prologue.
29 */
30rtems_i8259_masks       irq_mask_or_tbl[BSP_IRQ_LINES_NUMBER];
31
32uint32_t            irq_count[BSP_IRQ_LINES_NUMBER] = {0};
33
34uint32_t
35BSP_irq_count_dump(FILE *f)
36{
37uint32_t tot = 0;
38int      i;
39        if ( !f )
40                f = stdout;
41        for ( i=0; i<BSP_IRQ_LINES_NUMBER; i++ ) {
42                tot += irq_count[i];
43                fprintf(f,"IRQ %2u: %9"PRIu32"\n", i, irq_count[i]);
44        }
45        return tot;
46}
47
48/*-------------------------------------------------------------------------+
49| Cache for 1st and 2nd PIC IRQ line's status (enabled or disabled) register.
50+--------------------------------------------------------------------------*/
51/*
52 * lower byte is interrupt mask on the master PIC.
53 * while upper bits are interrupt on the slave PIC.
54 * This cache is initialized in ldseg.s
55 */
56rtems_i8259_masks i8259s_cache = 0xFFFB;
57rtems_i8259_masks i8259s_super_imr = 0xFFFB;
58
59/*-------------------------------------------------------------------------+
60|         Function:  BSP_irq_disable_at_i8259s
61|      Description: Mask IRQ line in appropriate PIC chip.
62| Global Variables: i8259s_cache
63|        Arguments: vector_offset - number of IRQ line to mask.
64|          Returns: Nothing.
65+--------------------------------------------------------------------------*/
66int BSP_irq_disable_at_i8259s    (const rtems_irq_number irqLine)
67{
68  unsigned short        mask;
69  rtems_interrupt_level level;
70
71  if ( ((int)irqLine < BSP_LOWEST_OFFSET) ||
72       ((int)irqLine > BSP_MAX_ON_i8259S )
73       )
74    return 1;
75
76  rtems_interrupt_disable(level);
77
78  mask = 1 << irqLine;
79  i8259s_cache |= mask;
80  i8259s_super_imr |= mask;
81
82  if (irqLine < 8)
83  {
84    outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff);
85  }
86  else
87  {
88    outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8));
89  }
90  rtems_interrupt_enable(level);
91
92  return 0;
93}
94
95/*-------------------------------------------------------------------------+
96|         Function:  BSP_irq_enable_at_i8259s
97|      Description: Unmask IRQ line in appropriate PIC chip.
98| Global Variables: i8259s_cache
99|        Arguments: irqLine - number of IRQ line to mask.
100|          Returns: Nothing.
101+--------------------------------------------------------------------------*/
102int BSP_irq_enable_at_i8259s    (const rtems_irq_number irqLine)
103{
104  unsigned short        mask;
105  rtems_interrupt_level level;
106
107  if ( ((int)irqLine < BSP_LOWEST_OFFSET) ||
108       ((int)irqLine > BSP_MAX_ON_i8259S )
109       )
110    return 1;
111
112  rtems_interrupt_disable(level);
113
114  mask = ~(1 << irqLine);
115  i8259s_cache &= mask;
116  i8259s_super_imr &= mask;
117
118  if (irqLine < 8)
119  {
120    outport_byte(PIC_MASTER_IMR_IO_PORT, i8259s_cache & 0xff);
121  }
122  else
123  {
124    outport_byte(PIC_SLAVE_IMR_IO_PORT, ((i8259s_cache & 0xff00) >> 8));
125  }
126  rtems_interrupt_enable(level);
127
128  return 0;
129} /* mask_irq */
130
131int BSP_irq_enabled_at_i8259s           (const rtems_irq_number irqLine)
132{
133  unsigned short mask;
134
135  if ( ((int)irqLine < BSP_LOWEST_OFFSET) ||
136       ((int)irqLine > BSP_MAX_ON_i8259S )
137     )
138    return 1;
139
140  mask = (1 << irqLine);
141  return  (~(i8259s_cache & mask));
142}
143
144/*-------------------------------------------------------------------------+
145|         Function: BSP_irq_ack_at_i8259s
146|      Description: Signal generic End Of Interrupt (EOI) to appropriate PIC.
147| Global Variables: None.
148|        Arguments: irqLine - number of IRQ line to acknowledge.
149|          Returns: Nothing.
150+--------------------------------------------------------------------------*/
151int BSP_irq_ack_at_i8259s       (const rtems_irq_number irqLine)
152{
153  if ( ((int)irqLine < BSP_LOWEST_OFFSET) ||
154       ((int)irqLine > BSP_MAX_ON_i8259S )
155       )
156    return 1;
157
158  if (irqLine >= 8) {
159   outport_byte(PIC_SLAVE_COMMAND_IO_PORT, PIC_EOI);
160  }
161  outport_byte(PIC_MASTER_COMMAND_IO_PORT, PIC_EOI);
162
163  return 0;
164
165} /* ackIRQ */
166
167/*
168 * ------------------------ RTEMS Irq helper functions ----------------
169 */
170
171static rtems_irq_prio irqPrioTable[BSP_IRQ_LINES_NUMBER]={
172  /*
173   * actual priorities for each interrupt source:
174   *    0   means that only current interrupt is masked
175   *    255 means all other interrupts are masked
176   * The second entry has a priority of 255 because
177   * it is the slave pic entry and is should always remain
178   * unmasked.
179   */
180  0,0,
181  255,
182  0, 0, 0, 0,  0,  0,  0,  0,  0,  0,  0,  0,  0
183};
184
185static void compute_i8259_masks_from_prio (void)
186{
187  rtems_interrupt_level level;
188  unsigned int i;
189  unsigned int j;
190
191  rtems_interrupt_disable(level);
192
193  /*
194   * Always mask at least current interrupt to prevent re-entrance
195   */
196  for (i=0; i < BSP_IRQ_LINES_NUMBER; i++) {
197    * ((unsigned short*) &irq_mask_or_tbl[i]) = (1 << i);
198    for (j = 0; j < BSP_IRQ_LINES_NUMBER; j++) {
199      /*
200       * Mask interrupts at i8259 level that have a lower priority
201       */
202      if (irqPrioTable [i] > irqPrioTable [j]) {
203        * ((unsigned short*) &irq_mask_or_tbl[i]) |= (1 << j);
204      }
205    }
206  }
207
208  rtems_interrupt_enable(level);
209}
210
211rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
212{
213  BSP_irq_enable_at_i8259s(vector);
214
215  return RTEMS_SUCCESSFUL;
216}
217
218rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
219{
220  BSP_irq_disable_at_i8259s(vector);
221
222  return RTEMS_SUCCESSFUL;
223}
224
225rtems_status_code bsp_interrupt_facility_initialize(void)
226{
227  /*
228   * set up internal tables used by rtems interrupt prologue
229   */
230  compute_i8259_masks_from_prio();
231
232  /*
233   * must enable slave pic anyway
234   */
235  BSP_irq_enable_at_i8259s(2);
236
237  return RTEMS_SUCCESSFUL;
238}
239
240void C_dispatch_isr(int vector)
241{
242  irq_count[vector]++;
243  bsp_interrupt_handler_dispatch(vector);
244}
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