[67a2288] | 1 | /* |
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| 2 | * cpu.c - This file contains implementation of C function to |
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[aa9eb940] | 3 | * instantiate IDT entries. More detailled information can be found |
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[67a2288] | 4 | * on Intel site and more precisely in the following book : |
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| 5 | * |
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[aa9eb940] | 6 | * Pentium Processor family |
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[67a2288] | 7 | * Developper's Manual |
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| 8 | * |
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| 9 | * Volume 3 : Architecture and Programming Manual |
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| 10 | * |
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| 11 | * Copyright (C) 1998 Eric Valette (valette@crf.canon.fr) |
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| 12 | * Canon Centre Recherche France. |
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| 13 | * |
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| 14 | * The license and distribution terms for this file may be |
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[8c41855] | 15 | * found in the file LICENSE in this distribution or at |
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[c499856] | 16 | * http://www.rtems.org/license/LICENSE. |
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[67a2288] | 17 | */ |
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| 18 | |
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[328bd35] | 19 | #include <rtems/score/cpu.h> |
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[529cebf0] | 20 | #include <bsp/irq.h> |
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[7b0c74ff] | 21 | #include <bsp/tblsizes.h> |
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[67a2288] | 22 | |
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[6b54dcb] | 23 | /* |
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| 24 | * This locking is not enough if IDT is changed at runtime |
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| 25 | * and entry can be changed for vector which is enabled |
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| 26 | * at change time. But such use is broken anyway. |
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| 27 | * Protect code only against concurrent changes. |
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| 28 | * Even that is probably unnecessary if different |
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| 29 | * entries are changed concurrently. |
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| 30 | */ |
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| 31 | RTEMS_INTERRUPT_LOCK_DEFINE( static, rtems_idt_access_lock, "rtems_idt_access_lock" ); |
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| 32 | |
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[67a2288] | 33 | static rtems_raw_irq_connect_data* raw_irq_table; |
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| 34 | static rtems_raw_irq_connect_data default_raw_irq_entry; |
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| 35 | static interrupt_gate_descriptor default_idt_entry; |
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| 36 | static rtems_raw_irq_global_settings* local_settings; |
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| 37 | |
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| 38 | void create_interrupt_gate_descriptor (interrupt_gate_descriptor* idtEntry, |
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| 39 | rtems_raw_irq_hdl hdl) |
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| 40 | { |
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| 41 | idtEntry->low_offsets_bits = (((unsigned) hdl) & 0xffff); |
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[6128a4a] | 42 | idtEntry->segment_selector = i386_get_cs(); |
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[67a2288] | 43 | idtEntry->fixed_value_bits = 0; |
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[6128a4a] | 44 | idtEntry->gate_type = 0xe; |
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[67a2288] | 45 | idtEntry->privilege = 0; |
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| 46 | idtEntry->present = 1; |
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| 47 | idtEntry->high_offsets_bits = ((((unsigned) hdl) >> 16) & 0xffff); |
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| 48 | } |
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| 49 | |
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| 50 | rtems_raw_irq_hdl get_hdl_from_vector(rtems_vector_offset index) |
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| 51 | { |
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[a4d3eb0d] | 52 | uint32_t hdl; |
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[67a2288] | 53 | interrupt_gate_descriptor* idt_entry_tbl; |
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[34e7be2] | 54 | unsigned limit; |
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[67a2288] | 55 | |
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| 56 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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[6128a4a] | 57 | |
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[97d7b068] | 58 | /* Convert limit into number of entries */ |
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| 59 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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[6128a4a] | 60 | |
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[97d7b068] | 61 | if(index >= limit) { |
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| 62 | return 0; |
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| 63 | } |
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| 64 | |
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[a4d3eb0d] | 65 | hdl = (idt_entry_tbl[index].low_offsets_bits | |
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| 66 | (idt_entry_tbl[index].high_offsets_bits << 16)); |
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| 67 | return (rtems_raw_irq_hdl) hdl; |
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[67a2288] | 68 | } |
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| 69 | |
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| 70 | int i386_set_idt_entry (const rtems_raw_irq_connect_data* irq) |
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| 71 | { |
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| 72 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 73 | unsigned limit; |
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[6b54dcb] | 74 | rtems_interrupt_lock_context lock_context; |
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[67a2288] | 75 | |
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| 76 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 77 | |
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[97d7b068] | 78 | /* Convert limit into number of entries */ |
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| 79 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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| 80 | |
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| 81 | if (irq->idtIndex >= limit) { |
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[67a2288] | 82 | return 0; |
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| 83 | } |
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| 84 | /* |
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| 85 | * Check if default handler is actually connected. If not issue an error. |
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| 86 | * You must first get the current handler via i386_get_current_idt_entry |
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| 87 | * and then disconnect it using i386_delete_idt_entry. |
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| 88 | * RATIONALE : to always have the same transition by forcing the user |
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| 89 | * to get the previous handler before accepting to disconnect. |
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| 90 | */ |
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| 91 | if (get_hdl_from_vector(irq->idtIndex) != default_raw_irq_entry.hdl) { |
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| 92 | return 0; |
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| 93 | } |
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[97d7b068] | 94 | |
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[6b54dcb] | 95 | rtems_interrupt_lock_acquire(&rtems_idt_access_lock, &lock_context); |
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[6128a4a] | 96 | |
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[67a2288] | 97 | raw_irq_table [irq->idtIndex] = *irq; |
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| 98 | create_interrupt_gate_descriptor (&idt_entry_tbl[irq->idtIndex], irq->hdl); |
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[069ed6c5] | 99 | if (irq->on) |
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| 100 | irq->on(irq); |
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[6128a4a] | 101 | |
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[6b54dcb] | 102 | rtems_interrupt_lock_release(&rtems_idt_access_lock, &lock_context); |
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[67a2288] | 103 | return 1; |
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| 104 | } |
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| 105 | |
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[4d90b98e] | 106 | void _CPU_ISR_install_vector (uint32_t vector, |
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| 107 | proc_ptr hdl, |
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| 108 | proc_ptr * oldHdl) |
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[67a2288] | 109 | { |
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| 110 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 111 | unsigned limit; |
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| 112 | interrupt_gate_descriptor new; |
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[6b54dcb] | 113 | rtems_interrupt_lock_context lock_context; |
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[6128a4a] | 114 | |
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[67a2288] | 115 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 116 | |
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[97d7b068] | 117 | /* Convert limit into number of entries */ |
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| 118 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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| 119 | |
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| 120 | if (vector >= limit) { |
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[67a2288] | 121 | return; |
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| 122 | } |
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[6b54dcb] | 123 | rtems_interrupt_lock_acquire(&rtems_idt_access_lock, &lock_context); |
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[67a2288] | 124 | * ((unsigned int *) oldHdl) = idt_entry_tbl[vector].low_offsets_bits | |
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| 125 | (idt_entry_tbl[vector].high_offsets_bits << 16); |
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| 126 | |
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| 127 | create_interrupt_gate_descriptor(&new, hdl); |
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| 128 | idt_entry_tbl[vector] = new; |
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| 129 | |
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[6b54dcb] | 130 | rtems_interrupt_lock_release(&rtems_idt_access_lock, &lock_context); |
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[67a2288] | 131 | } |
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[6128a4a] | 132 | |
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[67a2288] | 133 | int i386_get_current_idt_entry (rtems_raw_irq_connect_data* irq) |
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| 134 | { |
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| 135 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 136 | unsigned limit; |
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| 137 | |
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| 138 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 139 | |
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[97d7b068] | 140 | /* Convert limit into number of entries */ |
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| 141 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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| 142 | |
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| 143 | if (irq->idtIndex >= limit) { |
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| 144 | return 0; |
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[67a2288] | 145 | } |
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| 146 | raw_irq_table [irq->idtIndex].hdl = get_hdl_from_vector(irq->idtIndex); |
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[6128a4a] | 147 | |
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[67a2288] | 148 | *irq = raw_irq_table [irq->idtIndex]; |
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[6128a4a] | 149 | |
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[97d7b068] | 150 | return 1; |
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[67a2288] | 151 | } |
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| 152 | |
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| 153 | int i386_delete_idt_entry (const rtems_raw_irq_connect_data* irq) |
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| 154 | { |
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| 155 | interrupt_gate_descriptor* idt_entry_tbl; |
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| 156 | unsigned limit; |
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[6b54dcb] | 157 | rtems_interrupt_lock_context lock_context; |
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[6128a4a] | 158 | |
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[67a2288] | 159 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 160 | |
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[97d7b068] | 161 | /* Convert limit into number of entries */ |
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| 162 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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| 163 | |
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| 164 | if (irq->idtIndex >= limit) { |
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| 165 | return 0; |
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[67a2288] | 166 | } |
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[97d7b068] | 167 | /* |
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[67a2288] | 168 | * Check if handler passed is actually connected. If not issue an error. |
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| 169 | * You must first get the current handler via i386_get_current_idt_entry |
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| 170 | * and then disconnect it using i386_delete_idt_entry. |
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| 171 | * RATIONALE : to always have the same transition by forcing the user |
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| 172 | * to get the previous handler before accepting to disconnect. |
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| 173 | */ |
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| 174 | if (get_hdl_from_vector(irq->idtIndex) != irq->hdl){ |
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[97d7b068] | 175 | return 0; |
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[67a2288] | 176 | } |
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[6b54dcb] | 177 | rtems_interrupt_lock_acquire(&rtems_idt_access_lock, &lock_context); |
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[67a2288] | 178 | |
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| 179 | idt_entry_tbl[irq->idtIndex] = default_idt_entry; |
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| 180 | |
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[069ed6c5] | 181 | if (irq->off) |
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| 182 | irq->off(irq); |
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[6128a4a] | 183 | |
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[67a2288] | 184 | raw_irq_table[irq->idtIndex] = default_raw_irq_entry; |
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[97d7b068] | 185 | raw_irq_table[irq->idtIndex].idtIndex = irq->idtIndex; |
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[67a2288] | 186 | |
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[6b54dcb] | 187 | rtems_interrupt_lock_release(&rtems_idt_access_lock, &lock_context); |
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[6128a4a] | 188 | |
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[97d7b068] | 189 | return 1; |
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[67a2288] | 190 | } |
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| 191 | |
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| 192 | /* |
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| 193 | * Caution this function assumes the IDTR has been already set. |
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| 194 | */ |
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| 195 | int i386_init_idt (rtems_raw_irq_global_settings* config) |
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| 196 | { |
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| 197 | unsigned limit; |
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| 198 | unsigned i; |
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[6b54dcb] | 199 | rtems_interrupt_lock_context lock_context; |
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[67a2288] | 200 | interrupt_gate_descriptor* idt_entry_tbl; |
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[6128a4a] | 201 | |
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[67a2288] | 202 | i386_get_info_from_IDTR (&idt_entry_tbl, &limit); |
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| 203 | |
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[97d7b068] | 204 | /* Convert limit into number of entries */ |
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| 205 | limit = (limit + 1) / sizeof(interrupt_gate_descriptor); |
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[6128a4a] | 206 | |
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[67a2288] | 207 | if (config->idtSize != limit) { |
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[97d7b068] | 208 | return 0; |
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[67a2288] | 209 | } |
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| 210 | /* |
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| 211 | * store various accelarators |
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| 212 | */ |
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| 213 | raw_irq_table = config->rawIrqHdlTbl; |
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| 214 | local_settings = config; |
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| 215 | default_raw_irq_entry = config->defaultRawEntry; |
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| 216 | |
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[6b54dcb] | 217 | rtems_interrupt_lock_acquire(&rtems_idt_access_lock, &lock_context); |
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[67a2288] | 218 | |
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| 219 | create_interrupt_gate_descriptor (&default_idt_entry, default_raw_irq_entry.hdl); |
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| 220 | |
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| 221 | for (i=0; i < limit; i++) { |
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| 222 | interrupt_gate_descriptor new; |
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| 223 | create_interrupt_gate_descriptor (&new, raw_irq_table[i].hdl); |
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| 224 | idt_entry_tbl[i] = new; |
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| 225 | if (raw_irq_table[i].hdl != default_raw_irq_entry.hdl) { |
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| 226 | raw_irq_table[i].on(&raw_irq_table[i]); |
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| 227 | } |
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| 228 | else { |
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| 229 | raw_irq_table[i].off(&raw_irq_table[i]); |
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| 230 | } |
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| 231 | } |
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[6b54dcb] | 232 | rtems_interrupt_lock_release(&rtems_idt_access_lock, &lock_context); |
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[67a2288] | 233 | |
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[97d7b068] | 234 | return 1; |
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[67a2288] | 235 | } |
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| 236 | |
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| 237 | int i386_get_idt_config (rtems_raw_irq_global_settings** config) |
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| 238 | { |
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| 239 | *config = local_settings; |
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[97d7b068] | 240 | return 1; |
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[67a2288] | 241 | } |
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| 242 | |
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[74d2d940] | 243 | uint32_t i386_raw_gdt_entry (uint16_t segment_selector_index, |
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| 244 | segment_descriptors* sd) |
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[67a2288] | 245 | { |
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[74d2d940] | 246 | uint16_t gdt_limit; |
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| 247 | uint16_t tmp_segment = 0; |
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| 248 | segment_descriptors* gdt_entry_tbl; |
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| 249 | uint8_t present; |
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[67a2288] | 250 | |
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| 251 | i386_get_info_from_GDTR (&gdt_entry_tbl, &gdt_limit); |
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| 252 | |
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[74d2d940] | 253 | if (segment_selector_index >= (gdt_limit+1)/8) { |
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| 254 | /* index to GDT table out of bounds */ |
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[97d7b068] | 255 | return 0; |
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[67a2288] | 256 | } |
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[74d2d940] | 257 | if (segment_selector_index == 0) { |
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| 258 | /* index 0 is not usable */ |
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| 259 | return 0; |
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[67a2288] | 260 | } |
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| 261 | |
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[74d2d940] | 262 | /* put prepared descriptor into the GDT */ |
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| 263 | present = sd->present; |
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| 264 | sd->present = 0; |
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| 265 | gdt_entry_tbl[segment_selector_index].present = 0; |
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| 266 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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| 267 | gdt_entry_tbl[segment_selector_index] = *sd; |
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| 268 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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| 269 | gdt_entry_tbl[segment_selector_index].present = present; |
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| 270 | sd->present = present; |
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[67a2288] | 271 | /* |
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[74d2d940] | 272 | * Now, reload all segment registers so that the possible changes takes effect. |
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[67a2288] | 273 | */ |
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[00882105] | 274 | __asm__ volatile( "movw %%ds,%0 ; movw %0,%%ds\n\t" |
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[55b3616] | 275 | "movw %%es,%0 ; movw %0,%%es\n\t" |
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| 276 | "movw %%fs,%0 ; movw %0,%%fs\n\t" |
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| 277 | "movw %%gs,%0 ; movw %0,%%gs\n\t" |
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| 278 | "movw %%ss,%0 ; movw %0,%%ss" |
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[67a2288] | 279 | : "=r" (tmp_segment) |
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| 280 | : "0" (tmp_segment) |
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[74d2d940] | 281 | ); |
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[97d7b068] | 282 | return 1; |
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[67a2288] | 283 | } |
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[74d2d940] | 284 | |
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| 285 | void i386_fill_segment_desc_base(uint32_t base, |
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| 286 | segment_descriptors* sd) |
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| 287 | { |
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| 288 | sd->base_address_15_0 = base & 0xffff; |
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| 289 | sd->base_address_23_16 = (base >> 16) & 0xff; |
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| 290 | sd->base_address_31_24 = (base >> 24) & 0xff; |
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| 291 | } |
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| 292 | |
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| 293 | void i386_fill_segment_desc_limit(uint32_t limit, |
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| 294 | segment_descriptors* sd) |
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| 295 | { |
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| 296 | sd->granularity = 0; |
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| 297 | if (limit > 65535) { |
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| 298 | sd->granularity = 1; |
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| 299 | limit /= 4096; |
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| 300 | } |
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| 301 | sd->limit_15_0 = limit & 0xffff; |
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| 302 | sd->limit_19_16 = (limit >> 16) & 0xf; |
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| 303 | } |
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| 304 | |
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| 305 | /* |
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| 306 | * Caution this function assumes the GDTR has been already set. |
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| 307 | */ |
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| 308 | uint32_t i386_set_gdt_entry (uint16_t segment_selector_index, uint32_t base, |
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| 309 | uint32_t limit) |
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| 310 | { |
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| 311 | segment_descriptors gdt_entry; |
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| 312 | memset(&gdt_entry, 0, sizeof(gdt_entry)); |
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| 313 | |
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| 314 | i386_fill_segment_desc_limit(limit, &gdt_entry); |
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| 315 | i386_fill_segment_desc_base(base, &gdt_entry); |
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| 316 | /* |
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| 317 | * set up descriptor type (this may well becomes a parameter if needed) |
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| 318 | */ |
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| 319 | gdt_entry.type = 2; /* Data R/W */ |
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| 320 | gdt_entry.descriptor_type = 1; /* Code or Data */ |
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| 321 | gdt_entry.privilege = 0; /* ring 0 */ |
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| 322 | gdt_entry.present = 1; /* not present */ |
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| 323 | |
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| 324 | /* |
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| 325 | * Now, reload all segment registers so the limit takes effect. |
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| 326 | */ |
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| 327 | return i386_raw_gdt_entry(segment_selector_index, &gdt_entry); |
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| 328 | } |
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| 329 | |
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| 330 | uint16_t i386_next_empty_gdt_entry () |
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| 331 | { |
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| 332 | uint16_t gdt_limit; |
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| 333 | segment_descriptors* gdt_entry_tbl; |
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| 334 | /* initial amount of filled descriptors */ |
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[7b0c74ff] | 335 | static uint16_t segment_selector_index = NUM_SYSTEM_GDT_DESCRIPTORS - 1; |
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[74d2d940] | 336 | |
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| 337 | segment_selector_index += 1; |
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| 338 | i386_get_info_from_GDTR (&gdt_entry_tbl, &gdt_limit); |
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| 339 | if (segment_selector_index >= (gdt_limit+1)/8) { |
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| 340 | return 0; |
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| 341 | } |
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| 342 | return segment_selector_index; |
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| 343 | } |
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| 344 | |
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| 345 | uint16_t i386_cpy_gdt_entry(uint16_t segment_selector_index, |
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| 346 | segment_descriptors* struct_to_fill) |
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| 347 | { |
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| 348 | uint16_t gdt_limit; |
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| 349 | segment_descriptors* gdt_entry_tbl; |
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| 350 | |
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| 351 | i386_get_info_from_GDTR (&gdt_entry_tbl, &gdt_limit); |
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| 352 | |
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| 353 | if (segment_selector_index >= (gdt_limit+1)/8) { |
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| 354 | return 0; |
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| 355 | } |
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| 356 | |
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| 357 | *struct_to_fill = gdt_entry_tbl[segment_selector_index]; |
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| 358 | return segment_selector_index; |
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| 359 | } |
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| 360 | |
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| 361 | segment_descriptors* i386_get_gdt_entry(uint16_t segment_selector_index) |
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| 362 | { |
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| 363 | uint16_t gdt_limit; |
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| 364 | segment_descriptors* gdt_entry_tbl; |
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| 365 | |
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| 366 | i386_get_info_from_GDTR (&gdt_entry_tbl, &gdt_limit); |
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| 367 | |
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| 368 | if (segment_selector_index >= (gdt_limit+1)/8) { |
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| 369 | return 0; |
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| 370 | } |
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| 371 | return &gdt_entry_tbl[segment_selector_index]; |
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| 372 | } |
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| 373 | |
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| 374 | uint32_t i386_limit_gdt_entry(segment_descriptors* gdt_entry) |
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| 375 | { |
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| 376 | uint32_t lim = (gdt_entry->limit_15_0 + (gdt_entry->limit_19_16<<16)); |
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| 377 | if (gdt_entry->granularity) { |
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| 378 | return lim*4096+4095; |
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| 379 | } |
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| 380 | return lim; |
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| 381 | } |
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