1 | /* |
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2 | * This software is Copyright (C) 1998 by T.sqware - all rights limited |
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3 | * It is provided in to the public domain "as is", can be freely modified |
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4 | * as far as this copyight notice is kept unchanged, but does not imply |
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5 | * an endorsement by T.sqware of the product in which it is included. |
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6 | */ |
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7 | |
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8 | #include <stdio.h> |
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9 | #include <bsp.h> |
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10 | #include <bsp/irq.h> |
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11 | #include <uart.h> |
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12 | #include <rtems/libio.h> |
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13 | #include <rtems/termiostypes.h> |
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14 | #include <termios.h> |
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15 | #include <assert.h> |
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16 | |
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17 | /* |
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18 | * Basic 16552 driver |
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19 | */ |
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20 | |
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21 | struct uart_data |
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22 | { |
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23 | int ioMode; |
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24 | int hwFlow; |
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25 | unsigned int ier; |
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26 | unsigned long baud; |
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27 | unsigned long databits; |
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28 | unsigned long parity; |
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29 | unsigned long stopbits; |
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30 | }; |
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31 | |
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32 | static struct uart_data uart_data[2]; |
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33 | |
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34 | /* |
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35 | * Macros to read/write register of uart, if configuration is |
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36 | * different just rewrite these macros |
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37 | */ |
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38 | |
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39 | static inline unsigned char |
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40 | uread(int uart, unsigned int reg) |
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41 | { |
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42 | register unsigned char val; |
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43 | |
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44 | if (uart == 0) { |
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45 | inport_byte(COM1_BASE_IO+reg, val); |
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46 | } else { |
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47 | inport_byte(COM2_BASE_IO+reg, val); |
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48 | } |
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49 | |
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50 | return val; |
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51 | } |
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52 | |
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53 | static inline void |
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54 | uwrite(int uart, int reg, unsigned int val) |
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55 | { |
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56 | if (uart == 0) { |
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57 | outport_byte(COM1_BASE_IO+reg, val); |
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58 | } else { |
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59 | outport_byte(COM2_BASE_IO+reg, val); |
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60 | } |
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61 | } |
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62 | |
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63 | #ifdef UARTDEBUG |
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64 | static void |
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65 | uartError(int uart) |
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66 | { |
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67 | unsigned char uartStatus, dummy; |
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68 | |
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69 | uartStatus = uread(uart, LSR); |
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70 | dummy = uread(uart, RBR); |
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71 | |
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72 | if (uartStatus & OE) |
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73 | printk("********* Over run Error **********\n"); |
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74 | if (uartStatus & PE) |
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75 | printk("********* Parity Error **********\n"); |
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76 | if (uartStatus & FE) |
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77 | printk("********* Framing Error **********\n"); |
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78 | if (uartStatus & BI) |
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79 | printk("********* Parity Error **********\n"); |
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80 | if (uartStatus & ERFIFO) |
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81 | printk("********* Error receive Fifo **********\n"); |
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82 | |
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83 | } |
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84 | #else |
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85 | inline void uartError(int uart) |
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86 | { |
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87 | uread(uart, LSR); |
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88 | uread(uart, RBR); |
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89 | } |
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90 | #endif |
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91 | |
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92 | /* |
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93 | * Uart initialization, it is hardcoded to 8 bit, no parity, |
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94 | * one stop bit, FIFO, things to be changed |
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95 | * are baud rate and nad hw flow control, |
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96 | * and longest rx fifo setting |
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97 | */ |
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98 | void |
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99 | BSP_uart_init |
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100 | ( |
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101 | int uart, |
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102 | unsigned long baud, |
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103 | unsigned long databits, |
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104 | unsigned long parity, |
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105 | unsigned long stopbits, |
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106 | int hwFlow |
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107 | ) |
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108 | { |
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109 | /* Sanity check */ |
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110 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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111 | |
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112 | switch(baud) |
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113 | { |
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114 | case 50: |
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115 | case 75: |
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116 | case 110: |
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117 | case 134: |
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118 | case 300: |
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119 | case 600: |
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120 | case 1200: |
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121 | case 2400: |
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122 | case 9600: |
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123 | case 19200: |
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124 | case 38400: |
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125 | case 57600: |
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126 | case 115200: |
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127 | break; |
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128 | default: |
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129 | assert(0); |
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130 | return; |
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131 | } |
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132 | |
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133 | /* Set DLAB bit to 1 */ |
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134 | uwrite(uart, LCR, DLAB); |
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135 | |
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136 | /* Set baud rate */ |
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137 | uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); |
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138 | uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); |
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139 | |
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140 | /* 8-bit, no parity , 1 stop */ |
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141 | uwrite(uart, LCR, databits | parity | stopbits); |
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142 | |
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143 | /* Set DTR, RTS and OUT2 high */ |
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144 | uwrite(uart, MCR, DTR | RTS | OUT_2); |
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145 | |
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146 | /* Enable FIFO */ |
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147 | uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); |
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148 | |
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149 | /* Disable Interrupts */ |
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150 | uwrite(uart, IER, 0); |
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151 | |
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152 | /* Read status to clear them */ |
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153 | uread(uart, LSR); |
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154 | uread(uart, RBR); |
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155 | uread(uart, MSR); |
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156 | |
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157 | /* Remember state */ |
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158 | uart_data[uart].baud = baud; |
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159 | uart_data[uart].databits = databits; |
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160 | uart_data[uart].parity = parity; |
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161 | uart_data[uart].stopbits = stopbits; |
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162 | uart_data[uart].hwFlow = hwFlow; |
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163 | return; |
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164 | } |
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165 | |
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166 | /* |
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167 | * Set baud |
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168 | */ |
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169 | |
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170 | void |
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171 | BSP_uart_set_baud( |
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172 | int uart, |
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173 | unsigned long baud |
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174 | ) |
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175 | { |
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176 | /* Sanity check */ |
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177 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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178 | |
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179 | BSP_uart_set_attributes( uart, baud, uart_data[uart].databits, |
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180 | uart_data[uart].parity, uart_data[uart].stopbits ); |
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181 | } |
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182 | |
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183 | /* |
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184 | * Set all attributes |
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185 | */ |
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186 | |
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187 | void |
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188 | BSP_uart_set_attributes |
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189 | ( |
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190 | int uart, |
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191 | unsigned long baud, |
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192 | unsigned long databits, |
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193 | unsigned long parity, |
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194 | unsigned long stopbits |
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195 | ) |
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196 | { |
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197 | unsigned char mcr, ier; |
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198 | |
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199 | /* Sanity check */ |
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200 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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201 | |
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202 | /* |
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203 | * This function may be called whenever TERMIOS parameters |
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204 | * are changed, so we have to make sure that baud change is |
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205 | * indeed required |
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206 | */ |
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207 | |
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208 | if( (baud == uart_data[uart].baud) && |
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209 | (databits == uart_data[uart].databits) && |
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210 | (parity == uart_data[uart].parity) && |
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211 | (stopbits == uart_data[uart].stopbits) ) |
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212 | { |
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213 | return; |
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214 | } |
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215 | |
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216 | mcr = uread(uart, MCR); |
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217 | ier = uread(uart, IER); |
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218 | |
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219 | BSP_uart_init(uart, baud, databits, parity, stopbits, uart_data[uart].hwFlow); |
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220 | |
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221 | uwrite(uart, MCR, mcr); |
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222 | uwrite(uart, IER, ier); |
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223 | |
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224 | return; |
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225 | } |
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226 | |
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227 | /* |
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228 | * Enable/disable interrupts |
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229 | */ |
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230 | void |
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231 | BSP_uart_intr_ctrl(int uart, int cmd) |
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232 | { |
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233 | int iStatus = (int)INTERRUPT_DISABLE; |
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234 | |
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235 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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236 | |
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237 | switch(cmd) |
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238 | { |
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239 | case BSP_UART_INTR_CTRL_ENABLE: |
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240 | iStatus |= (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE | TRANSMIT_ENABLE); |
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241 | if ( uart_data[uart].hwFlow ) { |
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242 | iStatus |= MODEM_ENABLE; |
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243 | } |
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244 | break; |
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245 | case BSP_UART_INTR_CTRL_TERMIOS: |
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246 | iStatus |= (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
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247 | if ( uart_data[uart].hwFlow ) { |
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248 | iStatus |= MODEM_ENABLE; |
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249 | } |
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250 | break; |
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251 | case BSP_UART_INTR_CTRL_GDB: |
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252 | iStatus |= RECEIVE_ENABLE; |
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253 | break; |
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254 | } |
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255 | |
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256 | uart_data[uart].ier = iStatus; |
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257 | uwrite(uart, IER, iStatus); |
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258 | |
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259 | return; |
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260 | } |
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261 | |
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262 | void |
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263 | BSP_uart_throttle(int uart) |
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264 | { |
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265 | unsigned int mcr; |
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266 | |
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267 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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268 | |
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269 | if(!uart_data[uart].hwFlow) |
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270 | { |
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271 | /* Should not happen */ |
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272 | assert(0); |
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273 | return; |
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274 | } |
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275 | mcr = uread (uart, MCR); |
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276 | /* RTS down */ |
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277 | mcr &= ~RTS; |
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278 | uwrite(uart, MCR, mcr); |
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279 | |
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280 | return; |
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281 | } |
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282 | |
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283 | void |
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284 | BSP_uart_unthrottle(int uart) |
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285 | { |
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286 | unsigned int mcr; |
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287 | |
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288 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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289 | |
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290 | if(!uart_data[uart].hwFlow) |
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291 | { |
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292 | /* Should not happen */ |
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293 | assert(0); |
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294 | return; |
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295 | } |
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296 | mcr = uread (uart, MCR); |
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297 | /* RTS up */ |
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298 | mcr |= RTS; |
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299 | uwrite(uart, MCR, mcr); |
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300 | |
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301 | return; |
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302 | } |
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303 | |
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304 | /* |
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305 | * Status function, -1 if error |
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306 | * detected, 0 if no received chars available, |
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307 | * 1 if received char available, 2 if break |
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308 | * is detected, it will eat break and error |
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309 | * chars. It ignores overruns - we cannot do |
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310 | * anything about - it execpt count statistics |
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311 | * and we are not counting it. |
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312 | */ |
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313 | int |
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314 | BSP_uart_polled_status(int uart) |
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315 | { |
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316 | unsigned char val; |
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317 | |
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318 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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319 | |
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320 | val = uread(uart, LSR); |
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321 | |
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322 | if(val & BI) |
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323 | { |
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324 | /* BREAK found, eat character */ |
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325 | uread(uart, RBR); |
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326 | return BSP_UART_STATUS_BREAK; |
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327 | } |
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328 | |
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329 | if((val & (DR | OE | FE)) == 1) |
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330 | { |
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331 | /* No error, character present */ |
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332 | return BSP_UART_STATUS_CHAR; |
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333 | } |
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334 | |
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335 | if((val & (DR | OE | FE)) == 0) |
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336 | { |
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337 | /* Nothing */ |
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338 | return BSP_UART_STATUS_NOCHAR; |
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339 | } |
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340 | |
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341 | /* |
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342 | * Framing or parity error |
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343 | * eat character |
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344 | */ |
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345 | uread(uart, RBR); |
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346 | |
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347 | return BSP_UART_STATUS_ERROR; |
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348 | } |
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349 | |
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350 | /* |
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351 | * Polled mode write function |
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352 | */ |
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353 | void |
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354 | BSP_uart_polled_write(int uart, int val) |
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355 | { |
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356 | unsigned char val1; |
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357 | |
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358 | /* Sanity check */ |
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359 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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360 | |
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361 | for(;;) |
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362 | { |
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363 | if((val1=uread(uart, LSR)) & THRE) |
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364 | { |
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365 | break; |
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366 | } |
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367 | } |
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368 | |
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369 | if(uart_data[uart].hwFlow) |
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370 | { |
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371 | for(;;) |
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372 | { |
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373 | if(uread(uart, MSR) & CTS) |
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374 | { |
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375 | break; |
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376 | } |
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377 | } |
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378 | } |
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379 | |
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380 | uwrite(uart, THR, val & 0xff); |
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381 | |
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382 | /* |
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383 | * Wait for character to be transmitted. |
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384 | * This ensures that printk and printf play nicely together |
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385 | * when using the same serial port. |
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386 | * Yes, there's a performance hit here, but if we're doing |
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387 | * polled writes to a serial port we're probably not that |
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388 | * interested in efficiency anyway..... |
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389 | */ |
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390 | for(;;) |
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391 | { |
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392 | if((val1=uread(uart, LSR)) & THRE) |
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393 | { |
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394 | break; |
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395 | } |
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396 | } |
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397 | |
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398 | return; |
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399 | } |
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400 | |
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401 | void |
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402 | BSP_output_char_via_serial(char val) |
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403 | { |
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404 | BSP_uart_polled_write(BSPConsolePort, val); |
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405 | if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r'); |
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406 | } |
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407 | |
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408 | /* |
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409 | * Polled mode read function |
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410 | */ |
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411 | int |
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412 | BSP_uart_polled_read(int uart) |
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413 | { |
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414 | unsigned char val; |
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415 | |
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416 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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417 | |
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418 | for(;;) |
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419 | { |
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420 | if(uread(uart, LSR) & DR) |
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421 | { |
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422 | break; |
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423 | } |
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424 | } |
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425 | |
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426 | val = uread(uart, RBR); |
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427 | |
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428 | return (int)(val & 0xff); |
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429 | } |
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430 | |
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431 | int |
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432 | BSP_poll_char_via_serial(void) |
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433 | { |
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434 | return BSP_uart_polled_read(BSPConsolePort); |
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435 | } |
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436 | |
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437 | /* ================ Termios support =================*/ |
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438 | |
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439 | static volatile int termios_stopped_com1 = 0; |
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440 | static volatile int termios_tx_active_com1 = 0; |
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441 | static void* termios_ttyp_com1 = NULL; |
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442 | static char termios_tx_hold_com1 = 0; |
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443 | static volatile char termios_tx_hold_valid_com1 = 0; |
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444 | |
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445 | static volatile int termios_stopped_com2 = 0; |
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446 | static volatile int termios_tx_active_com2 = 0; |
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447 | static void* termios_ttyp_com2 = NULL; |
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448 | static char termios_tx_hold_com2 = 0; |
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449 | static volatile char termios_tx_hold_valid_com2 = 0; |
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450 | |
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451 | static void ( *driver_input_handler_com1 )( void *, char *, int ) = 0; |
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452 | static void ( *driver_input_handler_com2 )( void *, char *, int ) = 0; |
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453 | |
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454 | /* |
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455 | * This routine sets the handler to handle the characters received |
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456 | * from the serial port. |
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457 | */ |
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458 | void uart_set_driver_handler( int port, void ( *handler )( void *, char *, int ) ) |
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459 | { |
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460 | switch( port ) |
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461 | { |
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462 | case BSP_UART_COM1: |
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463 | driver_input_handler_com1 = handler; |
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464 | break; |
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465 | |
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466 | case BSP_UART_COM2: |
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467 | driver_input_handler_com2 = handler; |
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468 | break; |
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469 | } |
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470 | } |
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471 | |
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472 | /* |
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473 | * Set channel parameters |
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474 | */ |
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475 | void |
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476 | BSP_uart_termios_set(int uart, void *ttyp) |
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477 | { |
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478 | struct rtems_termios_tty *p = (struct rtems_termios_tty *)ttyp; |
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479 | unsigned char val; |
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480 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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481 | |
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482 | if(uart == BSP_UART_COM1) |
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483 | { |
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484 | uart_data[uart].ioMode = p->device.outputUsesInterrupts; |
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485 | if(uart_data[uart].hwFlow) |
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486 | { |
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487 | val = uread(uart, MSR); |
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488 | |
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489 | termios_stopped_com1 = (val & CTS) ? 0 : 1; |
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490 | } |
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491 | else |
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492 | { |
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493 | termios_stopped_com1 = 0; |
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494 | } |
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495 | termios_tx_active_com1 = 0; |
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496 | termios_ttyp_com1 = ttyp; |
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497 | termios_tx_hold_com1 = 0; |
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498 | termios_tx_hold_valid_com1 = 0; |
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499 | } |
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500 | else |
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501 | { |
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502 | uart_data[uart].ioMode = p->device.outputUsesInterrupts; |
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503 | if(uart_data[uart].hwFlow) |
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504 | { |
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505 | val = uread(uart, MSR); |
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506 | |
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507 | termios_stopped_com2 = (val & CTS) ? 0 : 1; |
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508 | } |
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509 | else |
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510 | { |
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511 | termios_stopped_com2 = 0; |
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512 | } |
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513 | termios_tx_active_com2 = 0; |
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514 | termios_ttyp_com2 = ttyp; |
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515 | termios_tx_hold_com2 = 0; |
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516 | termios_tx_hold_valid_com2 = 0; |
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517 | } |
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518 | |
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519 | return; |
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520 | } |
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521 | |
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522 | int |
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523 | BSP_uart_termios_read_com1(int uart) |
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524 | { |
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525 | int off = (int)0; |
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526 | char buf[40]; |
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527 | |
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528 | /* read bytes */ |
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529 | while (( off < sizeof(buf) ) && ( uread(BSP_UART_COM1, LSR) & DR )) { |
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530 | buf[off++] = uread(BSP_UART_COM1, RBR); |
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531 | } |
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532 | |
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533 | /* write out data */ |
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534 | if ( off > 0 ) { |
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535 | rtems_termios_enqueue_raw_characters(termios_ttyp_com1, buf, off); |
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536 | } |
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537 | |
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538 | /* enable receive interrupts */ |
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539 | uart_data[BSP_UART_COM1].ier |= (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
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540 | uwrite(BSP_UART_COM1, IER, uart_data[BSP_UART_COM1].ier); |
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541 | |
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542 | return ( EOF ); |
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543 | } |
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544 | |
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545 | int |
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546 | BSP_uart_termios_read_com2(int uart) |
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547 | { |
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548 | int off = (int)0; |
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549 | char buf[40]; |
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550 | |
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551 | /* read current byte */ |
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552 | while (( off < sizeof(buf) ) && ( uread(BSP_UART_COM2, LSR) & DR )) { |
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553 | buf[off++] = uread(BSP_UART_COM2, RBR); |
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554 | } |
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555 | |
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556 | /* write out data */ |
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557 | if ( off > 0 ) { |
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558 | rtems_termios_enqueue_raw_characters(termios_ttyp_com2, buf, off); |
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559 | } |
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560 | |
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561 | /* enable receive interrupts */ |
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562 | uart_data[BSP_UART_COM2].ier |= (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
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563 | uwrite(BSP_UART_COM2, IER, uart_data[BSP_UART_COM2].ier); |
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564 | |
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565 | return ( EOF ); |
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566 | } |
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567 | |
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568 | ssize_t |
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569 | BSP_uart_termios_write_com1(int minor, const char *buf, size_t len) |
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570 | { |
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571 | assert(buf != NULL); |
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572 | |
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573 | if(len <= 0) |
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574 | { |
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575 | return 0; |
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576 | } |
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577 | |
---|
578 | /* If there TX buffer is busy - something is royally screwed up */ |
---|
579 | assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); |
---|
580 | |
---|
581 | if(termios_stopped_com1) |
---|
582 | { |
---|
583 | /* CTS low */ |
---|
584 | termios_tx_hold_com1 = *buf; |
---|
585 | termios_tx_hold_valid_com1 = 1; |
---|
586 | return 0; |
---|
587 | } |
---|
588 | |
---|
589 | /* Write character */ |
---|
590 | uwrite(BSP_UART_COM1, THR, *buf & 0xff); |
---|
591 | |
---|
592 | /* Enable interrupts if necessary */ |
---|
593 | if ( !termios_tx_active_com1 ) { |
---|
594 | termios_tx_active_com1 = 1; |
---|
595 | uart_data[BSP_UART_COM1].ier |= TRANSMIT_ENABLE; |
---|
596 | uwrite(BSP_UART_COM1, IER, uart_data[BSP_UART_COM1].ier); |
---|
597 | } |
---|
598 | |
---|
599 | return 1; |
---|
600 | } |
---|
601 | |
---|
602 | ssize_t |
---|
603 | BSP_uart_termios_write_com2(int minor, const char *buf, size_t len) |
---|
604 | { |
---|
605 | assert(buf != NULL); |
---|
606 | |
---|
607 | if(len <= 0) |
---|
608 | { |
---|
609 | return 0; |
---|
610 | } |
---|
611 | |
---|
612 | /* If there TX buffer is busy - something is royally screwed up */ |
---|
613 | assert((uread(BSP_UART_COM2, LSR) & THRE) != 0); |
---|
614 | |
---|
615 | if(termios_stopped_com2) |
---|
616 | { |
---|
617 | /* CTS low */ |
---|
618 | termios_tx_hold_com2 = *buf; |
---|
619 | termios_tx_hold_valid_com2 = 1; |
---|
620 | return 0; |
---|
621 | } |
---|
622 | |
---|
623 | /* Write character */ |
---|
624 | uwrite(BSP_UART_COM2, THR, *buf & 0xff); |
---|
625 | |
---|
626 | /* Enable interrupts if necessary */ |
---|
627 | if ( !termios_tx_active_com2 ) { |
---|
628 | termios_tx_active_com2 = 1; |
---|
629 | uart_data[BSP_UART_COM2].ier |= TRANSMIT_ENABLE; |
---|
630 | uwrite(BSP_UART_COM2, IER, uart_data[BSP_UART_COM2].ier); |
---|
631 | } |
---|
632 | |
---|
633 | return 1; |
---|
634 | } |
---|
635 | |
---|
636 | void |
---|
637 | BSP_uart_termios_isr_com1(void) |
---|
638 | { |
---|
639 | unsigned char buf[40]; |
---|
640 | unsigned char val; |
---|
641 | int off, ret, vect; |
---|
642 | |
---|
643 | off = 0; |
---|
644 | |
---|
645 | for(;;) |
---|
646 | { |
---|
647 | vect = uread(BSP_UART_COM1, IIR) & 0xf; |
---|
648 | |
---|
649 | switch(vect) |
---|
650 | { |
---|
651 | case MODEM_STATUS : |
---|
652 | val = uread(BSP_UART_COM1, MSR); |
---|
653 | if(uart_data[BSP_UART_COM1].hwFlow) |
---|
654 | { |
---|
655 | if(val & CTS) |
---|
656 | { |
---|
657 | /* CTS high */ |
---|
658 | termios_stopped_com1 = 0; |
---|
659 | if(termios_tx_hold_valid_com1) |
---|
660 | { |
---|
661 | termios_tx_hold_valid_com1 = 0; |
---|
662 | BSP_uart_termios_write_com1(0, &termios_tx_hold_com1, |
---|
663 | 1); |
---|
664 | } |
---|
665 | } |
---|
666 | else |
---|
667 | { |
---|
668 | /* CTS low */ |
---|
669 | termios_stopped_com1 = 1; |
---|
670 | } |
---|
671 | } |
---|
672 | break; |
---|
673 | case NO_MORE_INTR : |
---|
674 | /* No more interrupts */ |
---|
675 | if(off != 0) |
---|
676 | { |
---|
677 | /* Update rx buffer */ |
---|
678 | if( driver_input_handler_com1 ) |
---|
679 | { |
---|
680 | driver_input_handler_com1( termios_ttyp_com1, (char *)buf, off ); |
---|
681 | } |
---|
682 | else |
---|
683 | { |
---|
684 | /* Update rx buffer */ |
---|
685 | rtems_termios_enqueue_raw_characters(termios_ttyp_com1, (char *)buf, off ); |
---|
686 | } |
---|
687 | } |
---|
688 | return; |
---|
689 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
690 | /* |
---|
691 | * TX holding empty: we have to disable these interrupts |
---|
692 | * if there is nothing more to send. |
---|
693 | */ |
---|
694 | |
---|
695 | /* If nothing else to send disable interrupts */ |
---|
696 | ret = rtems_termios_dequeue_characters(termios_ttyp_com1, 1); |
---|
697 | if ( ret == 0 ) { |
---|
698 | termios_tx_active_com1 = 0; |
---|
699 | uart_data[BSP_UART_COM1].ier &= ~(TRANSMIT_ENABLE); |
---|
700 | uwrite(BSP_UART_COM1, IER, uart_data[BSP_UART_COM1].ier); |
---|
701 | } |
---|
702 | break; |
---|
703 | case RECEIVER_DATA_AVAIL : |
---|
704 | case CHARACTER_TIMEOUT_INDICATION: |
---|
705 | if ( uart_data[BSP_UART_COM1].ioMode == TERMIOS_TASK_DRIVEN ) { |
---|
706 | /* ensure interrupts are enabled */ |
---|
707 | if ( uart_data[BSP_UART_COM1].ier & RECEIVE_ENABLE ) { |
---|
708 | /* disable interrupts and notify termios */ |
---|
709 | uart_data[BSP_UART_COM1].ier &= ~(RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
---|
710 | uwrite(BSP_UART_COM1, IER, uart_data[BSP_UART_COM1].ier); |
---|
711 | rtems_termios_rxirq_occured(termios_ttyp_com1); |
---|
712 | } |
---|
713 | } |
---|
714 | else { |
---|
715 | /* RX data ready */ |
---|
716 | assert(off < sizeof(buf)); |
---|
717 | buf[off++] = uread(BSP_UART_COM1, RBR); |
---|
718 | } |
---|
719 | break; |
---|
720 | case RECEIVER_ERROR: |
---|
721 | /* RX error: eat character */ |
---|
722 | uartError(BSP_UART_COM1); |
---|
723 | break; |
---|
724 | default: |
---|
725 | /* Should not happen */ |
---|
726 | assert(0); |
---|
727 | return; |
---|
728 | } |
---|
729 | } |
---|
730 | } |
---|
731 | |
---|
732 | void |
---|
733 | BSP_uart_termios_isr_com2(void) |
---|
734 | { |
---|
735 | unsigned char buf[40]; |
---|
736 | unsigned char val; |
---|
737 | int off, ret, vect; |
---|
738 | |
---|
739 | off = 0; |
---|
740 | |
---|
741 | for(;;) |
---|
742 | { |
---|
743 | vect = uread(BSP_UART_COM2, IIR) & 0xf; |
---|
744 | |
---|
745 | switch(vect) |
---|
746 | { |
---|
747 | case MODEM_STATUS : |
---|
748 | val = uread(BSP_UART_COM2, MSR); |
---|
749 | if(uart_data[BSP_UART_COM2].hwFlow) |
---|
750 | { |
---|
751 | if(val & CTS) |
---|
752 | { |
---|
753 | /* CTS high */ |
---|
754 | termios_stopped_com2 = 0; |
---|
755 | if(termios_tx_hold_valid_com2) |
---|
756 | { |
---|
757 | termios_tx_hold_valid_com2 = 0; |
---|
758 | BSP_uart_termios_write_com2(0, &termios_tx_hold_com2, |
---|
759 | 1); |
---|
760 | } |
---|
761 | } |
---|
762 | else |
---|
763 | { |
---|
764 | /* CTS low */ |
---|
765 | termios_stopped_com2 = 1; |
---|
766 | } |
---|
767 | } |
---|
768 | break; |
---|
769 | case NO_MORE_INTR : |
---|
770 | /* No more interrupts */ |
---|
771 | if(off != 0) |
---|
772 | { |
---|
773 | /* Update rx buffer */ |
---|
774 | if( driver_input_handler_com2 ) |
---|
775 | { |
---|
776 | driver_input_handler_com2( termios_ttyp_com2, (char *)buf, off ); |
---|
777 | } |
---|
778 | else |
---|
779 | { |
---|
780 | rtems_termios_enqueue_raw_characters(termios_ttyp_com2, (char *)buf, off); |
---|
781 | } |
---|
782 | } |
---|
783 | return; |
---|
784 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
785 | /* |
---|
786 | * TX holding empty: we have to disable these interrupts |
---|
787 | * if there is nothing more to send. |
---|
788 | */ |
---|
789 | |
---|
790 | /* If nothing else to send disable interrupts */ |
---|
791 | ret = rtems_termios_dequeue_characters(termios_ttyp_com2, 1); |
---|
792 | if ( ret == 0 ) { |
---|
793 | termios_tx_active_com2 = 0; |
---|
794 | uart_data[BSP_UART_COM2].ier &= ~(TRANSMIT_ENABLE); |
---|
795 | uwrite(BSP_UART_COM2, IER, uart_data[BSP_UART_COM2].ier); |
---|
796 | } |
---|
797 | break; |
---|
798 | case RECEIVER_DATA_AVAIL : |
---|
799 | case CHARACTER_TIMEOUT_INDICATION: |
---|
800 | if ( uart_data[BSP_UART_COM2].ioMode == TERMIOS_TASK_DRIVEN ) { |
---|
801 | /* ensure interrupts are enabled */ |
---|
802 | if ( uart_data[BSP_UART_COM2].ier & RECEIVE_ENABLE ) { |
---|
803 | /* disable interrupts and notify termios */ |
---|
804 | uart_data[BSP_UART_COM2].ier &= ~(RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
---|
805 | uwrite(BSP_UART_COM2, IER, uart_data[BSP_UART_COM2].ier); |
---|
806 | rtems_termios_rxirq_occured(termios_ttyp_com2); |
---|
807 | } |
---|
808 | } |
---|
809 | else { |
---|
810 | /* RX data ready */ |
---|
811 | assert(off < sizeof(buf)); |
---|
812 | buf[off++] = uread(BSP_UART_COM2, RBR); |
---|
813 | } |
---|
814 | break; |
---|
815 | case RECEIVER_ERROR: |
---|
816 | /* RX error: eat character */ |
---|
817 | uartError(BSP_UART_COM2); |
---|
818 | break; |
---|
819 | default: |
---|
820 | /* Should not happen */ |
---|
821 | assert(0); |
---|
822 | return; |
---|
823 | } |
---|
824 | } |
---|
825 | } |
---|
826 | |
---|
827 | /* ================= GDB support ===================*/ |
---|
828 | int BSP_uart_dbgisr_com_regsav[4] __attribute__ ((unused)); |
---|
829 | |
---|
830 | /* |
---|
831 | * Interrupt service routine for COM1 - all, |
---|
832 | * it does it check whether ^C is received |
---|
833 | * if yes it will flip TF bit before returning |
---|
834 | * Note: it should be installed as raw interrupt |
---|
835 | * handler |
---|
836 | */ |
---|
837 | |
---|
838 | __asm__ (".p2align 4"); |
---|
839 | __asm__ (".text"); |
---|
840 | __asm__ (".globl BSP_uart_dbgisr_com1"); |
---|
841 | __asm__ ("BSP_uart_dbgisr_com1:"); |
---|
842 | __asm__ (" movl %eax, BSP_uart_dbgisr_com_regsav"); /* Save eax */ |
---|
843 | __asm__ (" movl %ebx, BSP_uart_dbgisr_com_regsav + 4"); /* Save ebx */ |
---|
844 | __asm__ (" movl %edx, BSP_uart_dbgisr_com_regsav + 8"); /* Save edx */ |
---|
845 | |
---|
846 | __asm__ (" movl $0, %ebx"); /* Clear flag */ |
---|
847 | |
---|
848 | /* |
---|
849 | * We know that only receive related interrupts |
---|
850 | * are available, eat chars |
---|
851 | */ |
---|
852 | __asm__ ("uart_dbgisr_com1_1:"); |
---|
853 | __asm__ (" movw $0x3FD, %dx"); |
---|
854 | __asm__ (" inb %dx, %al"); /* Read LSR */ |
---|
855 | __asm__ (" andb $1, %al"); |
---|
856 | __asm__ (" cmpb $0, %al"); |
---|
857 | __asm__ (" je uart_dbgisr_com1_2"); |
---|
858 | __asm__ (" movw $0x3F8, %dx"); |
---|
859 | __asm__ (" inb %dx, %al"); /* Get input character */ |
---|
860 | __asm__ (" cmpb $3, %al"); |
---|
861 | __asm__ (" jne uart_dbgisr_com1_1"); |
---|
862 | |
---|
863 | /* ^C received, set flag */ |
---|
864 | __asm__ (" movl $1, %ebx"); |
---|
865 | __asm__ (" jmp uart_dbgisr_com1_1"); |
---|
866 | |
---|
867 | /* All chars read */ |
---|
868 | __asm__ ("uart_dbgisr_com1_2:"); |
---|
869 | |
---|
870 | /* If flag is set we have to tweak TF */ |
---|
871 | __asm__ (" cmpl $0, %ebx"); |
---|
872 | __asm__ (" je uart_dbgisr_com1_3"); |
---|
873 | |
---|
874 | /* Flag is set */ |
---|
875 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+4, %ebx"); /* Restore ebx */ |
---|
876 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+8, %edx"); /* Restore edx */ |
---|
877 | |
---|
878 | /* Set TF bit */ |
---|
879 | __asm__ (" popl %eax"); /* Pop eip */ |
---|
880 | __asm__ (" movl %eax, BSP_uart_dbgisr_com_regsav + 4"); /* Save it */ |
---|
881 | __asm__ (" popl %eax"); /* Pop cs */ |
---|
882 | __asm__ (" movl %eax, BSP_uart_dbgisr_com_regsav + 8"); /* Save it */ |
---|
883 | __asm__ (" popl %eax"); /* Pop flags */ |
---|
884 | __asm__ (" orl $0x100, %eax"); /* Modify it */ |
---|
885 | __asm__ (" pushl %eax"); /* Push it back */ |
---|
886 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+8, %eax"); /* Put back cs */ |
---|
887 | __asm__ (" pushl %eax"); |
---|
888 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+4, %eax"); /* Put back eip */ |
---|
889 | __asm__ (" pushl %eax"); |
---|
890 | |
---|
891 | /* Acknowledge IRQ */ |
---|
892 | __asm__ (" movb $0x20, %al"); |
---|
893 | __asm__ (" outb %al, $0x20"); |
---|
894 | __asm__ (" movl BSP_uart_dbgisr_com_regsav, %eax"); /* Restore eax */ |
---|
895 | __asm__ (" iret"); /* Done */ |
---|
896 | |
---|
897 | /* Flag is not set */ |
---|
898 | __asm__ ("uart_dbgisr_com1_3:"); |
---|
899 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+4, %ebx"); /* Restore ebx */ |
---|
900 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+8, %edx"); /* Restore edx */ |
---|
901 | |
---|
902 | /* Acknowledge irq */ |
---|
903 | __asm__ (" movb $0x20, %al"); |
---|
904 | __asm__ (" outb %al, $0x20"); |
---|
905 | __asm__ (" movl BSP_uart_dbgisr_com_regsav, %eax"); /* Restore eax */ |
---|
906 | __asm__ (" iret"); /* Done */ |
---|
907 | |
---|
908 | /* |
---|
909 | * Interrupt service routine for COM2 - all, |
---|
910 | * it does it check whether ^C is received |
---|
911 | * if yes it will flip TF bit before returning |
---|
912 | * Note: it has to be installed as raw interrupt |
---|
913 | * handler |
---|
914 | */ |
---|
915 | __asm__ (".p2align 4"); |
---|
916 | __asm__ (".text"); |
---|
917 | __asm__ (".globl BSP_uart_dbgisr_com2"); |
---|
918 | __asm__ ("BSP_uart_dbgisr_com2:"); |
---|
919 | __asm__ (" movl %eax, BSP_uart_dbgisr_com_regsav"); /* Save eax */ |
---|
920 | __asm__ (" movl %ebx, BSP_uart_dbgisr_com_regsav + 4"); /* Save ebx */ |
---|
921 | __asm__ (" movl %edx, BSP_uart_dbgisr_com_regsav + 8"); /* Save edx */ |
---|
922 | |
---|
923 | __asm__ (" movl $0, %ebx"); /* Clear flag */ |
---|
924 | |
---|
925 | /* |
---|
926 | * We know that only receive related interrupts |
---|
927 | * are available, eat chars |
---|
928 | */ |
---|
929 | __asm__ ("uart_dbgisr_com2_1:"); |
---|
930 | __asm__ (" movw $0x2FD, %dx"); |
---|
931 | __asm__ (" inb %dx, %al"); /* Read LSR */ |
---|
932 | __asm__ (" andb $1, %al"); |
---|
933 | __asm__ (" cmpb $0, %al"); |
---|
934 | __asm__ (" je uart_dbgisr_com2_2"); |
---|
935 | __asm__ (" movw $0x2F8, %dx"); |
---|
936 | __asm__ (" inb %dx, %al"); /* Get input character */ |
---|
937 | __asm__ (" cmpb $3, %al"); |
---|
938 | __asm__ (" jne uart_dbgisr_com2_1"); |
---|
939 | |
---|
940 | /* ^C received, set flag */ |
---|
941 | __asm__ (" movl $1, %ebx"); |
---|
942 | __asm__ (" jmp uart_dbgisr_com2_1"); |
---|
943 | |
---|
944 | /* All chars read */ |
---|
945 | __asm__ ("uart_dbgisr_com2_2:"); |
---|
946 | |
---|
947 | /* If flag is set we have to tweak TF */ |
---|
948 | __asm__ (" cmpl $0, %ebx"); |
---|
949 | __asm__ (" je uart_dbgisr_com2_3"); |
---|
950 | |
---|
951 | /* Flag is set */ |
---|
952 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+4, %ebx"); /* Restore ebx */ |
---|
953 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+8, %edx"); /* Restore edx */ |
---|
954 | |
---|
955 | /* Set TF bit */ |
---|
956 | __asm__ (" popl %eax"); /* Pop eip */ |
---|
957 | __asm__ (" movl %eax, BSP_uart_dbgisr_com_regsav + 4"); /* Save it */ |
---|
958 | __asm__ (" popl %eax"); /* Pop cs */ |
---|
959 | __asm__ (" movl %eax, BSP_uart_dbgisr_com_regsav + 8"); /* Save it */ |
---|
960 | __asm__ (" popl %eax"); /* Pop flags */ |
---|
961 | __asm__ (" orl $0x100, %eax"); /* Modify it */ |
---|
962 | __asm__ (" pushl %eax"); /* Push it back */ |
---|
963 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+8, %eax"); /* Put back cs */ |
---|
964 | __asm__ (" pushl %eax"); |
---|
965 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+4, %eax"); /* Put back eip */ |
---|
966 | __asm__ (" pushl %eax"); |
---|
967 | |
---|
968 | /* Acknowledge IRQ */ |
---|
969 | __asm__ (" movb $0x20, %al"); |
---|
970 | __asm__ (" outb %al, $0x20"); |
---|
971 | __asm__ (" movl BSP_uart_dbgisr_com_regsav, %eax"); /* Restore eax */ |
---|
972 | __asm__ (" iret"); /* Done */ |
---|
973 | |
---|
974 | /* Flag is not set */ |
---|
975 | __asm__ ("uart_dbgisr_com2_3:"); |
---|
976 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+4, %ebx"); /* Restore ebx */ |
---|
977 | __asm__ (" movl BSP_uart_dbgisr_com_regsav+8, %edx"); /* Restore edx */ |
---|
978 | |
---|
979 | /* Acknowledge irq */ |
---|
980 | __asm__ (" movb $0x20, %al"); |
---|
981 | __asm__ (" outb %al, $0x20"); |
---|
982 | __asm__ (" movl BSP_uart_dbgisr_com_regsav, %eax"); /* Restore eax */ |
---|
983 | __asm__ (" iret"); /* Done */ |
---|