1 | /* |
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2 | * This software is Copyright (C) 1998 by T.sqware - all rights limited |
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3 | * It is provided in to the public domain "as is", can be freely modified |
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4 | * as far as this copyight notice is kept unchanged, but does not imply |
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5 | * an endorsement by T.sqware of the product in which it is included. |
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6 | * |
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7 | * $Id$ |
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8 | */ |
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9 | |
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10 | #include <bsp.h> |
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11 | #include <irq.h> |
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12 | #include <uart.h> |
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13 | #include <rtems/libio.h> |
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14 | #include <assert.h> |
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15 | |
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16 | /* |
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17 | * Basic 16552 driver |
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18 | */ |
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19 | |
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20 | struct uart_data |
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21 | { |
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22 | int hwFlow; |
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23 | unsigned long baud; |
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24 | unsigned long databits; |
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25 | unsigned long parity; |
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26 | unsigned long stopbits; |
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27 | }; |
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28 | |
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29 | static struct uart_data uart_data[2]; |
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30 | |
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31 | /* |
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32 | * Macros to read/write register of uart, if configuration is |
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33 | * different just rewrite these macros |
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34 | */ |
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35 | |
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36 | static inline unsigned char |
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37 | uread(int uart, unsigned int reg) |
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38 | { |
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39 | register unsigned char val; |
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40 | |
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41 | if (uart == 0) { |
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42 | inport_byte(COM1_BASE_IO+reg, val); |
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43 | } else { |
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44 | inport_byte(COM2_BASE_IO+reg, val); |
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45 | } |
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46 | |
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47 | return val; |
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48 | } |
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49 | |
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50 | static inline void |
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51 | uwrite(int uart, int reg, unsigned int val) |
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52 | { |
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53 | if (uart == 0) { |
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54 | outport_byte(COM1_BASE_IO+reg, val); |
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55 | } else { |
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56 | outport_byte(COM2_BASE_IO+reg, val); |
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57 | } |
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58 | } |
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59 | |
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60 | #ifdef UARTDEBUG |
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61 | static void |
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62 | uartError(int uart) |
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63 | { |
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64 | unsigned char uartStatus, dummy; |
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65 | |
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66 | uartStatus = uread(uart, LSR); |
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67 | dummy = uread(uart, RBR); |
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68 | |
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69 | if (uartStatus & OE) |
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70 | printk("********* Over run Error **********\n"); |
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71 | if (uartStatus & PE) |
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72 | printk("********* Parity Error **********\n"); |
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73 | if (uartStatus & FE) |
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74 | printk("********* Framing Error **********\n"); |
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75 | if (uartStatus & BI) |
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76 | printk("********* Parity Error **********\n"); |
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77 | if (uartStatus & ERFIFO) |
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78 | printk("********* Error receive Fifo **********\n"); |
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79 | |
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80 | } |
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81 | #else |
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82 | inline void uartError(int uart) |
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83 | { |
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84 | unsigned char uartStatus; |
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85 | |
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86 | uartStatus = uread(uart, LSR); |
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87 | uartStatus = uread(uart, RBR); |
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88 | } |
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89 | #endif |
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90 | |
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91 | /* |
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92 | * Uart initialization, it is hardcoded to 8 bit, no parity, |
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93 | * one stop bit, FIFO, things to be changed |
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94 | * are baud rate and nad hw flow control, |
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95 | * and longest rx fifo setting |
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96 | */ |
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97 | void |
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98 | BSP_uart_init |
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99 | ( |
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100 | int uart, |
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101 | unsigned long baud, |
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102 | unsigned long databits, |
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103 | unsigned long parity, |
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104 | unsigned long stopbits, |
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105 | int hwFlow |
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106 | ) |
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107 | { |
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108 | unsigned char tmp; |
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109 | |
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110 | /* Sanity check */ |
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111 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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112 | |
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113 | switch(baud) |
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114 | { |
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115 | case 50: |
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116 | case 75: |
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117 | case 110: |
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118 | case 134: |
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119 | case 300: |
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120 | case 600: |
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121 | case 1200: |
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122 | case 2400: |
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123 | case 9600: |
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124 | case 19200: |
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125 | case 38400: |
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126 | case 57600: |
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127 | case 115200: |
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128 | break; |
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129 | default: |
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130 | assert(0); |
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131 | return; |
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132 | } |
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133 | |
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134 | /* Set DLAB bit to 1 */ |
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135 | uwrite(uart, LCR, DLAB); |
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136 | |
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137 | /* Set baud rate */ |
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138 | uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); |
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139 | uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); |
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140 | |
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141 | /* 8-bit, no parity , 1 stop */ |
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142 | uwrite(uart, LCR, databits | parity | stopbits); |
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143 | |
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144 | |
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145 | /* Set DTR, RTS and OUT2 high */ |
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146 | uwrite(uart, MCR, DTR | RTS | OUT_2); |
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147 | |
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148 | /* Enable FIFO */ |
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149 | uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); |
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150 | |
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151 | /* Disable Interrupts */ |
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152 | uwrite(uart, IER, 0); |
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153 | |
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154 | /* Read status to clear them */ |
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155 | tmp = uread(uart, LSR); |
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156 | tmp = uread(uart, RBR); |
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157 | tmp = uread(uart, MSR); |
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158 | |
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159 | /* Remember state */ |
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160 | uart_data[uart].hwFlow = hwFlow; |
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161 | uart_data[uart].baud = baud; |
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162 | return; |
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163 | } |
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164 | |
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165 | /* |
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166 | * Set baud |
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167 | */ |
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168 | void |
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169 | BSP_uart_set_attributes |
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170 | ( |
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171 | int uart, |
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172 | unsigned long baud, |
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173 | unsigned long databits, |
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174 | unsigned long parity, |
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175 | unsigned long stopbits |
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176 | ) |
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177 | { |
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178 | unsigned char mcr, ier; |
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179 | |
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180 | /* Sanity check */ |
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181 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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182 | |
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183 | /* |
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184 | * This function may be called whenever TERMIOS parameters |
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185 | * are changed, so we have to make sure that baud change is |
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186 | * indeed required |
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187 | */ |
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188 | |
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189 | if( (baud == uart_data[uart].baud) && |
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190 | (databits == uart_data[uart].databits) && |
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191 | (parity == uart_data[uart].parity) && |
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192 | (stopbits == uart_data[uart].stopbits) ) |
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193 | { |
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194 | return; |
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195 | } |
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196 | |
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197 | mcr = uread(uart, MCR); |
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198 | ier = uread(uart, IER); |
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199 | |
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200 | BSP_uart_init(uart, baud, databits, parity, stopbits, uart_data[uart].hwFlow); |
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201 | |
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202 | uwrite(uart, MCR, mcr); |
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203 | uwrite(uart, IER, ier); |
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204 | |
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205 | return; |
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206 | } |
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207 | |
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208 | /* |
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209 | * Enable/disable interrupts |
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210 | */ |
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211 | void |
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212 | BSP_uart_intr_ctrl(int uart, int cmd) |
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213 | { |
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214 | |
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215 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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216 | |
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217 | switch(cmd) |
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218 | { |
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219 | case BSP_UART_INTR_CTRL_DISABLE: |
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220 | uwrite(uart, IER, INTERRUPT_DISABLE); |
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221 | break; |
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222 | case BSP_UART_INTR_CTRL_ENABLE: |
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223 | if(uart_data[uart].hwFlow) |
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224 | { |
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225 | uwrite(uart, IER, |
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226 | (RECEIVE_ENABLE | |
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227 | TRANSMIT_ENABLE | |
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228 | RECEIVER_LINE_ST_ENABLE | |
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229 | MODEM_ENABLE |
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230 | ) |
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231 | ); |
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232 | } |
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233 | else |
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234 | { |
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235 | uwrite(uart, IER, |
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236 | (RECEIVE_ENABLE | |
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237 | TRANSMIT_ENABLE | |
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238 | RECEIVER_LINE_ST_ENABLE |
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239 | ) |
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240 | ); |
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241 | } |
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242 | break; |
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243 | case BSP_UART_INTR_CTRL_TERMIOS: |
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244 | if(uart_data[uart].hwFlow) |
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245 | { |
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246 | uwrite(uart, IER, |
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247 | (RECEIVE_ENABLE | |
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248 | RECEIVER_LINE_ST_ENABLE | |
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249 | MODEM_ENABLE |
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250 | ) |
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251 | ); |
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252 | } |
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253 | else |
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254 | { |
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255 | uwrite(uart, IER, |
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256 | (RECEIVE_ENABLE | |
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257 | RECEIVER_LINE_ST_ENABLE |
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258 | ) |
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259 | ); |
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260 | } |
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261 | break; |
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262 | case BSP_UART_INTR_CTRL_GDB: |
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263 | uwrite(uart, IER, RECEIVE_ENABLE); |
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264 | break; |
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265 | default: |
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266 | assert(0); |
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267 | break; |
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268 | } |
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269 | |
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270 | return; |
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271 | } |
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272 | |
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273 | void |
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274 | BSP_uart_throttle(int uart) |
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275 | { |
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276 | unsigned int mcr; |
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277 | |
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278 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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279 | |
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280 | if(!uart_data[uart].hwFlow) |
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281 | { |
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282 | /* Should not happen */ |
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283 | assert(0); |
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284 | return; |
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285 | } |
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286 | mcr = uread (uart, MCR); |
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287 | /* RTS down */ |
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288 | mcr &= ~RTS; |
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289 | uwrite(uart, MCR, mcr); |
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290 | |
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291 | return; |
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292 | } |
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293 | |
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294 | void |
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295 | BSP_uart_unthrottle(int uart) |
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296 | { |
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297 | unsigned int mcr; |
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298 | |
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299 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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300 | |
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301 | if(!uart_data[uart].hwFlow) |
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302 | { |
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303 | /* Should not happen */ |
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304 | assert(0); |
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305 | return; |
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306 | } |
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307 | mcr = uread (uart, MCR); |
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308 | /* RTS up */ |
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309 | mcr |= RTS; |
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310 | uwrite(uart, MCR, mcr); |
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311 | |
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312 | return; |
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313 | } |
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314 | |
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315 | /* |
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316 | * Status function, -1 if error |
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317 | * detected, 0 if no received chars available, |
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318 | * 1 if received char available, 2 if break |
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319 | * is detected, it will eat break and error |
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320 | * chars. It ignores overruns - we cannot do |
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321 | * anything about - it execpt count statistics |
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322 | * and we are not counting it. |
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323 | */ |
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324 | int |
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325 | BSP_uart_polled_status(int uart) |
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326 | { |
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327 | unsigned char val; |
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328 | |
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329 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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330 | |
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331 | val = uread(uart, LSR); |
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332 | |
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333 | if(val & BI) |
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334 | { |
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335 | /* BREAK found, eat character */ |
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336 | uread(uart, RBR); |
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337 | return BSP_UART_STATUS_BREAK; |
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338 | } |
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339 | |
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340 | if((val & (DR | OE | FE)) == 1) |
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341 | { |
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342 | /* No error, character present */ |
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343 | return BSP_UART_STATUS_CHAR; |
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344 | } |
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345 | |
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346 | if((val & (DR | OE | FE)) == 0) |
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347 | { |
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348 | /* Nothing */ |
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349 | return BSP_UART_STATUS_NOCHAR; |
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350 | } |
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351 | |
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352 | /* |
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353 | * Framing or parity error |
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354 | * eat character |
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355 | */ |
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356 | uread(uart, RBR); |
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357 | |
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358 | return BSP_UART_STATUS_ERROR; |
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359 | } |
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360 | |
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361 | |
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362 | /* |
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363 | * Polled mode write function |
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364 | */ |
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365 | void |
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366 | BSP_uart_polled_write(int uart, int val) |
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367 | { |
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368 | unsigned char val1; |
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369 | |
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370 | /* Sanity check */ |
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371 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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372 | |
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373 | for(;;) |
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374 | { |
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375 | if((val1=uread(uart, LSR)) & THRE) |
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376 | { |
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377 | break; |
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378 | } |
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379 | } |
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380 | |
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381 | if(uart_data[uart].hwFlow) |
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382 | { |
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383 | for(;;) |
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384 | { |
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385 | if(uread(uart, MSR) & CTS) |
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386 | { |
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387 | break; |
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388 | } |
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389 | } |
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390 | } |
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391 | |
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392 | uwrite(uart, THR, val & 0xff); |
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393 | |
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394 | return; |
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395 | } |
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396 | |
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397 | void |
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398 | BSP_output_char_via_serial(int val) |
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399 | { |
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400 | BSP_uart_polled_write(BSPConsolePort, val); |
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401 | if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r'); |
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402 | } |
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403 | |
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404 | /* |
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405 | * Polled mode read function |
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406 | */ |
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407 | int |
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408 | BSP_uart_polled_read(int uart) |
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409 | { |
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410 | unsigned char val; |
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411 | |
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412 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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413 | |
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414 | for(;;) |
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415 | { |
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416 | if(uread(uart, LSR) & DR) |
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417 | { |
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418 | break; |
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419 | } |
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420 | } |
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421 | |
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422 | val = uread(uart, RBR); |
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423 | |
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424 | return (int)(val & 0xff); |
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425 | } |
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426 | |
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427 | unsigned |
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428 | BSP_poll_char_via_serial() |
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429 | { |
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430 | return BSP_uart_polled_read(BSPConsolePort); |
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431 | } |
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432 | |
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433 | |
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434 | /* ================ Termios support =================*/ |
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435 | |
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436 | static volatile int termios_stopped_com1 = 0; |
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437 | static volatile int termios_tx_active_com1 = 0; |
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438 | static void* termios_ttyp_com1 = NULL; |
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439 | static char termios_tx_hold_com1 = 0; |
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440 | static volatile char termios_tx_hold_valid_com1 = 0; |
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441 | |
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442 | static volatile int termios_stopped_com2 = 0; |
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443 | static volatile int termios_tx_active_com2 = 0; |
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444 | static void* termios_ttyp_com2 = NULL; |
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445 | static char termios_tx_hold_com2 = 0; |
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446 | static volatile char termios_tx_hold_valid_com2 = 0; |
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447 | |
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448 | static void ( *driver_input_handler_com1 )( void *, char *, int ) = 0; |
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449 | static void ( *driver_input_handler_com2 )( void *, char *, int ) = 0; |
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450 | |
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451 | /* |
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452 | * This routine sets the handler to handle the characters received |
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453 | * from the serial port. |
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454 | */ |
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455 | void uart_set_driver_handler( int port, void ( *handler )( void *, char *, int ) ) |
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456 | { |
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457 | switch( port ) |
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458 | { |
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459 | case BSP_UART_COM1: |
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460 | driver_input_handler_com1 = handler; |
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461 | break; |
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462 | |
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463 | case BSP_UART_COM2: |
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464 | driver_input_handler_com2 = handler; |
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465 | break; |
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466 | } |
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467 | } |
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468 | |
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469 | |
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470 | /* |
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471 | * Set channel parameters |
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472 | */ |
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473 | void |
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474 | BSP_uart_termios_set(int uart, void *ttyp) |
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475 | { |
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476 | unsigned char val; |
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477 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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478 | |
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479 | if(uart == BSP_UART_COM1) |
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480 | { |
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481 | if(uart_data[uart].hwFlow) |
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482 | { |
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483 | val = uread(uart, MSR); |
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484 | |
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485 | termios_stopped_com1 = (val & CTS) ? 0 : 1; |
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486 | } |
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487 | else |
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488 | { |
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489 | termios_stopped_com1 = 0; |
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490 | } |
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491 | termios_tx_active_com1 = 0; |
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492 | termios_ttyp_com1 = ttyp; |
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493 | termios_tx_hold_com1 = 0; |
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494 | termios_tx_hold_valid_com1 = 0; |
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495 | } |
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496 | else |
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497 | { |
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498 | if(uart_data[uart].hwFlow) |
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499 | { |
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500 | val = uread(uart, MSR); |
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501 | |
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502 | termios_stopped_com2 = (val & CTS) ? 0 : 1; |
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503 | } |
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504 | else |
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505 | { |
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506 | termios_stopped_com2 = 0; |
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507 | } |
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508 | termios_tx_active_com2 = 0; |
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509 | termios_ttyp_com2 = ttyp; |
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510 | termios_tx_hold_com2 = 0; |
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511 | termios_tx_hold_valid_com2 = 0; |
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512 | } |
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513 | |
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514 | return; |
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515 | } |
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516 | |
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517 | int |
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518 | BSP_uart_termios_write_com1(int minor, const char *buf, int len) |
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519 | { |
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520 | assert(buf != NULL); |
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521 | |
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522 | if(len <= 0) |
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523 | { |
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524 | return 0; |
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525 | } |
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526 | |
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527 | /* If there TX buffer is busy - something is royally screwed up */ |
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528 | assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); |
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529 | |
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530 | if(termios_stopped_com1) |
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531 | { |
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532 | /* CTS low */ |
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533 | termios_tx_hold_com1 = *buf; |
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534 | termios_tx_hold_valid_com1 = 1; |
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535 | return 0; |
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536 | } |
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537 | |
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538 | /* Write character */ |
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539 | uwrite(BSP_UART_COM1, THR, *buf & 0xff); |
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540 | |
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541 | /* Enable interrupts if necessary */ |
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542 | if(!termios_tx_active_com1 && uart_data[BSP_UART_COM1].hwFlow) |
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543 | { |
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544 | termios_tx_active_com1 = 1; |
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545 | uwrite(BSP_UART_COM1, IER, |
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546 | (RECEIVE_ENABLE | |
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547 | TRANSMIT_ENABLE | |
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548 | RECEIVER_LINE_ST_ENABLE | |
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549 | MODEM_ENABLE |
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550 | ) |
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551 | ); |
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552 | } |
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553 | else if(!termios_tx_active_com1) |
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554 | { |
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555 | termios_tx_active_com1 = 1; |
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556 | uwrite(BSP_UART_COM1, IER, |
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557 | (RECEIVE_ENABLE | |
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558 | TRANSMIT_ENABLE | |
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559 | RECEIVER_LINE_ST_ENABLE |
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560 | ) |
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561 | ); |
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562 | } |
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563 | |
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564 | return 0; |
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565 | } |
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566 | |
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567 | int |
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568 | BSP_uart_termios_write_com2(int minor, const char *buf, int len) |
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569 | { |
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570 | assert(buf != NULL); |
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571 | |
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572 | if(len <= 0) |
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573 | { |
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574 | return 0; |
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575 | } |
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576 | |
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577 | |
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578 | /* If there TX buffer is busy - something is royally screwed up */ |
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579 | assert((uread(BSP_UART_COM2, LSR) & THRE) != 0); |
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580 | |
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581 | if(termios_stopped_com2) |
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582 | { |
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583 | /* CTS low */ |
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584 | termios_tx_hold_com2 = *buf; |
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585 | termios_tx_hold_valid_com2 = 1; |
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586 | return 0; |
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587 | } |
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588 | |
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589 | /* Write character */ |
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590 | |
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591 | uwrite(BSP_UART_COM2, THR, *buf & 0xff); |
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592 | |
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593 | /* Enable interrupts if necessary */ |
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594 | if(!termios_tx_active_com2 && uart_data[BSP_UART_COM2].hwFlow) |
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595 | { |
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596 | termios_tx_active_com2 = 1; |
---|
597 | uwrite(BSP_UART_COM2, IER, |
---|
598 | (RECEIVE_ENABLE | |
---|
599 | TRANSMIT_ENABLE | |
---|
600 | RECEIVER_LINE_ST_ENABLE | |
---|
601 | MODEM_ENABLE |
---|
602 | ) |
---|
603 | ); |
---|
604 | } |
---|
605 | else if(!termios_tx_active_com2) |
---|
606 | { |
---|
607 | termios_tx_active_com2 = 1; |
---|
608 | uwrite(BSP_UART_COM2, IER, |
---|
609 | (RECEIVE_ENABLE | |
---|
610 | TRANSMIT_ENABLE | |
---|
611 | RECEIVER_LINE_ST_ENABLE |
---|
612 | ) |
---|
613 | ); |
---|
614 | } |
---|
615 | |
---|
616 | return 0; |
---|
617 | } |
---|
618 | |
---|
619 | |
---|
620 | void |
---|
621 | BSP_uart_termios_isr_com1(void) |
---|
622 | { |
---|
623 | unsigned char buf[40]; |
---|
624 | unsigned char val; |
---|
625 | int off, ret, vect; |
---|
626 | |
---|
627 | off = 0; |
---|
628 | |
---|
629 | for(;;) |
---|
630 | { |
---|
631 | vect = uread(BSP_UART_COM1, IIR) & 0xf; |
---|
632 | |
---|
633 | switch(vect) |
---|
634 | { |
---|
635 | case MODEM_STATUS : |
---|
636 | val = uread(BSP_UART_COM1, MSR); |
---|
637 | if(uart_data[BSP_UART_COM1].hwFlow) |
---|
638 | { |
---|
639 | if(val & CTS) |
---|
640 | { |
---|
641 | /* CTS high */ |
---|
642 | termios_stopped_com1 = 0; |
---|
643 | if(termios_tx_hold_valid_com1) |
---|
644 | { |
---|
645 | termios_tx_hold_valid_com1 = 0; |
---|
646 | BSP_uart_termios_write_com1(0, &termios_tx_hold_com1, |
---|
647 | 1); |
---|
648 | } |
---|
649 | } |
---|
650 | else |
---|
651 | { |
---|
652 | /* CTS low */ |
---|
653 | termios_stopped_com1 = 1; |
---|
654 | } |
---|
655 | } |
---|
656 | break; |
---|
657 | case NO_MORE_INTR : |
---|
658 | /* No more interrupts */ |
---|
659 | if(off != 0) |
---|
660 | { |
---|
661 | /* Update rx buffer */ |
---|
662 | if( driver_input_handler_com1 ) |
---|
663 | { |
---|
664 | driver_input_handler_com1( termios_ttyp_com1, (char *)buf, off ); |
---|
665 | } |
---|
666 | else |
---|
667 | { |
---|
668 | /* Update rx buffer */ |
---|
669 | rtems_termios_enqueue_raw_characters(termios_ttyp_com1, (char *)buf, off ); |
---|
670 | } |
---|
671 | } |
---|
672 | return; |
---|
673 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
674 | /* |
---|
675 | * TX holding empty: we have to disable these interrupts |
---|
676 | * if there is nothing more to send. |
---|
677 | */ |
---|
678 | |
---|
679 | ret = rtems_termios_dequeue_characters(termios_ttyp_com1, 1); |
---|
680 | |
---|
681 | /* If nothing else to send disable interrupts */ |
---|
682 | if(ret == 0 && uart_data[BSP_UART_COM1].hwFlow) |
---|
683 | { |
---|
684 | uwrite(BSP_UART_COM1, IER, |
---|
685 | (RECEIVE_ENABLE | |
---|
686 | RECEIVER_LINE_ST_ENABLE | |
---|
687 | MODEM_ENABLE |
---|
688 | ) |
---|
689 | ); |
---|
690 | termios_tx_active_com1 = 0; |
---|
691 | } |
---|
692 | else if(ret == 0) |
---|
693 | { |
---|
694 | uwrite(BSP_UART_COM1, IER, |
---|
695 | (RECEIVE_ENABLE | |
---|
696 | RECEIVER_LINE_ST_ENABLE |
---|
697 | ) |
---|
698 | ); |
---|
699 | termios_tx_active_com1 = 0; |
---|
700 | } |
---|
701 | break; |
---|
702 | case RECEIVER_DATA_AVAIL : |
---|
703 | case CHARACTER_TIMEOUT_INDICATION: |
---|
704 | /* RX data ready */ |
---|
705 | assert(off < sizeof(buf)); |
---|
706 | buf[off++] = uread(BSP_UART_COM1, RBR); |
---|
707 | break; |
---|
708 | case RECEIVER_ERROR: |
---|
709 | /* RX error: eat character */ |
---|
710 | uartError(BSP_UART_COM1); |
---|
711 | break; |
---|
712 | default: |
---|
713 | /* Should not happen */ |
---|
714 | assert(0); |
---|
715 | return; |
---|
716 | } |
---|
717 | } |
---|
718 | } |
---|
719 | |
---|
720 | void |
---|
721 | BSP_uart_termios_isr_com2() |
---|
722 | { |
---|
723 | unsigned char buf[40]; |
---|
724 | unsigned char val; |
---|
725 | int off, ret, vect; |
---|
726 | |
---|
727 | off = 0; |
---|
728 | |
---|
729 | for(;;) |
---|
730 | { |
---|
731 | vect = uread(BSP_UART_COM2, IIR) & 0xf; |
---|
732 | |
---|
733 | switch(vect) |
---|
734 | { |
---|
735 | case MODEM_STATUS : |
---|
736 | val = uread(BSP_UART_COM2, MSR); |
---|
737 | if(uart_data[BSP_UART_COM2].hwFlow) |
---|
738 | { |
---|
739 | if(val & CTS) |
---|
740 | { |
---|
741 | /* CTS high */ |
---|
742 | termios_stopped_com2 = 0; |
---|
743 | if(termios_tx_hold_valid_com2) |
---|
744 | { |
---|
745 | termios_tx_hold_valid_com2 = 0; |
---|
746 | BSP_uart_termios_write_com2(0, &termios_tx_hold_com2, |
---|
747 | 1); |
---|
748 | } |
---|
749 | } |
---|
750 | else |
---|
751 | { |
---|
752 | /* CTS low */ |
---|
753 | termios_stopped_com2 = 1; |
---|
754 | } |
---|
755 | } |
---|
756 | break; |
---|
757 | case NO_MORE_INTR : |
---|
758 | /* No more interrupts */ |
---|
759 | if(off != 0) |
---|
760 | { |
---|
761 | /* Update rx buffer */ |
---|
762 | if( driver_input_handler_com2 ) |
---|
763 | { |
---|
764 | driver_input_handler_com2( termios_ttyp_com2, (char *)buf, off ); |
---|
765 | } |
---|
766 | else |
---|
767 | { |
---|
768 | rtems_termios_enqueue_raw_characters(termios_ttyp_com2, (char *)buf, off); |
---|
769 | } |
---|
770 | } |
---|
771 | return; |
---|
772 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
773 | /* |
---|
774 | * TX holding empty: we have to disable these interrupts |
---|
775 | * if there is nothing more to send. |
---|
776 | */ |
---|
777 | |
---|
778 | ret = rtems_termios_dequeue_characters(termios_ttyp_com2, 1); |
---|
779 | |
---|
780 | /* If nothing else to send disable interrupts */ |
---|
781 | if(ret == 0 && uart_data[BSP_UART_COM2].hwFlow) |
---|
782 | { |
---|
783 | uwrite(BSP_UART_COM2, IER, |
---|
784 | (RECEIVE_ENABLE | |
---|
785 | RECEIVER_LINE_ST_ENABLE | |
---|
786 | MODEM_ENABLE |
---|
787 | ) |
---|
788 | ); |
---|
789 | termios_tx_active_com2 = 0; |
---|
790 | } |
---|
791 | else if(ret == 0) |
---|
792 | { |
---|
793 | uwrite(BSP_UART_COM2, IER, |
---|
794 | (RECEIVE_ENABLE | |
---|
795 | RECEIVER_LINE_ST_ENABLE |
---|
796 | ) |
---|
797 | ); |
---|
798 | termios_tx_active_com2 = 0; |
---|
799 | } |
---|
800 | break; |
---|
801 | case RECEIVER_DATA_AVAIL : |
---|
802 | case CHARACTER_TIMEOUT_INDICATION: |
---|
803 | /* RX data ready */ |
---|
804 | assert(off < sizeof(buf)); |
---|
805 | buf[off++] = uread(BSP_UART_COM2, RBR); |
---|
806 | break; |
---|
807 | case RECEIVER_ERROR: |
---|
808 | /* RX error: eat character */ |
---|
809 | uartError(BSP_UART_COM2); |
---|
810 | break; |
---|
811 | default: |
---|
812 | /* Should not happen */ |
---|
813 | assert(0); |
---|
814 | return; |
---|
815 | } |
---|
816 | } |
---|
817 | } |
---|
818 | |
---|
819 | |
---|
820 | /* ================= GDB support ===================*/ |
---|
821 | static int sav[4] __attribute__ ((unused)); |
---|
822 | |
---|
823 | /* |
---|
824 | * Interrupt service routine for COM1 - all, |
---|
825 | * it does it check whether ^C is received |
---|
826 | * if yes it will flip TF bit before returning |
---|
827 | * Note: it should be installed as raw interrupt |
---|
828 | * handler |
---|
829 | */ |
---|
830 | |
---|
831 | asm (".p2align 4"); |
---|
832 | asm (".text"); |
---|
833 | asm (".globl BSP_uart_dbgisr_com1"); |
---|
834 | asm ("BSP_uart_dbgisr_com1:"); |
---|
835 | asm (" movl %eax, sav"); /* Save eax */ |
---|
836 | asm (" movl %ebx, sav + 4"); /* Save ebx */ |
---|
837 | asm (" movl %edx, sav + 8"); /* Save edx */ |
---|
838 | |
---|
839 | asm (" movl $0, %ebx"); /* Clear flag */ |
---|
840 | |
---|
841 | /* |
---|
842 | * We know that only receive related interrupts |
---|
843 | * are available, eat chars |
---|
844 | */ |
---|
845 | asm ("uart_dbgisr_com1_1:"); |
---|
846 | asm (" movw $0x3FD, %dx"); |
---|
847 | asm (" inb %dx, %al"); /* Read LSR */ |
---|
848 | asm (" andb $1, %al"); |
---|
849 | asm (" cmpb $0, %al"); |
---|
850 | asm (" je uart_dbgisr_com1_2"); |
---|
851 | asm (" movw $0x3F8, %dx"); |
---|
852 | asm (" inb %dx, %al"); /* Get input character */ |
---|
853 | asm (" cmpb $3, %al"); |
---|
854 | asm (" jne uart_dbgisr_com1_1"); |
---|
855 | |
---|
856 | /* ^C received, set flag */ |
---|
857 | asm (" movl $1, %ebx"); |
---|
858 | asm (" jmp uart_dbgisr_com1_1"); |
---|
859 | |
---|
860 | /* All chars read */ |
---|
861 | asm ("uart_dbgisr_com1_2:"); |
---|
862 | |
---|
863 | /* If flag is set we have to tweak TF */ |
---|
864 | asm (" cmpl $0, %ebx"); |
---|
865 | asm (" je uart_dbgisr_com1_3"); |
---|
866 | |
---|
867 | /* Flag is set */ |
---|
868 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
869 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
870 | |
---|
871 | /* Set TF bit */ |
---|
872 | asm (" popl %eax"); /* Pop eip */ |
---|
873 | asm (" movl %eax, sav + 4"); /* Save it */ |
---|
874 | asm (" popl %eax"); /* Pop cs */ |
---|
875 | asm (" movl %eax, sav + 8"); /* Save it */ |
---|
876 | asm (" popl %eax"); /* Pop flags */ |
---|
877 | asm (" orl $0x100, %eax"); /* Modify it */ |
---|
878 | asm (" pushl %eax"); /* Push it back */ |
---|
879 | asm (" movl sav+8, %eax"); /* Put back cs */ |
---|
880 | asm (" pushl %eax"); |
---|
881 | asm (" movl sav+4, %eax"); /* Put back eip */ |
---|
882 | asm (" pushl %eax"); |
---|
883 | |
---|
884 | /* Acknowledge IRQ */ |
---|
885 | asm (" movb $0x20, %al"); |
---|
886 | asm (" outb %al, $0x20"); |
---|
887 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
888 | asm (" iret"); /* Done */ |
---|
889 | |
---|
890 | /* Flag is not set */ |
---|
891 | asm("uart_dbgisr_com1_3:"); |
---|
892 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
893 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
894 | |
---|
895 | /* Acknowledge irq */ |
---|
896 | asm (" movb $0x20, %al"); |
---|
897 | asm (" outb %al, $0x20"); |
---|
898 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
899 | asm (" iret"); /* Done */ |
---|
900 | |
---|
901 | |
---|
902 | /* |
---|
903 | * Interrupt service routine for COM2 - all, |
---|
904 | * it does it check whether ^C is received |
---|
905 | * if yes it will flip TF bit before returning |
---|
906 | * Note: it has to be installed as raw interrupt |
---|
907 | * handler |
---|
908 | */ |
---|
909 | asm (".p2align 4"); |
---|
910 | asm (".text"); |
---|
911 | asm (".globl BSP_uart_dbgisr_com2"); |
---|
912 | asm ("BSP_uart_dbgisr_com2:"); |
---|
913 | asm (" movl %eax, sav"); /* Save eax */ |
---|
914 | asm (" movl %ebx, sav + 4"); /* Save ebx */ |
---|
915 | asm (" movl %edx, sav + 8"); /* Save edx */ |
---|
916 | |
---|
917 | asm (" movl $0, %ebx"); /* Clear flag */ |
---|
918 | |
---|
919 | /* |
---|
920 | * We know that only receive related interrupts |
---|
921 | * are available, eat chars |
---|
922 | */ |
---|
923 | asm ("uart_dbgisr_com2_1:"); |
---|
924 | asm (" movw $0x2FD, %dx"); |
---|
925 | asm (" inb %dx, %al"); /* Read LSR */ |
---|
926 | asm (" andb $1, %al"); |
---|
927 | asm (" cmpb $0, %al"); |
---|
928 | asm (" je uart_dbgisr_com2_2"); |
---|
929 | asm (" movw $0x2F8, %dx"); |
---|
930 | asm (" inb %dx, %al"); /* Get input character */ |
---|
931 | asm (" cmpb $3, %al"); |
---|
932 | asm (" jne uart_dbgisr_com2_1"); |
---|
933 | |
---|
934 | /* ^C received, set flag */ |
---|
935 | asm (" movl $1, %ebx"); |
---|
936 | asm (" jmp uart_dbgisr_com2_1"); |
---|
937 | |
---|
938 | /* All chars read */ |
---|
939 | asm ("uart_dbgisr_com2_2:"); |
---|
940 | |
---|
941 | /* If flag is set we have to tweak TF */ |
---|
942 | asm (" cmpl $0, %ebx"); |
---|
943 | asm (" je uart_dbgisr_com2_3"); |
---|
944 | |
---|
945 | /* Flag is set */ |
---|
946 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
947 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
948 | |
---|
949 | /* Set TF bit */ |
---|
950 | asm (" popl %eax"); /* Pop eip */ |
---|
951 | asm (" movl %eax, sav + 4"); /* Save it */ |
---|
952 | asm (" popl %eax"); /* Pop cs */ |
---|
953 | asm (" movl %eax, sav + 8"); /* Save it */ |
---|
954 | asm (" popl %eax"); /* Pop flags */ |
---|
955 | asm (" orl $0x100, %eax"); /* Modify it */ |
---|
956 | asm (" pushl %eax"); /* Push it back */ |
---|
957 | asm (" movl sav+8, %eax"); /* Put back cs */ |
---|
958 | asm (" pushl %eax"); |
---|
959 | asm (" movl sav+4, %eax"); /* Put back eip */ |
---|
960 | asm (" pushl %eax"); |
---|
961 | |
---|
962 | /* Acknowledge IRQ */ |
---|
963 | asm (" movb $0x20, %al"); |
---|
964 | asm (" outb %al, $0x20"); |
---|
965 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
966 | asm (" iret"); /* Done */ |
---|
967 | |
---|
968 | /* Flag is not set */ |
---|
969 | asm("uart_dbgisr_com2_3:"); |
---|
970 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
971 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
972 | |
---|
973 | /* Acknowledge irq */ |
---|
974 | asm (" movb $0x20, %al"); |
---|
975 | asm (" outb %al, $0x20"); |
---|
976 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
977 | asm (" iret"); /* Done */ |
---|
978 | |
---|
979 | |
---|
980 | |
---|
981 | |
---|
982 | |
---|
983 | |
---|