[0ebbf66] | 1 | /* |
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| 2 | * This software is Copyright (C) 1998 by T.sqware - all rights limited |
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| 3 | * It is provided in to the public domain "as is", can be freely modified |
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| 4 | * as far as this copyight notice is kept unchanged, but does not imply |
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| 5 | * an endorsement by T.sqware of the product in which it is included. |
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| 6 | * |
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| 7 | * $Id$ |
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| 8 | */ |
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| 9 | |
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[caeb33b2] | 10 | #include <stdio.h> |
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[0ebbf66] | 11 | #include <bsp.h> |
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| 12 | #include <irq.h> |
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| 13 | #include <uart.h> |
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| 14 | #include <rtems/libio.h> |
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[caeb33b2] | 15 | #include <rtems/termiostypes.h> |
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| 16 | #include <termios.h> |
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[0ebbf66] | 17 | #include <assert.h> |
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| 18 | |
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| 19 | /* |
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| 20 | * Basic 16552 driver |
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| 21 | */ |
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| 22 | |
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| 23 | struct uart_data |
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| 24 | { |
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[caeb33b2] | 25 | int ioMode; |
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[0ebbf66] | 26 | int hwFlow; |
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[caeb33b2] | 27 | unsigned int ier; |
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[8ad5399] | 28 | unsigned long baud; |
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| 29 | unsigned long databits; |
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| 30 | unsigned long parity; |
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| 31 | unsigned long stopbits; |
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[0ebbf66] | 32 | }; |
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| 33 | |
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| 34 | static struct uart_data uart_data[2]; |
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| 35 | |
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| 36 | /* |
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[bc8781d] | 37 | * Macros to read/write register of uart, if configuration is |
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[0ebbf66] | 38 | * different just rewrite these macros |
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| 39 | */ |
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| 40 | |
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| 41 | static inline unsigned char |
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| 42 | uread(int uart, unsigned int reg) |
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| 43 | { |
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| 44 | register unsigned char val; |
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| 45 | |
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[da8ae79b] | 46 | if (uart == 0) { |
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| 47 | inport_byte(COM1_BASE_IO+reg, val); |
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| 48 | } else { |
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| 49 | inport_byte(COM2_BASE_IO+reg, val); |
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| 50 | } |
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[0ebbf66] | 51 | |
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| 52 | return val; |
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| 53 | } |
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| 54 | |
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| 55 | static inline void |
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| 56 | uwrite(int uart, int reg, unsigned int val) |
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| 57 | { |
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[da8ae79b] | 58 | if (uart == 0) { |
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| 59 | outport_byte(COM1_BASE_IO+reg, val); |
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| 60 | } else { |
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| 61 | outport_byte(COM2_BASE_IO+reg, val); |
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| 62 | } |
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[0ebbf66] | 63 | } |
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| 64 | |
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| 65 | #ifdef UARTDEBUG |
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| 66 | static void |
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| 67 | uartError(int uart) |
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| 68 | { |
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| 69 | unsigned char uartStatus, dummy; |
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| 70 | |
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| 71 | uartStatus = uread(uart, LSR); |
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| 72 | dummy = uread(uart, RBR); |
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| 73 | |
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| 74 | if (uartStatus & OE) |
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| 75 | printk("********* Over run Error **********\n"); |
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| 76 | if (uartStatus & PE) |
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| 77 | printk("********* Parity Error **********\n"); |
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| 78 | if (uartStatus & FE) |
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| 79 | printk("********* Framing Error **********\n"); |
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| 80 | if (uartStatus & BI) |
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| 81 | printk("********* Parity Error **********\n"); |
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| 82 | if (uartStatus & ERFIFO) |
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| 83 | printk("********* Error receive Fifo **********\n"); |
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| 84 | |
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| 85 | } |
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| 86 | #else |
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| 87 | inline void uartError(int uart) |
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| 88 | { |
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| 89 | unsigned char uartStatus; |
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| 90 | |
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| 91 | uartStatus = uread(uart, LSR); |
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| 92 | uartStatus = uread(uart, RBR); |
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| 93 | } |
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| 94 | #endif |
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| 95 | |
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| 96 | /* |
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| 97 | * Uart initialization, it is hardcoded to 8 bit, no parity, |
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| 98 | * one stop bit, FIFO, things to be changed |
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| 99 | * are baud rate and nad hw flow control, |
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| 100 | * and longest rx fifo setting |
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| 101 | */ |
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| 102 | void |
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[8ad5399] | 103 | BSP_uart_init |
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| 104 | ( |
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| 105 | int uart, |
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| 106 | unsigned long baud, |
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| 107 | unsigned long databits, |
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| 108 | unsigned long parity, |
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| 109 | unsigned long stopbits, |
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| 110 | int hwFlow |
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| 111 | ) |
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[0ebbf66] | 112 | { |
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| 113 | unsigned char tmp; |
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| 114 | |
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| 115 | /* Sanity check */ |
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| 116 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 117 | |
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| 118 | switch(baud) |
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| 119 | { |
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| 120 | case 50: |
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| 121 | case 75: |
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| 122 | case 110: |
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| 123 | case 134: |
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| 124 | case 300: |
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| 125 | case 600: |
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| 126 | case 1200: |
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| 127 | case 2400: |
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| 128 | case 9600: |
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| 129 | case 19200: |
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| 130 | case 38400: |
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| 131 | case 57600: |
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| 132 | case 115200: |
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| 133 | break; |
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| 134 | default: |
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| 135 | assert(0); |
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| 136 | return; |
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| 137 | } |
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| 138 | |
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| 139 | /* Set DLAB bit to 1 */ |
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| 140 | uwrite(uart, LCR, DLAB); |
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| 141 | |
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| 142 | /* Set baud rate */ |
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| 143 | uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); |
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| 144 | uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); |
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| 145 | |
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| 146 | /* 8-bit, no parity , 1 stop */ |
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[8ad5399] | 147 | uwrite(uart, LCR, databits | parity | stopbits); |
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[0ebbf66] | 148 | |
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| 149 | |
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| 150 | /* Set DTR, RTS and OUT2 high */ |
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| 151 | uwrite(uart, MCR, DTR | RTS | OUT_2); |
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| 152 | |
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| 153 | /* Enable FIFO */ |
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| 154 | uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); |
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| 155 | |
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| 156 | /* Disable Interrupts */ |
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| 157 | uwrite(uart, IER, 0); |
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| 158 | |
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| 159 | /* Read status to clear them */ |
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| 160 | tmp = uread(uart, LSR); |
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| 161 | tmp = uread(uart, RBR); |
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| 162 | tmp = uread(uart, MSR); |
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| 163 | |
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| 164 | /* Remember state */ |
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| 165 | uart_data[uart].baud = baud; |
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[75e8e04] | 166 | uart_data[uart].databits = databits; |
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| 167 | uart_data[uart].parity = parity; |
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| 168 | uart_data[uart].stopbits = stopbits; |
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| 169 | uart_data[uart].hwFlow = hwFlow; |
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[0ebbf66] | 170 | return; |
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| 171 | } |
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| 172 | |
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| 173 | /* |
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| 174 | * Set baud |
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| 175 | */ |
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[75e8e04] | 176 | |
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| 177 | void |
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| 178 | BSP_uart_set_baud( |
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| 179 | int uart, |
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| 180 | unsigned long baud |
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| 181 | ) |
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| 182 | { |
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| 183 | /* Sanity check */ |
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| 184 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 185 | |
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| 186 | BSP_uart_set_attributes( uart, baud, uart_data[uart].databits, |
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| 187 | uart_data[uart].parity, uart_data[uart].stopbits ); |
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| 188 | } |
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| 189 | |
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| 190 | /* |
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| 191 | * Set all attributes |
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| 192 | */ |
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| 193 | |
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[0ebbf66] | 194 | void |
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[8ad5399] | 195 | BSP_uart_set_attributes |
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| 196 | ( |
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| 197 | int uart, |
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| 198 | unsigned long baud, |
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| 199 | unsigned long databits, |
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| 200 | unsigned long parity, |
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| 201 | unsigned long stopbits |
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| 202 | ) |
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[0ebbf66] | 203 | { |
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| 204 | unsigned char mcr, ier; |
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| 205 | |
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| 206 | /* Sanity check */ |
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| 207 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 208 | |
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| 209 | /* |
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| 210 | * This function may be called whenever TERMIOS parameters |
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[947c27aa] | 211 | * are changed, so we have to make sure that baud change is |
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[0ebbf66] | 212 | * indeed required |
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| 213 | */ |
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| 214 | |
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[8ad5399] | 215 | if( (baud == uart_data[uart].baud) && |
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| 216 | (databits == uart_data[uart].databits) && |
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| 217 | (parity == uart_data[uart].parity) && |
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| 218 | (stopbits == uart_data[uart].stopbits) ) |
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[0ebbf66] | 219 | { |
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| 220 | return; |
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| 221 | } |
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| 222 | |
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| 223 | mcr = uread(uart, MCR); |
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| 224 | ier = uread(uart, IER); |
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| 225 | |
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[8ad5399] | 226 | BSP_uart_init(uart, baud, databits, parity, stopbits, uart_data[uart].hwFlow); |
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[0ebbf66] | 227 | |
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| 228 | uwrite(uart, MCR, mcr); |
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| 229 | uwrite(uart, IER, ier); |
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| 230 | |
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| 231 | return; |
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| 232 | } |
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| 233 | |
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| 234 | /* |
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| 235 | * Enable/disable interrupts |
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| 236 | */ |
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| 237 | void |
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| 238 | BSP_uart_intr_ctrl(int uart, int cmd) |
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| 239 | { |
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[caeb33b2] | 240 | int iStatus = (int)INTERRUPT_DISABLE; |
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[0ebbf66] | 241 | |
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| 242 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 243 | |
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| 244 | switch(cmd) |
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| 245 | { |
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| 246 | case BSP_UART_INTR_CTRL_ENABLE: |
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[caeb33b2] | 247 | iStatus |= (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE | TRANSMIT_ENABLE); |
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| 248 | if ( uart_data[uart].hwFlow ) { |
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| 249 | iStatus |= MODEM_ENABLE; |
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| 250 | } |
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[0ebbf66] | 251 | break; |
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| 252 | case BSP_UART_INTR_CTRL_TERMIOS: |
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[caeb33b2] | 253 | iStatus |= (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
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| 254 | if ( uart_data[uart].hwFlow ) { |
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| 255 | iStatus |= MODEM_ENABLE; |
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| 256 | } |
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[0ebbf66] | 257 | break; |
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| 258 | case BSP_UART_INTR_CTRL_GDB: |
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[caeb33b2] | 259 | iStatus |= RECEIVE_ENABLE; |
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[0ebbf66] | 260 | break; |
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| 261 | } |
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[caeb33b2] | 262 | |
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| 263 | uart_data[uart].ier = iStatus; |
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| 264 | uwrite(uart, IER, iStatus); |
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[0ebbf66] | 265 | |
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| 266 | return; |
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| 267 | } |
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| 268 | |
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| 269 | void |
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| 270 | BSP_uart_throttle(int uart) |
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| 271 | { |
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| 272 | unsigned int mcr; |
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| 273 | |
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| 274 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 275 | |
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| 276 | if(!uart_data[uart].hwFlow) |
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| 277 | { |
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| 278 | /* Should not happen */ |
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| 279 | assert(0); |
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| 280 | return; |
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| 281 | } |
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| 282 | mcr = uread (uart, MCR); |
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| 283 | /* RTS down */ |
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| 284 | mcr &= ~RTS; |
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| 285 | uwrite(uart, MCR, mcr); |
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| 286 | |
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| 287 | return; |
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| 288 | } |
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| 289 | |
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| 290 | void |
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| 291 | BSP_uart_unthrottle(int uart) |
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| 292 | { |
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| 293 | unsigned int mcr; |
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| 294 | |
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| 295 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 296 | |
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| 297 | if(!uart_data[uart].hwFlow) |
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| 298 | { |
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| 299 | /* Should not happen */ |
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| 300 | assert(0); |
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| 301 | return; |
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| 302 | } |
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| 303 | mcr = uread (uart, MCR); |
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| 304 | /* RTS up */ |
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| 305 | mcr |= RTS; |
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| 306 | uwrite(uart, MCR, mcr); |
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| 307 | |
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| 308 | return; |
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| 309 | } |
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| 310 | |
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| 311 | /* |
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| 312 | * Status function, -1 if error |
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| 313 | * detected, 0 if no received chars available, |
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| 314 | * 1 if received char available, 2 if break |
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| 315 | * is detected, it will eat break and error |
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| 316 | * chars. It ignores overruns - we cannot do |
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| 317 | * anything about - it execpt count statistics |
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| 318 | * and we are not counting it. |
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| 319 | */ |
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| 320 | int |
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| 321 | BSP_uart_polled_status(int uart) |
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| 322 | { |
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| 323 | unsigned char val; |
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| 324 | |
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| 325 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 326 | |
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| 327 | val = uread(uart, LSR); |
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| 328 | |
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| 329 | if(val & BI) |
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| 330 | { |
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| 331 | /* BREAK found, eat character */ |
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| 332 | uread(uart, RBR); |
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| 333 | return BSP_UART_STATUS_BREAK; |
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| 334 | } |
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| 335 | |
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| 336 | if((val & (DR | OE | FE)) == 1) |
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| 337 | { |
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| 338 | /* No error, character present */ |
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| 339 | return BSP_UART_STATUS_CHAR; |
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| 340 | } |
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| 341 | |
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| 342 | if((val & (DR | OE | FE)) == 0) |
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| 343 | { |
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| 344 | /* Nothing */ |
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| 345 | return BSP_UART_STATUS_NOCHAR; |
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| 346 | } |
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| 347 | |
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| 348 | /* |
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| 349 | * Framing or parity error |
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| 350 | * eat character |
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| 351 | */ |
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| 352 | uread(uart, RBR); |
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| 353 | |
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| 354 | return BSP_UART_STATUS_ERROR; |
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| 355 | } |
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| 356 | |
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| 357 | |
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| 358 | /* |
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| 359 | * Polled mode write function |
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| 360 | */ |
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| 361 | void |
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| 362 | BSP_uart_polled_write(int uart, int val) |
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| 363 | { |
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| 364 | unsigned char val1; |
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| 365 | |
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| 366 | /* Sanity check */ |
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| 367 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 368 | |
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| 369 | for(;;) |
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| 370 | { |
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| 371 | if((val1=uread(uart, LSR)) & THRE) |
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| 372 | { |
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| 373 | break; |
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| 374 | } |
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| 375 | } |
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| 376 | |
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| 377 | if(uart_data[uart].hwFlow) |
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| 378 | { |
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| 379 | for(;;) |
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| 380 | { |
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| 381 | if(uread(uart, MSR) & CTS) |
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| 382 | { |
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| 383 | break; |
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| 384 | } |
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| 385 | } |
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| 386 | } |
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| 387 | |
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| 388 | uwrite(uart, THR, val & 0xff); |
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| 389 | |
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| 390 | return; |
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| 391 | } |
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| 392 | |
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| 393 | void |
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| 394 | BSP_output_char_via_serial(int val) |
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| 395 | { |
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| 396 | BSP_uart_polled_write(BSPConsolePort, val); |
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| 397 | if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r'); |
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| 398 | } |
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| 399 | |
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| 400 | /* |
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| 401 | * Polled mode read function |
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| 402 | */ |
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| 403 | int |
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| 404 | BSP_uart_polled_read(int uart) |
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| 405 | { |
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| 406 | unsigned char val; |
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| 407 | |
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| 408 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 409 | |
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| 410 | for(;;) |
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| 411 | { |
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| 412 | if(uread(uart, LSR) & DR) |
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| 413 | { |
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| 414 | break; |
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| 415 | } |
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| 416 | } |
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| 417 | |
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| 418 | val = uread(uart, RBR); |
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| 419 | |
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| 420 | return (int)(val & 0xff); |
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| 421 | } |
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| 422 | |
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| 423 | unsigned |
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| 424 | BSP_poll_char_via_serial() |
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| 425 | { |
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| 426 | return BSP_uart_polled_read(BSPConsolePort); |
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| 427 | } |
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| 428 | |
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| 429 | |
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| 430 | /* ================ Termios support =================*/ |
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| 431 | |
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| 432 | static volatile int termios_stopped_com1 = 0; |
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| 433 | static volatile int termios_tx_active_com1 = 0; |
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| 434 | static void* termios_ttyp_com1 = NULL; |
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| 435 | static char termios_tx_hold_com1 = 0; |
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| 436 | static volatile char termios_tx_hold_valid_com1 = 0; |
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| 437 | |
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| 438 | static volatile int termios_stopped_com2 = 0; |
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| 439 | static volatile int termios_tx_active_com2 = 0; |
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| 440 | static void* termios_ttyp_com2 = NULL; |
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| 441 | static char termios_tx_hold_com2 = 0; |
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| 442 | static volatile char termios_tx_hold_valid_com2 = 0; |
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| 443 | |
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[b459526] | 444 | static void ( *driver_input_handler_com1 )( void *, char *, int ) = 0; |
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| 445 | static void ( *driver_input_handler_com2 )( void *, char *, int ) = 0; |
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| 446 | |
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| 447 | /* |
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| 448 | * This routine sets the handler to handle the characters received |
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| 449 | * from the serial port. |
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| 450 | */ |
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| 451 | void uart_set_driver_handler( int port, void ( *handler )( void *, char *, int ) ) |
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| 452 | { |
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| 453 | switch( port ) |
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| 454 | { |
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| 455 | case BSP_UART_COM1: |
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| 456 | driver_input_handler_com1 = handler; |
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| 457 | break; |
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| 458 | |
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| 459 | case BSP_UART_COM2: |
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| 460 | driver_input_handler_com2 = handler; |
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| 461 | break; |
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| 462 | } |
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| 463 | } |
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| 464 | |
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| 465 | |
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[0ebbf66] | 466 | /* |
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| 467 | * Set channel parameters |
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| 468 | */ |
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| 469 | void |
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| 470 | BSP_uart_termios_set(int uart, void *ttyp) |
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| 471 | { |
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[caeb33b2] | 472 | struct rtems_termios_tty *p = (struct rtems_termios_tty *)ttyp; |
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[0ebbf66] | 473 | unsigned char val; |
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| 474 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 475 | |
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| 476 | if(uart == BSP_UART_COM1) |
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| 477 | { |
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[caeb33b2] | 478 | uart_data[uart].ioMode = p->device.outputUsesInterrupts; |
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[0ebbf66] | 479 | if(uart_data[uart].hwFlow) |
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| 480 | { |
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| 481 | val = uread(uart, MSR); |
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| 482 | |
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| 483 | termios_stopped_com1 = (val & CTS) ? 0 : 1; |
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| 484 | } |
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| 485 | else |
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| 486 | { |
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| 487 | termios_stopped_com1 = 0; |
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| 488 | } |
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| 489 | termios_tx_active_com1 = 0; |
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| 490 | termios_ttyp_com1 = ttyp; |
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| 491 | termios_tx_hold_com1 = 0; |
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| 492 | termios_tx_hold_valid_com1 = 0; |
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| 493 | } |
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| 494 | else |
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| 495 | { |
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[caeb33b2] | 496 | uart_data[uart].ioMode = p->device.outputUsesInterrupts; |
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[0ebbf66] | 497 | if(uart_data[uart].hwFlow) |
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| 498 | { |
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| 499 | val = uread(uart, MSR); |
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| 500 | |
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| 501 | termios_stopped_com2 = (val & CTS) ? 0 : 1; |
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| 502 | } |
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| 503 | else |
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| 504 | { |
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| 505 | termios_stopped_com2 = 0; |
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| 506 | } |
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| 507 | termios_tx_active_com2 = 0; |
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| 508 | termios_ttyp_com2 = ttyp; |
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| 509 | termios_tx_hold_com2 = 0; |
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| 510 | termios_tx_hold_valid_com2 = 0; |
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| 511 | } |
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| 512 | |
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| 513 | return; |
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| 514 | } |
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| 515 | |
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[caeb33b2] | 516 | int |
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| 517 | BSP_uart_termios_read_com1(int uart) |
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| 518 | { |
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| 519 | int off = (int)0; |
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| 520 | char buf[40]; |
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| 521 | |
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| 522 | /* read bytes */ |
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| 523 | while (( off < sizeof(buf) ) && ( uread(BSP_UART_COM1, LSR) & DR )) { |
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| 524 | buf[off++] = uread(BSP_UART_COM1, RBR); |
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| 525 | } |
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| 526 | |
---|
| 527 | /* write out data */ |
---|
| 528 | if ( off > 0 ) { |
---|
| 529 | rtems_termios_enqueue_raw_characters(termios_ttyp_com1, buf, off); |
---|
| 530 | } |
---|
| 531 | |
---|
| 532 | /* enable receive interrupts */ |
---|
| 533 | uart_data[BSP_UART_COM1].ier |= (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
---|
| 534 | uwrite(BSP_UART_COM1, IER, uart_data[BSP_UART_COM1].ier); |
---|
| 535 | |
---|
| 536 | return ( EOF ); |
---|
| 537 | } |
---|
| 538 | |
---|
| 539 | int |
---|
| 540 | BSP_uart_termios_read_com2(int uart) |
---|
| 541 | { |
---|
| 542 | int off = (int)0; |
---|
| 543 | char buf[40]; |
---|
| 544 | |
---|
| 545 | /* read current byte */ |
---|
[b9ff276c] | 546 | while (( off < sizeof(buf) ) && ( uread(BSP_UART_COM2, LSR) & DR )) { |
---|
| 547 | buf[off++] = uread(BSP_UART_COM2, RBR); |
---|
[caeb33b2] | 548 | } |
---|
| 549 | |
---|
| 550 | /* write out data */ |
---|
| 551 | if ( off > 0 ) { |
---|
| 552 | rtems_termios_enqueue_raw_characters(termios_ttyp_com2, buf, off); |
---|
| 553 | } |
---|
| 554 | |
---|
| 555 | /* enable receive interrupts */ |
---|
| 556 | uart_data[BSP_UART_COM2].ier |= (RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
---|
| 557 | uwrite(BSP_UART_COM2, IER, uart_data[BSP_UART_COM2].ier); |
---|
| 558 | |
---|
| 559 | return ( EOF ); |
---|
| 560 | } |
---|
| 561 | |
---|
[0ebbf66] | 562 | int |
---|
| 563 | BSP_uart_termios_write_com1(int minor, const char *buf, int len) |
---|
| 564 | { |
---|
| 565 | assert(buf != NULL); |
---|
| 566 | |
---|
| 567 | if(len <= 0) |
---|
| 568 | { |
---|
| 569 | return 0; |
---|
| 570 | } |
---|
| 571 | |
---|
| 572 | /* If there TX buffer is busy - something is royally screwed up */ |
---|
| 573 | assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); |
---|
| 574 | |
---|
| 575 | if(termios_stopped_com1) |
---|
| 576 | { |
---|
| 577 | /* CTS low */ |
---|
| 578 | termios_tx_hold_com1 = *buf; |
---|
| 579 | termios_tx_hold_valid_com1 = 1; |
---|
| 580 | return 0; |
---|
| 581 | } |
---|
| 582 | |
---|
| 583 | /* Write character */ |
---|
| 584 | uwrite(BSP_UART_COM1, THR, *buf & 0xff); |
---|
| 585 | |
---|
| 586 | /* Enable interrupts if necessary */ |
---|
[caeb33b2] | 587 | if ( !termios_tx_active_com1 ) { |
---|
| 588 | termios_tx_active_com1 = 1; |
---|
| 589 | uart_data[BSP_UART_COM1].ier |= TRANSMIT_ENABLE; |
---|
| 590 | uwrite(BSP_UART_COM1, IER, uart_data[BSP_UART_COM1].ier); |
---|
| 591 | } |
---|
[0ebbf66] | 592 | |
---|
| 593 | return 0; |
---|
| 594 | } |
---|
| 595 | |
---|
| 596 | int |
---|
| 597 | BSP_uart_termios_write_com2(int minor, const char *buf, int len) |
---|
| 598 | { |
---|
| 599 | assert(buf != NULL); |
---|
| 600 | |
---|
| 601 | if(len <= 0) |
---|
| 602 | { |
---|
| 603 | return 0; |
---|
| 604 | } |
---|
| 605 | |
---|
| 606 | |
---|
| 607 | /* If there TX buffer is busy - something is royally screwed up */ |
---|
| 608 | assert((uread(BSP_UART_COM2, LSR) & THRE) != 0); |
---|
| 609 | |
---|
| 610 | if(termios_stopped_com2) |
---|
| 611 | { |
---|
| 612 | /* CTS low */ |
---|
| 613 | termios_tx_hold_com2 = *buf; |
---|
| 614 | termios_tx_hold_valid_com2 = 1; |
---|
| 615 | return 0; |
---|
| 616 | } |
---|
| 617 | |
---|
| 618 | /* Write character */ |
---|
| 619 | uwrite(BSP_UART_COM2, THR, *buf & 0xff); |
---|
| 620 | |
---|
| 621 | /* Enable interrupts if necessary */ |
---|
[caeb33b2] | 622 | if ( !termios_tx_active_com2 ) { |
---|
| 623 | termios_tx_active_com2 = 1; |
---|
| 624 | uart_data[BSP_UART_COM2].ier |= TRANSMIT_ENABLE; |
---|
| 625 | uwrite(BSP_UART_COM2, IER, uart_data[BSP_UART_COM2].ier); |
---|
| 626 | } |
---|
[0ebbf66] | 627 | |
---|
| 628 | return 0; |
---|
| 629 | } |
---|
| 630 | |
---|
| 631 | |
---|
| 632 | void |
---|
| 633 | BSP_uart_termios_isr_com1(void) |
---|
| 634 | { |
---|
| 635 | unsigned char buf[40]; |
---|
| 636 | unsigned char val; |
---|
| 637 | int off, ret, vect; |
---|
| 638 | |
---|
| 639 | off = 0; |
---|
| 640 | |
---|
| 641 | for(;;) |
---|
| 642 | { |
---|
| 643 | vect = uread(BSP_UART_COM1, IIR) & 0xf; |
---|
| 644 | |
---|
| 645 | switch(vect) |
---|
| 646 | { |
---|
| 647 | case MODEM_STATUS : |
---|
| 648 | val = uread(BSP_UART_COM1, MSR); |
---|
| 649 | if(uart_data[BSP_UART_COM1].hwFlow) |
---|
| 650 | { |
---|
| 651 | if(val & CTS) |
---|
| 652 | { |
---|
| 653 | /* CTS high */ |
---|
| 654 | termios_stopped_com1 = 0; |
---|
| 655 | if(termios_tx_hold_valid_com1) |
---|
| 656 | { |
---|
| 657 | termios_tx_hold_valid_com1 = 0; |
---|
| 658 | BSP_uart_termios_write_com1(0, &termios_tx_hold_com1, |
---|
| 659 | 1); |
---|
| 660 | } |
---|
| 661 | } |
---|
| 662 | else |
---|
| 663 | { |
---|
| 664 | /* CTS low */ |
---|
| 665 | termios_stopped_com1 = 1; |
---|
| 666 | } |
---|
| 667 | } |
---|
| 668 | break; |
---|
| 669 | case NO_MORE_INTR : |
---|
| 670 | /* No more interrupts */ |
---|
| 671 | if(off != 0) |
---|
| 672 | { |
---|
| 673 | /* Update rx buffer */ |
---|
[b459526] | 674 | if( driver_input_handler_com1 ) |
---|
| 675 | { |
---|
| 676 | driver_input_handler_com1( termios_ttyp_com1, (char *)buf, off ); |
---|
| 677 | } |
---|
| 678 | else |
---|
| 679 | { |
---|
| 680 | /* Update rx buffer */ |
---|
| 681 | rtems_termios_enqueue_raw_characters(termios_ttyp_com1, (char *)buf, off ); |
---|
| 682 | } |
---|
[0ebbf66] | 683 | } |
---|
| 684 | return; |
---|
| 685 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
| 686 | /* |
---|
| 687 | * TX holding empty: we have to disable these interrupts |
---|
| 688 | * if there is nothing more to send. |
---|
| 689 | */ |
---|
| 690 | |
---|
| 691 | /* If nothing else to send disable interrupts */ |
---|
[caeb33b2] | 692 | ret = rtems_termios_dequeue_characters(termios_ttyp_com1, 1); |
---|
| 693 | if ( ret == 0 ) { |
---|
| 694 | termios_tx_active_com1 = 0; |
---|
| 695 | uart_data[BSP_UART_COM1].ier &= ~(TRANSMIT_ENABLE); |
---|
| 696 | uwrite(BSP_UART_COM1, IER, uart_data[BSP_UART_COM1].ier); |
---|
| 697 | } |
---|
[0ebbf66] | 698 | break; |
---|
| 699 | case RECEIVER_DATA_AVAIL : |
---|
| 700 | case CHARACTER_TIMEOUT_INDICATION: |
---|
[caeb33b2] | 701 | if ( uart_data[BSP_UART_COM1].ioMode == TERMIOS_TASK_DRIVEN ) { |
---|
| 702 | /* ensure interrupts are enabled */ |
---|
| 703 | if ( uart_data[BSP_UART_COM1].ier & RECEIVE_ENABLE ) { |
---|
| 704 | /* disable interrupts and notify termios */ |
---|
| 705 | uart_data[BSP_UART_COM1].ier &= ~(RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
---|
| 706 | uwrite(BSP_UART_COM1, IER, uart_data[BSP_UART_COM1].ier); |
---|
| 707 | rtems_termios_rxirq_occured(termios_ttyp_com1); |
---|
| 708 | } |
---|
| 709 | } |
---|
| 710 | else { |
---|
| 711 | /* RX data ready */ |
---|
| 712 | assert(off < sizeof(buf)); |
---|
| 713 | buf[off++] = uread(BSP_UART_COM1, RBR); |
---|
| 714 | } |
---|
[0ebbf66] | 715 | break; |
---|
| 716 | case RECEIVER_ERROR: |
---|
| 717 | /* RX error: eat character */ |
---|
| 718 | uartError(BSP_UART_COM1); |
---|
| 719 | break; |
---|
| 720 | default: |
---|
| 721 | /* Should not happen */ |
---|
| 722 | assert(0); |
---|
| 723 | return; |
---|
| 724 | } |
---|
| 725 | } |
---|
| 726 | } |
---|
| 727 | |
---|
| 728 | void |
---|
| 729 | BSP_uart_termios_isr_com2() |
---|
| 730 | { |
---|
| 731 | unsigned char buf[40]; |
---|
| 732 | unsigned char val; |
---|
| 733 | int off, ret, vect; |
---|
| 734 | |
---|
| 735 | off = 0; |
---|
| 736 | |
---|
| 737 | for(;;) |
---|
| 738 | { |
---|
| 739 | vect = uread(BSP_UART_COM2, IIR) & 0xf; |
---|
| 740 | |
---|
| 741 | switch(vect) |
---|
| 742 | { |
---|
| 743 | case MODEM_STATUS : |
---|
| 744 | val = uread(BSP_UART_COM2, MSR); |
---|
| 745 | if(uart_data[BSP_UART_COM2].hwFlow) |
---|
| 746 | { |
---|
| 747 | if(val & CTS) |
---|
| 748 | { |
---|
| 749 | /* CTS high */ |
---|
| 750 | termios_stopped_com2 = 0; |
---|
| 751 | if(termios_tx_hold_valid_com2) |
---|
| 752 | { |
---|
| 753 | termios_tx_hold_valid_com2 = 0; |
---|
| 754 | BSP_uart_termios_write_com2(0, &termios_tx_hold_com2, |
---|
| 755 | 1); |
---|
| 756 | } |
---|
| 757 | } |
---|
| 758 | else |
---|
| 759 | { |
---|
| 760 | /* CTS low */ |
---|
| 761 | termios_stopped_com2 = 1; |
---|
| 762 | } |
---|
| 763 | } |
---|
| 764 | break; |
---|
| 765 | case NO_MORE_INTR : |
---|
| 766 | /* No more interrupts */ |
---|
| 767 | if(off != 0) |
---|
| 768 | { |
---|
| 769 | /* Update rx buffer */ |
---|
[b459526] | 770 | if( driver_input_handler_com2 ) |
---|
| 771 | { |
---|
| 772 | driver_input_handler_com2( termios_ttyp_com2, (char *)buf, off ); |
---|
| 773 | } |
---|
| 774 | else |
---|
| 775 | { |
---|
| 776 | rtems_termios_enqueue_raw_characters(termios_ttyp_com2, (char *)buf, off); |
---|
| 777 | } |
---|
[0ebbf66] | 778 | } |
---|
| 779 | return; |
---|
| 780 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
| 781 | /* |
---|
| 782 | * TX holding empty: we have to disable these interrupts |
---|
| 783 | * if there is nothing more to send. |
---|
| 784 | */ |
---|
| 785 | |
---|
| 786 | /* If nothing else to send disable interrupts */ |
---|
[caeb33b2] | 787 | ret = rtems_termios_dequeue_characters(termios_ttyp_com2, 1); |
---|
| 788 | if ( ret == 0 ) { |
---|
| 789 | termios_tx_active_com2 = 0; |
---|
| 790 | uart_data[BSP_UART_COM2].ier &= ~(TRANSMIT_ENABLE); |
---|
| 791 | uwrite(BSP_UART_COM2, IER, uart_data[BSP_UART_COM2].ier); |
---|
| 792 | } |
---|
[0ebbf66] | 793 | break; |
---|
| 794 | case RECEIVER_DATA_AVAIL : |
---|
| 795 | case CHARACTER_TIMEOUT_INDICATION: |
---|
[caeb33b2] | 796 | if ( uart_data[BSP_UART_COM2].ioMode == TERMIOS_TASK_DRIVEN ) { |
---|
| 797 | /* ensure interrupts are enabled */ |
---|
| 798 | if ( uart_data[BSP_UART_COM2].ier & RECEIVE_ENABLE ) { |
---|
| 799 | /* disable interrupts and notify termios */ |
---|
| 800 | uart_data[BSP_UART_COM2].ier &= ~(RECEIVE_ENABLE | RECEIVER_LINE_ST_ENABLE); |
---|
| 801 | uwrite(BSP_UART_COM2, IER, uart_data[BSP_UART_COM2].ier); |
---|
| 802 | rtems_termios_rxirq_occured(termios_ttyp_com2); |
---|
| 803 | } |
---|
| 804 | } |
---|
| 805 | else { |
---|
| 806 | /* RX data ready */ |
---|
| 807 | assert(off < sizeof(buf)); |
---|
| 808 | buf[off++] = uread(BSP_UART_COM2, RBR); |
---|
| 809 | } |
---|
[0ebbf66] | 810 | break; |
---|
| 811 | case RECEIVER_ERROR: |
---|
| 812 | /* RX error: eat character */ |
---|
| 813 | uartError(BSP_UART_COM2); |
---|
| 814 | break; |
---|
| 815 | default: |
---|
| 816 | /* Should not happen */ |
---|
| 817 | assert(0); |
---|
| 818 | return; |
---|
| 819 | } |
---|
| 820 | } |
---|
| 821 | } |
---|
| 822 | |
---|
| 823 | |
---|
| 824 | /* ================= GDB support ===================*/ |
---|
[96b46bf] | 825 | static int sav[4] __attribute__ ((unused)); |
---|
[0ebbf66] | 826 | |
---|
| 827 | /* |
---|
| 828 | * Interrupt service routine for COM1 - all, |
---|
| 829 | * it does it check whether ^C is received |
---|
| 830 | * if yes it will flip TF bit before returning |
---|
| 831 | * Note: it should be installed as raw interrupt |
---|
| 832 | * handler |
---|
| 833 | */ |
---|
| 834 | |
---|
| 835 | asm (".p2align 4"); |
---|
| 836 | asm (".text"); |
---|
| 837 | asm (".globl BSP_uart_dbgisr_com1"); |
---|
| 838 | asm ("BSP_uart_dbgisr_com1:"); |
---|
| 839 | asm (" movl %eax, sav"); /* Save eax */ |
---|
| 840 | asm (" movl %ebx, sav + 4"); /* Save ebx */ |
---|
| 841 | asm (" movl %edx, sav + 8"); /* Save edx */ |
---|
| 842 | |
---|
| 843 | asm (" movl $0, %ebx"); /* Clear flag */ |
---|
| 844 | |
---|
| 845 | /* |
---|
| 846 | * We know that only receive related interrupts |
---|
| 847 | * are available, eat chars |
---|
| 848 | */ |
---|
| 849 | asm ("uart_dbgisr_com1_1:"); |
---|
| 850 | asm (" movw $0x3FD, %dx"); |
---|
| 851 | asm (" inb %dx, %al"); /* Read LSR */ |
---|
| 852 | asm (" andb $1, %al"); |
---|
| 853 | asm (" cmpb $0, %al"); |
---|
| 854 | asm (" je uart_dbgisr_com1_2"); |
---|
| 855 | asm (" movw $0x3F8, %dx"); |
---|
| 856 | asm (" inb %dx, %al"); /* Get input character */ |
---|
| 857 | asm (" cmpb $3, %al"); |
---|
| 858 | asm (" jne uart_dbgisr_com1_1"); |
---|
| 859 | |
---|
| 860 | /* ^C received, set flag */ |
---|
| 861 | asm (" movl $1, %ebx"); |
---|
| 862 | asm (" jmp uart_dbgisr_com1_1"); |
---|
| 863 | |
---|
| 864 | /* All chars read */ |
---|
| 865 | asm ("uart_dbgisr_com1_2:"); |
---|
| 866 | |
---|
| 867 | /* If flag is set we have to tweak TF */ |
---|
| 868 | asm (" cmpl $0, %ebx"); |
---|
| 869 | asm (" je uart_dbgisr_com1_3"); |
---|
| 870 | |
---|
| 871 | /* Flag is set */ |
---|
| 872 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
| 873 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
| 874 | |
---|
| 875 | /* Set TF bit */ |
---|
| 876 | asm (" popl %eax"); /* Pop eip */ |
---|
| 877 | asm (" movl %eax, sav + 4"); /* Save it */ |
---|
| 878 | asm (" popl %eax"); /* Pop cs */ |
---|
| 879 | asm (" movl %eax, sav + 8"); /* Save it */ |
---|
| 880 | asm (" popl %eax"); /* Pop flags */ |
---|
| 881 | asm (" orl $0x100, %eax"); /* Modify it */ |
---|
| 882 | asm (" pushl %eax"); /* Push it back */ |
---|
| 883 | asm (" movl sav+8, %eax"); /* Put back cs */ |
---|
| 884 | asm (" pushl %eax"); |
---|
| 885 | asm (" movl sav+4, %eax"); /* Put back eip */ |
---|
| 886 | asm (" pushl %eax"); |
---|
| 887 | |
---|
| 888 | /* Acknowledge IRQ */ |
---|
| 889 | asm (" movb $0x20, %al"); |
---|
| 890 | asm (" outb %al, $0x20"); |
---|
| 891 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
| 892 | asm (" iret"); /* Done */ |
---|
| 893 | |
---|
| 894 | /* Flag is not set */ |
---|
| 895 | asm("uart_dbgisr_com1_3:"); |
---|
| 896 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
| 897 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
| 898 | |
---|
| 899 | /* Acknowledge irq */ |
---|
| 900 | asm (" movb $0x20, %al"); |
---|
| 901 | asm (" outb %al, $0x20"); |
---|
| 902 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
| 903 | asm (" iret"); /* Done */ |
---|
| 904 | |
---|
| 905 | |
---|
| 906 | /* |
---|
| 907 | * Interrupt service routine for COM2 - all, |
---|
| 908 | * it does it check whether ^C is received |
---|
| 909 | * if yes it will flip TF bit before returning |
---|
| 910 | * Note: it has to be installed as raw interrupt |
---|
| 911 | * handler |
---|
| 912 | */ |
---|
| 913 | asm (".p2align 4"); |
---|
| 914 | asm (".text"); |
---|
| 915 | asm (".globl BSP_uart_dbgisr_com2"); |
---|
| 916 | asm ("BSP_uart_dbgisr_com2:"); |
---|
| 917 | asm (" movl %eax, sav"); /* Save eax */ |
---|
| 918 | asm (" movl %ebx, sav + 4"); /* Save ebx */ |
---|
| 919 | asm (" movl %edx, sav + 8"); /* Save edx */ |
---|
| 920 | |
---|
| 921 | asm (" movl $0, %ebx"); /* Clear flag */ |
---|
| 922 | |
---|
| 923 | /* |
---|
| 924 | * We know that only receive related interrupts |
---|
| 925 | * are available, eat chars |
---|
| 926 | */ |
---|
| 927 | asm ("uart_dbgisr_com2_1:"); |
---|
| 928 | asm (" movw $0x2FD, %dx"); |
---|
| 929 | asm (" inb %dx, %al"); /* Read LSR */ |
---|
| 930 | asm (" andb $1, %al"); |
---|
| 931 | asm (" cmpb $0, %al"); |
---|
| 932 | asm (" je uart_dbgisr_com2_2"); |
---|
| 933 | asm (" movw $0x2F8, %dx"); |
---|
| 934 | asm (" inb %dx, %al"); /* Get input character */ |
---|
| 935 | asm (" cmpb $3, %al"); |
---|
| 936 | asm (" jne uart_dbgisr_com2_1"); |
---|
| 937 | |
---|
| 938 | /* ^C received, set flag */ |
---|
| 939 | asm (" movl $1, %ebx"); |
---|
| 940 | asm (" jmp uart_dbgisr_com2_1"); |
---|
| 941 | |
---|
| 942 | /* All chars read */ |
---|
| 943 | asm ("uart_dbgisr_com2_2:"); |
---|
| 944 | |
---|
| 945 | /* If flag is set we have to tweak TF */ |
---|
| 946 | asm (" cmpl $0, %ebx"); |
---|
| 947 | asm (" je uart_dbgisr_com2_3"); |
---|
| 948 | |
---|
| 949 | /* Flag is set */ |
---|
| 950 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
| 951 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
| 952 | |
---|
| 953 | /* Set TF bit */ |
---|
| 954 | asm (" popl %eax"); /* Pop eip */ |
---|
| 955 | asm (" movl %eax, sav + 4"); /* Save it */ |
---|
| 956 | asm (" popl %eax"); /* Pop cs */ |
---|
| 957 | asm (" movl %eax, sav + 8"); /* Save it */ |
---|
| 958 | asm (" popl %eax"); /* Pop flags */ |
---|
| 959 | asm (" orl $0x100, %eax"); /* Modify it */ |
---|
| 960 | asm (" pushl %eax"); /* Push it back */ |
---|
| 961 | asm (" movl sav+8, %eax"); /* Put back cs */ |
---|
| 962 | asm (" pushl %eax"); |
---|
| 963 | asm (" movl sav+4, %eax"); /* Put back eip */ |
---|
| 964 | asm (" pushl %eax"); |
---|
| 965 | |
---|
| 966 | /* Acknowledge IRQ */ |
---|
| 967 | asm (" movb $0x20, %al"); |
---|
| 968 | asm (" outb %al, $0x20"); |
---|
| 969 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
| 970 | asm (" iret"); /* Done */ |
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| 971 | |
---|
| 972 | /* Flag is not set */ |
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| 973 | asm("uart_dbgisr_com2_3:"); |
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| 974 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
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| 975 | asm (" movl sav+8, %edx"); /* Restore edx */ |
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| 976 | |
---|
| 977 | /* Acknowledge irq */ |
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| 978 | asm (" movb $0x20, %al"); |
---|
| 979 | asm (" outb %al, $0x20"); |
---|
| 980 | asm (" movl sav, %eax"); /* Restore eax */ |
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| 981 | asm (" iret"); /* Done */ |
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| 982 | |
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| 983 | |
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| 984 | |
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| 985 | |
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| 986 | |
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| 987 | |
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