[0ebbf66] | 1 | /* |
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| 2 | * This software is Copyright (C) 1998 by T.sqware - all rights limited |
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| 3 | * It is provided in to the public domain "as is", can be freely modified |
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| 4 | * as far as this copyight notice is kept unchanged, but does not imply |
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| 5 | * an endorsement by T.sqware of the product in which it is included. |
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| 6 | * |
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| 7 | * $Id$ |
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| 8 | */ |
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| 9 | |
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| 10 | #include <bsp.h> |
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| 11 | #include <irq.h> |
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| 12 | #include <uart.h> |
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| 13 | #include <rtems/libio.h> |
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| 14 | #include <assert.h> |
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| 15 | |
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| 16 | /* |
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| 17 | * Basic 16552 driver |
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| 18 | */ |
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| 19 | |
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| 20 | struct uart_data |
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| 21 | { |
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| 22 | int hwFlow; |
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| 23 | int baud; |
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| 24 | }; |
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| 25 | |
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| 26 | static struct uart_data uart_data[2]; |
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| 27 | |
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| 28 | /* |
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[930c1c8] | 29 | * Macros to read/write register of uart, if configuration is |
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[0ebbf66] | 30 | * different just rewrite these macros |
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| 31 | */ |
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| 32 | |
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| 33 | static inline unsigned char |
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| 34 | uread(int uart, unsigned int reg) |
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| 35 | { |
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| 36 | register unsigned char val; |
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| 37 | |
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[da8ae79b] | 38 | if (uart == 0) { |
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| 39 | inport_byte(COM1_BASE_IO+reg, val); |
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| 40 | } else { |
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| 41 | inport_byte(COM2_BASE_IO+reg, val); |
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| 42 | } |
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[0ebbf66] | 43 | |
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| 44 | return val; |
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| 45 | } |
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| 46 | |
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| 47 | static inline void |
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| 48 | uwrite(int uart, int reg, unsigned int val) |
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| 49 | { |
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[da8ae79b] | 50 | if (uart == 0) { |
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| 51 | outport_byte(COM1_BASE_IO+reg, val); |
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| 52 | } else { |
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| 53 | outport_byte(COM2_BASE_IO+reg, val); |
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| 54 | } |
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[0ebbf66] | 55 | } |
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| 56 | |
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| 57 | #ifdef UARTDEBUG |
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| 58 | static void |
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| 59 | uartError(int uart) |
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| 60 | { |
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| 61 | unsigned char uartStatus, dummy; |
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| 62 | |
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| 63 | uartStatus = uread(uart, LSR); |
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| 64 | dummy = uread(uart, RBR); |
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| 65 | |
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| 66 | if (uartStatus & OE) |
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| 67 | printk("********* Over run Error **********\n"); |
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| 68 | if (uartStatus & PE) |
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| 69 | printk("********* Parity Error **********\n"); |
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| 70 | if (uartStatus & FE) |
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| 71 | printk("********* Framing Error **********\n"); |
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| 72 | if (uartStatus & BI) |
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| 73 | printk("********* Parity Error **********\n"); |
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| 74 | if (uartStatus & ERFIFO) |
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| 75 | printk("********* Error receive Fifo **********\n"); |
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| 76 | |
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| 77 | } |
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| 78 | #else |
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| 79 | inline void uartError(int uart) |
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| 80 | { |
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| 81 | unsigned char uartStatus; |
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| 82 | |
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| 83 | uartStatus = uread(uart, LSR); |
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| 84 | uartStatus = uread(uart, RBR); |
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| 85 | } |
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| 86 | #endif |
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| 87 | |
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| 88 | /* |
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| 89 | * Uart initialization, it is hardcoded to 8 bit, no parity, |
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| 90 | * one stop bit, FIFO, things to be changed |
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| 91 | * are baud rate and nad hw flow control, |
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| 92 | * and longest rx fifo setting |
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| 93 | */ |
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| 94 | void |
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| 95 | BSP_uart_init(int uart, int baud, int hwFlow) |
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| 96 | { |
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| 97 | unsigned char tmp; |
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| 98 | |
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| 99 | /* Sanity check */ |
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| 100 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 101 | |
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| 102 | switch(baud) |
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| 103 | { |
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| 104 | case 50: |
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| 105 | case 75: |
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| 106 | case 110: |
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| 107 | case 134: |
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| 108 | case 300: |
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| 109 | case 600: |
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| 110 | case 1200: |
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| 111 | case 2400: |
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| 112 | case 9600: |
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| 113 | case 19200: |
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| 114 | case 38400: |
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| 115 | case 57600: |
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| 116 | case 115200: |
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| 117 | break; |
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| 118 | default: |
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| 119 | assert(0); |
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| 120 | return; |
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| 121 | } |
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| 122 | |
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| 123 | /* Set DLAB bit to 1 */ |
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| 124 | uwrite(uart, LCR, DLAB); |
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| 125 | |
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| 126 | /* Set baud rate */ |
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| 127 | uwrite(uart, DLL, (BSPBaseBaud/baud) & 0xff); |
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| 128 | uwrite(uart, DLM, ((BSPBaseBaud/baud) >> 8) & 0xff); |
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| 129 | |
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| 130 | /* 8-bit, no parity , 1 stop */ |
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| 131 | uwrite(uart, LCR, CHR_8_BITS); |
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| 132 | |
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| 133 | |
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| 134 | /* Set DTR, RTS and OUT2 high */ |
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| 135 | uwrite(uart, MCR, DTR | RTS | OUT_2); |
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| 136 | |
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| 137 | /* Enable FIFO */ |
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| 138 | uwrite(uart, FCR, FIFO_EN | XMIT_RESET | RCV_RESET | RECEIVE_FIFO_TRIGGER12); |
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| 139 | |
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| 140 | /* Disable Interrupts */ |
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| 141 | uwrite(uart, IER, 0); |
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| 142 | |
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| 143 | /* Read status to clear them */ |
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| 144 | tmp = uread(uart, LSR); |
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| 145 | tmp = uread(uart, RBR); |
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| 146 | tmp = uread(uart, MSR); |
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| 147 | |
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| 148 | /* Remember state */ |
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| 149 | uart_data[uart].hwFlow = hwFlow; |
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| 150 | uart_data[uart].baud = baud; |
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| 151 | return; |
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| 152 | } |
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| 153 | |
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| 154 | /* |
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| 155 | * Set baud |
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| 156 | */ |
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| 157 | void |
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| 158 | BSP_uart_set_baud(int uart, int baud) |
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| 159 | { |
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| 160 | unsigned char mcr, ier; |
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| 161 | |
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| 162 | /* Sanity check */ |
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| 163 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 164 | |
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| 165 | /* |
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| 166 | * This function may be called whenever TERMIOS parameters |
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[947c27aa] | 167 | * are changed, so we have to make sure that baud change is |
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[0ebbf66] | 168 | * indeed required |
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| 169 | */ |
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| 170 | |
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| 171 | if(baud == uart_data[uart].baud) |
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| 172 | { |
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| 173 | return; |
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| 174 | } |
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| 175 | |
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| 176 | mcr = uread(uart, MCR); |
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| 177 | ier = uread(uart, IER); |
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| 178 | |
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| 179 | BSP_uart_init(uart, baud, uart_data[uart].hwFlow); |
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| 180 | |
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| 181 | uwrite(uart, MCR, mcr); |
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| 182 | uwrite(uart, IER, ier); |
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| 183 | |
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| 184 | return; |
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| 185 | } |
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| 186 | |
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| 187 | /* |
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| 188 | * Enable/disable interrupts |
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| 189 | */ |
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| 190 | void |
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| 191 | BSP_uart_intr_ctrl(int uart, int cmd) |
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| 192 | { |
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| 193 | |
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| 194 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 195 | |
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| 196 | switch(cmd) |
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| 197 | { |
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| 198 | case BSP_UART_INTR_CTRL_DISABLE: |
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| 199 | uwrite(uart, IER, INTERRUPT_DISABLE); |
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| 200 | break; |
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| 201 | case BSP_UART_INTR_CTRL_ENABLE: |
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| 202 | if(uart_data[uart].hwFlow) |
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| 203 | { |
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| 204 | uwrite(uart, IER, |
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| 205 | (RECEIVE_ENABLE | |
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| 206 | TRANSMIT_ENABLE | |
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| 207 | RECEIVER_LINE_ST_ENABLE | |
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| 208 | MODEM_ENABLE |
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| 209 | ) |
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| 210 | ); |
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| 211 | } |
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| 212 | else |
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| 213 | { |
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| 214 | uwrite(uart, IER, |
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| 215 | (RECEIVE_ENABLE | |
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| 216 | TRANSMIT_ENABLE | |
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| 217 | RECEIVER_LINE_ST_ENABLE |
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| 218 | ) |
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| 219 | ); |
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| 220 | } |
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| 221 | break; |
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| 222 | case BSP_UART_INTR_CTRL_TERMIOS: |
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| 223 | if(uart_data[uart].hwFlow) |
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| 224 | { |
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| 225 | uwrite(uart, IER, |
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| 226 | (RECEIVE_ENABLE | |
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| 227 | RECEIVER_LINE_ST_ENABLE | |
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| 228 | MODEM_ENABLE |
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| 229 | ) |
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| 230 | ); |
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| 231 | } |
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| 232 | else |
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| 233 | { |
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| 234 | uwrite(uart, IER, |
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| 235 | (RECEIVE_ENABLE | |
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| 236 | RECEIVER_LINE_ST_ENABLE |
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| 237 | ) |
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| 238 | ); |
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| 239 | } |
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| 240 | break; |
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| 241 | case BSP_UART_INTR_CTRL_GDB: |
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| 242 | uwrite(uart, IER, RECEIVE_ENABLE); |
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| 243 | break; |
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| 244 | default: |
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| 245 | assert(0); |
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| 246 | break; |
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| 247 | } |
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| 248 | |
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| 249 | return; |
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| 250 | } |
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| 251 | |
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| 252 | void |
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| 253 | BSP_uart_throttle(int uart) |
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| 254 | { |
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| 255 | unsigned int mcr; |
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| 256 | |
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| 257 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 258 | |
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| 259 | if(!uart_data[uart].hwFlow) |
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| 260 | { |
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| 261 | /* Should not happen */ |
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| 262 | assert(0); |
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| 263 | return; |
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| 264 | } |
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| 265 | mcr = uread (uart, MCR); |
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| 266 | /* RTS down */ |
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| 267 | mcr &= ~RTS; |
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| 268 | uwrite(uart, MCR, mcr); |
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| 269 | |
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| 270 | return; |
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| 271 | } |
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| 272 | |
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| 273 | void |
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| 274 | BSP_uart_unthrottle(int uart) |
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| 275 | { |
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| 276 | unsigned int mcr; |
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| 277 | |
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| 278 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 279 | |
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| 280 | if(!uart_data[uart].hwFlow) |
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| 281 | { |
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| 282 | /* Should not happen */ |
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| 283 | assert(0); |
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| 284 | return; |
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| 285 | } |
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| 286 | mcr = uread (uart, MCR); |
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| 287 | /* RTS up */ |
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| 288 | mcr |= RTS; |
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| 289 | uwrite(uart, MCR, mcr); |
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| 290 | |
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| 291 | return; |
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| 292 | } |
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| 293 | |
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| 294 | /* |
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| 295 | * Status function, -1 if error |
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| 296 | * detected, 0 if no received chars available, |
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| 297 | * 1 if received char available, 2 if break |
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| 298 | * is detected, it will eat break and error |
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| 299 | * chars. It ignores overruns - we cannot do |
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| 300 | * anything about - it execpt count statistics |
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| 301 | * and we are not counting it. |
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| 302 | */ |
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| 303 | int |
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| 304 | BSP_uart_polled_status(int uart) |
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| 305 | { |
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| 306 | unsigned char val; |
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| 307 | |
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| 308 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 309 | |
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| 310 | val = uread(uart, LSR); |
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| 311 | |
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| 312 | if(val & BI) |
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| 313 | { |
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| 314 | /* BREAK found, eat character */ |
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| 315 | uread(uart, RBR); |
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| 316 | return BSP_UART_STATUS_BREAK; |
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| 317 | } |
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| 318 | |
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| 319 | if((val & (DR | OE | FE)) == 1) |
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| 320 | { |
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| 321 | /* No error, character present */ |
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| 322 | return BSP_UART_STATUS_CHAR; |
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| 323 | } |
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| 324 | |
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| 325 | if((val & (DR | OE | FE)) == 0) |
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| 326 | { |
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| 327 | /* Nothing */ |
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| 328 | return BSP_UART_STATUS_NOCHAR; |
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| 329 | } |
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| 330 | |
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| 331 | /* |
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| 332 | * Framing or parity error |
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| 333 | * eat character |
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| 334 | */ |
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| 335 | uread(uart, RBR); |
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| 336 | |
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| 337 | return BSP_UART_STATUS_ERROR; |
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| 338 | } |
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| 339 | |
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| 340 | |
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| 341 | /* |
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| 342 | * Polled mode write function |
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| 343 | */ |
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| 344 | void |
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| 345 | BSP_uart_polled_write(int uart, int val) |
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| 346 | { |
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| 347 | unsigned char val1; |
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| 348 | |
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| 349 | /* Sanity check */ |
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| 350 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 351 | |
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| 352 | for(;;) |
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| 353 | { |
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| 354 | if((val1=uread(uart, LSR)) & THRE) |
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| 355 | { |
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| 356 | break; |
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| 357 | } |
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| 358 | } |
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| 359 | |
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| 360 | if(uart_data[uart].hwFlow) |
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| 361 | { |
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| 362 | for(;;) |
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| 363 | { |
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| 364 | if(uread(uart, MSR) & CTS) |
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| 365 | { |
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| 366 | break; |
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| 367 | } |
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| 368 | } |
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| 369 | } |
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| 370 | |
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| 371 | uwrite(uart, THR, val & 0xff); |
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| 372 | |
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| 373 | return; |
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| 374 | } |
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| 375 | |
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| 376 | void |
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| 377 | BSP_output_char_via_serial(int val) |
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| 378 | { |
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| 379 | BSP_uart_polled_write(BSPConsolePort, val); |
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| 380 | if (val == '\n') BSP_uart_polled_write(BSPConsolePort,'\r'); |
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| 381 | } |
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| 382 | |
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| 383 | /* |
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| 384 | * Polled mode read function |
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| 385 | */ |
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| 386 | int |
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| 387 | BSP_uart_polled_read(int uart) |
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| 388 | { |
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| 389 | unsigned char val; |
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| 390 | |
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| 391 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 392 | |
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| 393 | for(;;) |
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| 394 | { |
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| 395 | if(uread(uart, LSR) & DR) |
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| 396 | { |
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| 397 | break; |
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| 398 | } |
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| 399 | } |
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| 400 | |
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| 401 | val = uread(uart, RBR); |
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| 402 | |
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| 403 | return (int)(val & 0xff); |
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| 404 | } |
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| 405 | |
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| 406 | unsigned |
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| 407 | BSP_poll_char_via_serial() |
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| 408 | { |
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| 409 | return BSP_uart_polled_read(BSPConsolePort); |
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| 410 | } |
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| 411 | |
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| 412 | |
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| 413 | /* ================ Termios support =================*/ |
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| 414 | |
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| 415 | static volatile int termios_stopped_com1 = 0; |
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| 416 | static volatile int termios_tx_active_com1 = 0; |
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| 417 | static void* termios_ttyp_com1 = NULL; |
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| 418 | static char termios_tx_hold_com1 = 0; |
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| 419 | static volatile char termios_tx_hold_valid_com1 = 0; |
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| 420 | |
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| 421 | static volatile int termios_stopped_com2 = 0; |
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| 422 | static volatile int termios_tx_active_com2 = 0; |
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| 423 | static void* termios_ttyp_com2 = NULL; |
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| 424 | static char termios_tx_hold_com2 = 0; |
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| 425 | static volatile char termios_tx_hold_valid_com2 = 0; |
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| 426 | |
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| 427 | /* |
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| 428 | * Set channel parameters |
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| 429 | */ |
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| 430 | void |
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| 431 | BSP_uart_termios_set(int uart, void *ttyp) |
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| 432 | { |
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| 433 | unsigned char val; |
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| 434 | assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); |
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| 435 | |
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| 436 | if(uart == BSP_UART_COM1) |
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| 437 | { |
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| 438 | if(uart_data[uart].hwFlow) |
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| 439 | { |
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| 440 | val = uread(uart, MSR); |
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| 441 | |
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| 442 | termios_stopped_com1 = (val & CTS) ? 0 : 1; |
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| 443 | } |
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| 444 | else |
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| 445 | { |
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| 446 | termios_stopped_com1 = 0; |
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| 447 | } |
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| 448 | termios_tx_active_com1 = 0; |
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| 449 | termios_ttyp_com1 = ttyp; |
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| 450 | termios_tx_hold_com1 = 0; |
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| 451 | termios_tx_hold_valid_com1 = 0; |
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| 452 | } |
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| 453 | else |
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| 454 | { |
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| 455 | if(uart_data[uart].hwFlow) |
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| 456 | { |
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| 457 | val = uread(uart, MSR); |
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| 458 | |
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| 459 | termios_stopped_com2 = (val & CTS) ? 0 : 1; |
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| 460 | } |
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| 461 | else |
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| 462 | { |
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| 463 | termios_stopped_com2 = 0; |
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| 464 | } |
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| 465 | termios_tx_active_com2 = 0; |
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| 466 | termios_ttyp_com2 = ttyp; |
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| 467 | termios_tx_hold_com2 = 0; |
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| 468 | termios_tx_hold_valid_com2 = 0; |
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| 469 | } |
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| 470 | |
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| 471 | return; |
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| 472 | } |
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| 473 | |
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| 474 | int |
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| 475 | BSP_uart_termios_write_com1(int minor, const char *buf, int len) |
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| 476 | { |
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| 477 | assert(buf != NULL); |
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| 478 | |
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| 479 | if(len <= 0) |
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| 480 | { |
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| 481 | return 0; |
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| 482 | } |
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| 483 | |
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| 484 | /* If there TX buffer is busy - something is royally screwed up */ |
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| 485 | assert((uread(BSP_UART_COM1, LSR) & THRE) != 0); |
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| 486 | |
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| 487 | if(termios_stopped_com1) |
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| 488 | { |
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| 489 | /* CTS low */ |
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| 490 | termios_tx_hold_com1 = *buf; |
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| 491 | termios_tx_hold_valid_com1 = 1; |
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| 492 | return 0; |
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| 493 | } |
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| 494 | |
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| 495 | /* Write character */ |
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| 496 | uwrite(BSP_UART_COM1, THR, *buf & 0xff); |
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| 497 | |
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| 498 | /* Enable interrupts if necessary */ |
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| 499 | if(!termios_tx_active_com1 && uart_data[BSP_UART_COM1].hwFlow) |
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| 500 | { |
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| 501 | termios_tx_active_com1 = 1; |
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| 502 | uwrite(BSP_UART_COM1, IER, |
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| 503 | (RECEIVE_ENABLE | |
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| 504 | TRANSMIT_ENABLE | |
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| 505 | RECEIVER_LINE_ST_ENABLE | |
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| 506 | MODEM_ENABLE |
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| 507 | ) |
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| 508 | ); |
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| 509 | } |
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| 510 | else if(!termios_tx_active_com1) |
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| 511 | { |
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| 512 | termios_tx_active_com1 = 1; |
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| 513 | uwrite(BSP_UART_COM1, IER, |
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| 514 | (RECEIVE_ENABLE | |
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| 515 | TRANSMIT_ENABLE | |
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| 516 | RECEIVER_LINE_ST_ENABLE |
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| 517 | ) |
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| 518 | ); |
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| 519 | } |
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| 520 | |
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| 521 | return 0; |
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| 522 | } |
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| 523 | |
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| 524 | int |
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| 525 | BSP_uart_termios_write_com2(int minor, const char *buf, int len) |
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| 526 | { |
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| 527 | assert(buf != NULL); |
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| 528 | |
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| 529 | if(len <= 0) |
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| 530 | { |
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| 531 | return 0; |
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| 532 | } |
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| 533 | |
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| 534 | |
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| 535 | /* If there TX buffer is busy - something is royally screwed up */ |
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| 536 | assert((uread(BSP_UART_COM2, LSR) & THRE) != 0); |
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| 537 | |
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| 538 | if(termios_stopped_com2) |
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| 539 | { |
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| 540 | /* CTS low */ |
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| 541 | termios_tx_hold_com2 = *buf; |
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| 542 | termios_tx_hold_valid_com2 = 1; |
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| 543 | return 0; |
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| 544 | } |
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| 545 | |
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| 546 | /* Write character */ |
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| 547 | |
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| 548 | uwrite(BSP_UART_COM2, THR, *buf & 0xff); |
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| 549 | |
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| 550 | /* Enable interrupts if necessary */ |
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| 551 | if(!termios_tx_active_com2 && uart_data[BSP_UART_COM2].hwFlow) |
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| 552 | { |
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| 553 | termios_tx_active_com2 = 1; |
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| 554 | uwrite(BSP_UART_COM2, IER, |
---|
| 555 | (RECEIVE_ENABLE | |
---|
| 556 | TRANSMIT_ENABLE | |
---|
| 557 | RECEIVER_LINE_ST_ENABLE | |
---|
| 558 | MODEM_ENABLE |
---|
| 559 | ) |
---|
| 560 | ); |
---|
| 561 | } |
---|
| 562 | else if(!termios_tx_active_com2) |
---|
| 563 | { |
---|
| 564 | termios_tx_active_com2 = 1; |
---|
| 565 | uwrite(BSP_UART_COM2, IER, |
---|
| 566 | (RECEIVE_ENABLE | |
---|
| 567 | TRANSMIT_ENABLE | |
---|
| 568 | RECEIVER_LINE_ST_ENABLE |
---|
| 569 | ) |
---|
| 570 | ); |
---|
| 571 | } |
---|
| 572 | |
---|
| 573 | return 0; |
---|
| 574 | } |
---|
| 575 | |
---|
| 576 | |
---|
| 577 | void |
---|
| 578 | BSP_uart_termios_isr_com1(void) |
---|
| 579 | { |
---|
| 580 | unsigned char buf[40]; |
---|
| 581 | unsigned char val; |
---|
| 582 | int off, ret, vect; |
---|
| 583 | |
---|
| 584 | off = 0; |
---|
| 585 | |
---|
| 586 | for(;;) |
---|
| 587 | { |
---|
| 588 | vect = uread(BSP_UART_COM1, IIR) & 0xf; |
---|
| 589 | |
---|
| 590 | switch(vect) |
---|
| 591 | { |
---|
| 592 | case MODEM_STATUS : |
---|
| 593 | val = uread(BSP_UART_COM1, MSR); |
---|
| 594 | if(uart_data[BSP_UART_COM1].hwFlow) |
---|
| 595 | { |
---|
| 596 | if(val & CTS) |
---|
| 597 | { |
---|
| 598 | /* CTS high */ |
---|
| 599 | termios_stopped_com1 = 0; |
---|
| 600 | if(termios_tx_hold_valid_com1) |
---|
| 601 | { |
---|
| 602 | termios_tx_hold_valid_com1 = 0; |
---|
| 603 | BSP_uart_termios_write_com1(0, &termios_tx_hold_com1, |
---|
| 604 | 1); |
---|
| 605 | } |
---|
| 606 | } |
---|
| 607 | else |
---|
| 608 | { |
---|
| 609 | /* CTS low */ |
---|
| 610 | termios_stopped_com1 = 1; |
---|
| 611 | } |
---|
| 612 | } |
---|
| 613 | break; |
---|
| 614 | case NO_MORE_INTR : |
---|
| 615 | /* No more interrupts */ |
---|
| 616 | if(off != 0) |
---|
| 617 | { |
---|
| 618 | /* Update rx buffer */ |
---|
| 619 | rtems_termios_enqueue_raw_characters(termios_ttyp_com1, |
---|
| 620 | (char *)buf, |
---|
| 621 | off); |
---|
| 622 | } |
---|
| 623 | return; |
---|
| 624 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
| 625 | /* |
---|
| 626 | * TX holding empty: we have to disable these interrupts |
---|
| 627 | * if there is nothing more to send. |
---|
| 628 | */ |
---|
| 629 | |
---|
| 630 | ret = rtems_termios_dequeue_characters(termios_ttyp_com1, 1); |
---|
| 631 | |
---|
| 632 | /* If nothing else to send disable interrupts */ |
---|
| 633 | if(ret == 0 && uart_data[BSP_UART_COM1].hwFlow) |
---|
| 634 | { |
---|
| 635 | uwrite(BSP_UART_COM1, IER, |
---|
| 636 | (RECEIVE_ENABLE | |
---|
| 637 | RECEIVER_LINE_ST_ENABLE | |
---|
| 638 | MODEM_ENABLE |
---|
| 639 | ) |
---|
| 640 | ); |
---|
| 641 | termios_tx_active_com1 = 0; |
---|
| 642 | } |
---|
| 643 | else if(ret == 0) |
---|
| 644 | { |
---|
| 645 | uwrite(BSP_UART_COM1, IER, |
---|
| 646 | (RECEIVE_ENABLE | |
---|
| 647 | RECEIVER_LINE_ST_ENABLE |
---|
| 648 | ) |
---|
| 649 | ); |
---|
| 650 | termios_tx_active_com1 = 0; |
---|
| 651 | } |
---|
| 652 | break; |
---|
| 653 | case RECEIVER_DATA_AVAIL : |
---|
| 654 | case CHARACTER_TIMEOUT_INDICATION: |
---|
| 655 | /* RX data ready */ |
---|
| 656 | assert(off < sizeof(buf)); |
---|
| 657 | buf[off++] = uread(BSP_UART_COM1, RBR); |
---|
| 658 | break; |
---|
| 659 | case RECEIVER_ERROR: |
---|
| 660 | /* RX error: eat character */ |
---|
| 661 | uartError(BSP_UART_COM1); |
---|
| 662 | break; |
---|
| 663 | default: |
---|
| 664 | /* Should not happen */ |
---|
| 665 | assert(0); |
---|
| 666 | return; |
---|
| 667 | } |
---|
| 668 | } |
---|
| 669 | } |
---|
| 670 | |
---|
| 671 | void |
---|
| 672 | BSP_uart_termios_isr_com2() |
---|
| 673 | { |
---|
| 674 | unsigned char buf[40]; |
---|
| 675 | unsigned char val; |
---|
| 676 | int off, ret, vect; |
---|
| 677 | |
---|
| 678 | off = 0; |
---|
| 679 | |
---|
| 680 | for(;;) |
---|
| 681 | { |
---|
| 682 | vect = uread(BSP_UART_COM2, IIR) & 0xf; |
---|
| 683 | |
---|
| 684 | switch(vect) |
---|
| 685 | { |
---|
| 686 | case MODEM_STATUS : |
---|
| 687 | val = uread(BSP_UART_COM2, MSR); |
---|
| 688 | if(uart_data[BSP_UART_COM2].hwFlow) |
---|
| 689 | { |
---|
| 690 | if(val & CTS) |
---|
| 691 | { |
---|
| 692 | /* CTS high */ |
---|
| 693 | termios_stopped_com2 = 0; |
---|
| 694 | if(termios_tx_hold_valid_com2) |
---|
| 695 | { |
---|
| 696 | termios_tx_hold_valid_com2 = 0; |
---|
| 697 | BSP_uart_termios_write_com2(0, &termios_tx_hold_com2, |
---|
| 698 | 1); |
---|
| 699 | } |
---|
| 700 | } |
---|
| 701 | else |
---|
| 702 | { |
---|
| 703 | /* CTS low */ |
---|
| 704 | termios_stopped_com2 = 1; |
---|
| 705 | } |
---|
| 706 | } |
---|
| 707 | break; |
---|
| 708 | case NO_MORE_INTR : |
---|
| 709 | /* No more interrupts */ |
---|
| 710 | if(off != 0) |
---|
| 711 | { |
---|
| 712 | /* Update rx buffer */ |
---|
| 713 | rtems_termios_enqueue_raw_characters(termios_ttyp_com2, |
---|
| 714 | (char *)buf, |
---|
| 715 | off); |
---|
| 716 | } |
---|
| 717 | return; |
---|
| 718 | case TRANSMITTER_HODING_REGISTER_EMPTY : |
---|
| 719 | /* |
---|
| 720 | * TX holding empty: we have to disable these interrupts |
---|
| 721 | * if there is nothing more to send. |
---|
| 722 | */ |
---|
| 723 | |
---|
| 724 | ret = rtems_termios_dequeue_characters(termios_ttyp_com2, 1); |
---|
| 725 | |
---|
| 726 | /* If nothing else to send disable interrupts */ |
---|
| 727 | if(ret == 0 && uart_data[BSP_UART_COM2].hwFlow) |
---|
| 728 | { |
---|
| 729 | uwrite(BSP_UART_COM2, IER, |
---|
| 730 | (RECEIVE_ENABLE | |
---|
| 731 | RECEIVER_LINE_ST_ENABLE | |
---|
| 732 | MODEM_ENABLE |
---|
| 733 | ) |
---|
| 734 | ); |
---|
| 735 | termios_tx_active_com2 = 0; |
---|
| 736 | } |
---|
| 737 | else if(ret == 0) |
---|
| 738 | { |
---|
| 739 | uwrite(BSP_UART_COM2, IER, |
---|
| 740 | (RECEIVE_ENABLE | |
---|
| 741 | RECEIVER_LINE_ST_ENABLE |
---|
| 742 | ) |
---|
| 743 | ); |
---|
| 744 | termios_tx_active_com2 = 0; |
---|
| 745 | } |
---|
| 746 | break; |
---|
| 747 | case RECEIVER_DATA_AVAIL : |
---|
| 748 | case CHARACTER_TIMEOUT_INDICATION: |
---|
| 749 | /* RX data ready */ |
---|
| 750 | assert(off < sizeof(buf)); |
---|
| 751 | buf[off++] = uread(BSP_UART_COM2, RBR); |
---|
| 752 | break; |
---|
| 753 | case RECEIVER_ERROR: |
---|
| 754 | /* RX error: eat character */ |
---|
| 755 | uartError(BSP_UART_COM2); |
---|
| 756 | break; |
---|
| 757 | default: |
---|
| 758 | /* Should not happen */ |
---|
| 759 | assert(0); |
---|
| 760 | return; |
---|
| 761 | } |
---|
| 762 | } |
---|
| 763 | } |
---|
| 764 | |
---|
| 765 | |
---|
| 766 | /* ================= GDB support ===================*/ |
---|
[96b46bf] | 767 | static int sav[4] __attribute__ ((unused)); |
---|
[0ebbf66] | 768 | |
---|
| 769 | /* |
---|
| 770 | * Interrupt service routine for COM1 - all, |
---|
| 771 | * it does it check whether ^C is received |
---|
| 772 | * if yes it will flip TF bit before returning |
---|
| 773 | * Note: it should be installed as raw interrupt |
---|
| 774 | * handler |
---|
| 775 | */ |
---|
| 776 | |
---|
| 777 | asm (".p2align 4"); |
---|
| 778 | asm (".text"); |
---|
| 779 | asm (".globl BSP_uart_dbgisr_com1"); |
---|
| 780 | asm ("BSP_uart_dbgisr_com1:"); |
---|
| 781 | asm (" movl %eax, sav"); /* Save eax */ |
---|
| 782 | asm (" movl %ebx, sav + 4"); /* Save ebx */ |
---|
| 783 | asm (" movl %edx, sav + 8"); /* Save edx */ |
---|
| 784 | |
---|
| 785 | asm (" movl $0, %ebx"); /* Clear flag */ |
---|
| 786 | |
---|
| 787 | /* |
---|
| 788 | * We know that only receive related interrupts |
---|
| 789 | * are available, eat chars |
---|
| 790 | */ |
---|
| 791 | asm ("uart_dbgisr_com1_1:"); |
---|
| 792 | asm (" movw $0x3FD, %dx"); |
---|
| 793 | asm (" inb %dx, %al"); /* Read LSR */ |
---|
| 794 | asm (" andb $1, %al"); |
---|
| 795 | asm (" cmpb $0, %al"); |
---|
| 796 | asm (" je uart_dbgisr_com1_2"); |
---|
| 797 | asm (" movw $0x3F8, %dx"); |
---|
| 798 | asm (" inb %dx, %al"); /* Get input character */ |
---|
| 799 | asm (" cmpb $3, %al"); |
---|
| 800 | asm (" jne uart_dbgisr_com1_1"); |
---|
| 801 | |
---|
| 802 | /* ^C received, set flag */ |
---|
| 803 | asm (" movl $1, %ebx"); |
---|
| 804 | asm (" jmp uart_dbgisr_com1_1"); |
---|
| 805 | |
---|
| 806 | /* All chars read */ |
---|
| 807 | asm ("uart_dbgisr_com1_2:"); |
---|
| 808 | |
---|
| 809 | /* If flag is set we have to tweak TF */ |
---|
| 810 | asm (" cmpl $0, %ebx"); |
---|
| 811 | asm (" je uart_dbgisr_com1_3"); |
---|
| 812 | |
---|
| 813 | /* Flag is set */ |
---|
| 814 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
| 815 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
| 816 | |
---|
| 817 | /* Set TF bit */ |
---|
| 818 | asm (" popl %eax"); /* Pop eip */ |
---|
| 819 | asm (" movl %eax, sav + 4"); /* Save it */ |
---|
| 820 | asm (" popl %eax"); /* Pop cs */ |
---|
| 821 | asm (" movl %eax, sav + 8"); /* Save it */ |
---|
| 822 | asm (" popl %eax"); /* Pop flags */ |
---|
| 823 | asm (" orl $0x100, %eax"); /* Modify it */ |
---|
| 824 | asm (" pushl %eax"); /* Push it back */ |
---|
| 825 | asm (" movl sav+8, %eax"); /* Put back cs */ |
---|
| 826 | asm (" pushl %eax"); |
---|
| 827 | asm (" movl sav+4, %eax"); /* Put back eip */ |
---|
| 828 | asm (" pushl %eax"); |
---|
| 829 | |
---|
| 830 | /* Acknowledge IRQ */ |
---|
| 831 | asm (" movb $0x20, %al"); |
---|
| 832 | asm (" outb %al, $0x20"); |
---|
| 833 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
| 834 | asm (" iret"); /* Done */ |
---|
| 835 | |
---|
| 836 | /* Flag is not set */ |
---|
| 837 | asm("uart_dbgisr_com1_3:"); |
---|
| 838 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
| 839 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
| 840 | |
---|
| 841 | /* Acknowledge irq */ |
---|
| 842 | asm (" movb $0x20, %al"); |
---|
| 843 | asm (" outb %al, $0x20"); |
---|
| 844 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
| 845 | asm (" iret"); /* Done */ |
---|
| 846 | |
---|
| 847 | |
---|
| 848 | /* |
---|
| 849 | * Interrupt service routine for COM2 - all, |
---|
| 850 | * it does it check whether ^C is received |
---|
| 851 | * if yes it will flip TF bit before returning |
---|
| 852 | * Note: it has to be installed as raw interrupt |
---|
| 853 | * handler |
---|
| 854 | */ |
---|
| 855 | asm (".p2align 4"); |
---|
| 856 | asm (".text"); |
---|
| 857 | asm (".globl BSP_uart_dbgisr_com2"); |
---|
| 858 | asm ("BSP_uart_dbgisr_com2:"); |
---|
| 859 | asm (" movl %eax, sav"); /* Save eax */ |
---|
| 860 | asm (" movl %ebx, sav + 4"); /* Save ebx */ |
---|
| 861 | asm (" movl %edx, sav + 8"); /* Save edx */ |
---|
| 862 | |
---|
| 863 | asm (" movl $0, %ebx"); /* Clear flag */ |
---|
| 864 | |
---|
| 865 | /* |
---|
| 866 | * We know that only receive related interrupts |
---|
| 867 | * are available, eat chars |
---|
| 868 | */ |
---|
| 869 | asm ("uart_dbgisr_com2_1:"); |
---|
| 870 | asm (" movw $0x2FD, %dx"); |
---|
| 871 | asm (" inb %dx, %al"); /* Read LSR */ |
---|
| 872 | asm (" andb $1, %al"); |
---|
| 873 | asm (" cmpb $0, %al"); |
---|
| 874 | asm (" je uart_dbgisr_com2_2"); |
---|
| 875 | asm (" movw $0x2F8, %dx"); |
---|
| 876 | asm (" inb %dx, %al"); /* Get input character */ |
---|
| 877 | asm (" cmpb $3, %al"); |
---|
| 878 | asm (" jne uart_dbgisr_com2_1"); |
---|
| 879 | |
---|
| 880 | /* ^C received, set flag */ |
---|
| 881 | asm (" movl $1, %ebx"); |
---|
| 882 | asm (" jmp uart_dbgisr_com2_1"); |
---|
| 883 | |
---|
| 884 | /* All chars read */ |
---|
| 885 | asm ("uart_dbgisr_com2_2:"); |
---|
| 886 | |
---|
| 887 | /* If flag is set we have to tweak TF */ |
---|
| 888 | asm (" cmpl $0, %ebx"); |
---|
| 889 | asm (" je uart_dbgisr_com2_3"); |
---|
| 890 | |
---|
| 891 | /* Flag is set */ |
---|
| 892 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
| 893 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
| 894 | |
---|
| 895 | /* Set TF bit */ |
---|
| 896 | asm (" popl %eax"); /* Pop eip */ |
---|
| 897 | asm (" movl %eax, sav + 4"); /* Save it */ |
---|
| 898 | asm (" popl %eax"); /* Pop cs */ |
---|
| 899 | asm (" movl %eax, sav + 8"); /* Save it */ |
---|
| 900 | asm (" popl %eax"); /* Pop flags */ |
---|
| 901 | asm (" orl $0x100, %eax"); /* Modify it */ |
---|
| 902 | asm (" pushl %eax"); /* Push it back */ |
---|
| 903 | asm (" movl sav+8, %eax"); /* Put back cs */ |
---|
| 904 | asm (" pushl %eax"); |
---|
| 905 | asm (" movl sav+4, %eax"); /* Put back eip */ |
---|
| 906 | asm (" pushl %eax"); |
---|
| 907 | |
---|
| 908 | /* Acknowledge IRQ */ |
---|
| 909 | asm (" movb $0x20, %al"); |
---|
| 910 | asm (" outb %al, $0x20"); |
---|
| 911 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
| 912 | asm (" iret"); /* Done */ |
---|
| 913 | |
---|
| 914 | /* Flag is not set */ |
---|
| 915 | asm("uart_dbgisr_com2_3:"); |
---|
| 916 | asm (" movl sav+4, %ebx"); /* Restore ebx */ |
---|
| 917 | asm (" movl sav+8, %edx"); /* Restore edx */ |
---|
| 918 | |
---|
| 919 | /* Acknowledge irq */ |
---|
| 920 | asm (" movb $0x20, %al"); |
---|
| 921 | asm (" outb %al, $0x20"); |
---|
| 922 | asm (" movl sav, %eax"); /* Restore eax */ |
---|
| 923 | asm (" iret"); /* Done */ |
---|
| 924 | |
---|
| 925 | |
---|
| 926 | |
---|
| 927 | |
---|
| 928 | |
---|
| 929 | |
---|