source: rtems/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S @ 76c356f

4.104.114.84.95
Last change on this file since 76c356f was 76c356f, checked in by Joel Sherrill <joel.sherrill@…>, on 12/03/99 at 15:46:17

Patch from Aleksey (Quality Quorum <qqi@…>) to change the
delay loop in this BSP. Here is his response to a question about
the patch:

Yes, or that other machine has a different chipset with different
timing requirements on enabling Gate 20. I am strongly suspecting
that it may some how related to the video card I am using (on my
old P-75 target it was plain PCI VGA, on my new one it is Diamond Stealth
3D 2000).

  • Property mode set to 100644
File size: 7.5 KB
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1/*-------------------------------------------------------------------------+
2| ldsegs.s v1.1 - PC386 BSP - 1997/08/07
3+--------------------------------------------------------------------------+
4| This file assists the board independent startup code by loading the proper
5| segment register values. The values loaded are board dependent. In addition
6| it contains code to enable the A20 line and to reprogram the PIC to relocate
7| the IRQ interrupt vectors to 0x20 -> 0x2f.
8| NOTE: No stack has been established when this routine is invoked.
9|       It returns by jumping back to bspentry.
10+--------------------------------------------------------------------------+
11| (C) Copyright 1997 -
12| - NavIST Group - Real-Time Distributed Systems and Industrial Automation
13|
14| http://pandora.ist.utl.pt
15|
16| Instituto Superior Tecnico * Lisboa * PORTUGAL
17+--------------------------------------------------------------------------+
18| Disclaimer:
19|
20| This file is provided "AS IS" without warranty of any kind, either
21| expressed or implied.
22+--------------------------------------------------------------------------+
23| This code is base on:
24|   ldsegs.s,v 1.4 1996/04/20 16:48:30 joel Exp - go32 BSP
25| With the following copyright notice:
26| **************************************************************************
27| *  COPYRIGHT (c) 1989-1999.
28| *  On-Line Applications Research Corporation (OAR).
29| *
30| *  The license and distribution terms for this file may be
31| *  found in found in the file LICENSE in this distribution or at
32| *  http://www.OARcorp.com/rtems/license.html.
33| **************************************************************************
34|
35|  $Id$
36|
37| Also based on (from the Linux source tree):
38|   setup.S - Copyright (C) 1991, 1992 Linus Torvalds
39+--------------------------------------------------------------------------*/
40
41
42#include "asm.h"
43
44/*----------------------------------------------------------------------------+
45| CODE section
46+----------------------------------------------------------------------------*/
47EXTERN (rtems_i8259_masks)
48       
49BEGIN_CODE
50
51        EXTERN (_establish_stack)
52        EXTERN (Timer_exit)
53        EXTERN (clockOff)
54
55/*----------------------------------------------------------------------------+
56| delay
57+------------------------------------------------------------------------------
58| Delay is needed after doing I/O.
59|
60| The outb version is OK on most machines BUT the loop version ...
61|
62| will delay for 1us on 1Gz machine, it will take a little bit
63| longer on slower machines, however, it does not matter because we
64| are going to call this function only a few times
65
66+----------------------------------------------------------------------------*/
67        .p2align 4
68        .globl _delay
69        .globl delay
70delay:
71_delay:
72/*
73        outb    %al, $0xED      # about 1uS delay on most machines
74*/
75/*
76 
77        movl    $0x200, %eax
78delay1:
79        dec     %eax
80        jnz     delay1
81        ret
82
83
84/*-------------------------------------------------------------------------+
85|         Function: _load_segments
86|      Description: Current environment is standard PC booted by grub.
87|                   So, there is no value in saving current GDT and IDT
88|                   settings we have to set it up ourseves. (Naturally
89|                   it will be not so in case we are booted by some
90|                   boot monitor, however, then it will be different
91|                   BSP). After that we have to load board segment registers
92|                   with apropriate values +  reprogram PIC.
93| Global Variables: None.
94|        Arguments: None.
95|          Returns: Nothing.
96+--------------------------------------------------------------------------*/
97        .p2align 4
98       
99        PUBLIC (_load_segments)
100SYM (_load_segments):
101
102        lgdt SYM(gdtdesc)
103        lidt SYM(idtdesc)
104
105        /* Load CS, flush prefetched queue */
106        ljmp $0x8, $next_step
107
108next_step:     
109        /* Load segment registers */
110        movw $0x10, ax
111        movw ax, ss
112        movw ax, ds
113        movw ax, es
114        movw ax, fs
115        movw ax, gs
116
117/*---------------------------------------------------------------------+
118| Now we have to reprogram the interrupts :-(. We put them right after
119| the intel-reserved hardware interrupts, at int 0x20-0x2F. There they
120| won't mess up anything. Sadly IBM really messed this up with the
121| original PC, and they haven't been able to rectify it afterwards. Thus
122| the bios puts interrupts at 0x08-0x0f, which is used for the internal
123| hardware interrupts as well. We just have to reprogram the 8259's, and
124| it isn't fun.
125+---------------------------------------------------------------------*/
126
127        movb    $0x11, al               /* initialization sequence          */
128        outb    al, $0x20               /* send it to 8259A-1               */
129        call    SYM(delay)
130        outb    al, $0xA0               /* and to 8259A-2                   */
131        call    SYM(delay)
132       
133        movb    $0x20, al               /* start of hardware int's (0x20)   */
134        outb    al, $0x21
135        call    SYM(delay)
136        movb    $0x28, al               /* start of hardware int's 2 (0x28) */
137        outb    al, $0xA1
138        call    SYM(delay)
139       
140        movb    $0x04, al               /* 8259-1 is master                 */
141        outb    al, $0x21
142        call    SYM(delay)
143        movb    $0x02, al               /* 8259-2 is slave                  */
144        outb    al, $0xA1
145        call    SYM(delay)
146       
147        movb    $0x01, al               /* 8086 mode for both               */
148        outb    al, $0x21
149        call    SYM(delay)
150        outb    al, $0xA1
151        call    SYM(delay)
152       
153        movb    $0xFF, al               /* mask off all interrupts for now  */
154        outb    al, $0xA1
155        call    SYM(delay)
156        movb    $0xFB, al               /* mask all irq's but irq2 which    */
157        outb    al, $0x21               /* is cascaded                      */
158        call    SYM(delay)
159
160        movw    $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */
161       
162        jmp     SYM (_establish_stack)  # return to the bsp entry code
163
164/*-------------------------------------------------------------------------+
165|         Function: _return_to_monitor
166|      Description: Return to board's monitor (we have none so simply restart).
167| Global Variables: None.
168|        Arguments: None.
169|          Returns: Nothing.
170+--------------------------------------------------------------------------*/
171
172        .p2align 4
173       
174        PUBLIC (_return_to_monitor)
175SYM (_return_to_monitor):
176
177        call    SYM (Timer_exit)
178        call    SYM (Clock_exit)
179        jmp     SYM (start)
180
181/*-------------------------------------------------------------------------+
182|         Function: _default_int_handler
183|      Description: default interrupt handler
184| Global Variables: None.
185|        Arguments: None.
186|          Returns: Nothing.
187+--------------------------------------------------------------------------*/
188        .p2align 4
189       
190/*---------------------------------------------------------------------------+
191| GDT itself
192+--------------------------------------------------------------------------*/
193
194        .p2align 4
195               
196        PUBLIC (_Global_descriptor_table)
197SYM (_Global_descriptor_table):
198
199        /* NULL segment */
200        .word 0, 0     
201        .byte 0, 0, 0, 0
202
203        /* code segment */
204        .word 0xffff, 0
205        .byte 0, 0x9e, 0xcf, 0
206
207        /* data segment */
208        .word 0xffff, 0
209        .byte 0, 0x92, 0xcf, 0
210 
211
212/*---------------------------------------------------------------------------+
213| Descriptor of GDT
214+--------------------------------------------------------------------------*/
215SYM (gdtdesc):
216        .word (3*8 - 1) 
217        .long SYM (_Global_descriptor_table)
218
219
220/*---------------------------------------------------------------------------+
221| IDT itself
222+---------------------------------------------------------------------------*/
223        .p2align 4
224       
225        PUBLIC(Interrupt_descriptor_table)
226SYM(Interrupt_descriptor_table):
227        .rept 256
228        .word 0,0,0,0
229        .endr
230       
231/*---------------------------------------------------------------------------+
232| Descriptor of IDT
233+--------------------------------------------------------------------------*/
234SYM(idtdesc):   
235        .word  (256*8 - 1)
236        .long  SYM (Interrupt_descriptor_table)
237       
238END_CODE
239
240    .section .m_hdr
241        .long 0x1BADB002
242        .long 0
243        .long 0xE4524FFE
244END
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