source: rtems/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S @ 33645763

4.115
Last change on this file since 33645763 was 359e537, checked in by Ralf Corsepius <ralf.corsepius@…>, on 11/30/09 at 05:09:41

Whitespace removal.

  • Property mode set to 100644
File size: 7.5 KB
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1/*-------------------------------------------------------------------------+
2| ldsegs.s v1.1 - PC386 BSP - 1997/08/07
3+--------------------------------------------------------------------------+
4| This file assists the board independent startup code by loading the proper
5| segment register values. The values loaded are board dependent. In addition
6| it contains code to enable the A20 line and to reprogram the PIC to relocate
7| the IRQ interrupt vectors to 0x20 -> 0x2f.
8| NOTE: No stack has been established when this routine is invoked.
9|       It returns by jumping back to bspentry.
10+--------------------------------------------------------------------------+
11| (C) Copyright 1997 -
12| - NavIST Group - Real-Time Distributed Systems and Industrial Automation
13|
14| http://pandora.ist.utl.pt
15|
16| Instituto Superior Tecnico * Lisboa * PORTUGAL
17+--------------------------------------------------------------------------+
18| Disclaimer:
19|
20| This file is provided "AS IS" without warranty of any kind, either
21| expressed or implied.
22+--------------------------------------------------------------------------+
23| This code is base on:
24|   ldsegs.s,v 1.4 1996/04/20 16:48:30 joel Exp - go32 BSP
25| With the following copyright notice:
26| **************************************************************************
27| *  COPYRIGHT (c) 1989-1999.
28| *  On-Line Applications Research Corporation (OAR).
29| *
30| *  The license and distribution terms for this file may be
31| *  found in found in the file LICENSE in this distribution or at
32| *  http://www.rtems.com/license/LICENSE.
33| **************************************************************************
34|
35|  $Id$
36+--------------------------------------------------------------------------*/
37
38#include <rtems/asm.h>
39
40/*----------------------------------------------------------------------------+
41| CODE section
42+----------------------------------------------------------------------------*/
43EXTERN (rtems_i8259_masks)
44
45BEGIN_CODE
46
47        EXTERN (_establish_stack)
48        EXTERN (Timer_exit)
49        EXTERN (clockOff)
50
51/*----------------------------------------------------------------------------+
52| pc386_delay
53+------------------------------------------------------------------------------
54| Delay is needed after doing I/O.
55|
56| The outb version is OK on most machines BUT the loop version ...
57|
58| will delay for 1us on 1Gz machine, it will take a little bit
59| longer on slower machines, however, it does not matter because we
60| are going to call this function only a few times
61
62+----------------------------------------------------------------------------*/
63#define DELAY_USE_OUTB
64
65        .p2align 4
66        .globl _pc386_delay
67        .globl pc386_delay
68pc386_delay:
69_pc386_delay:
70#ifdef  DELAY_USE_OUTB
71        outb    al, $0x80       # about 1uS delay on most machines
72#else
73        movl    $0x200, eax
74pc386_delay1:
75        dec     eax
76        jnz     pc386_delay1
77#endif
78        ret
79
80/*-------------------------------------------------------------------------+
81|         Function: _load_segments
82|      Description: Current environment is standard PC booted by grub.
83|                   So, there is no value in saving current GDT and IDT
84|                   settings we have to set it up ourseves. (Naturally
85|                   it will be not so in case we are booted by some
86|                   boot monitor, however, then it will be different
87|                   BSP). After that we have to load board segment registers
88|                   with apropriate values +  reprogram PIC.
89| Global Variables: None.
90|        Arguments: None.
91|          Returns: Nothing.
92+--------------------------------------------------------------------------*/
93        .p2align 4
94
95        PUBLIC (_load_segments)
96SYM (_load_segments):
97
98        lgdt SYM(gdtdesc)
99        lidt SYM(idtdesc)
100
101        /* Load CS, flush prefetched queue */
102        ljmp $0x8, $next_step
103
104next_step:
105        /* Load segment registers */
106        movw $0x10, ax
107        movw ax, ss
108        movw ax, ds
109        movw ax, es
110        movw ax, fs
111        movw ax, gs
112
113/*---------------------------------------------------------------------+
114| Now we have to reprogram the interrupts :-(. We put them right after
115| the intel-reserved hardware interrupts, at int 0x20-0x2F. There they
116| won't mess up anything. Sadly IBM really messed this up with the
117| original PC, and they haven't been able to rectify it afterwards. Thus
118| the bios puts interrupts at 0x08-0x0f, which is used for the internal
119| hardware interrupts as well. We just have to reprogram the 8259's, and
120| it isn't fun.
121+---------------------------------------------------------------------*/
122
123        movb    $0x11, al               /* initialization sequence          */
124        outb    al, $0x20               /* send it to 8259A-1               */
125        call    SYM(pc386_delay)
126        outb    al, $0xA0               /* and to 8259A-2                   */
127        call    SYM(pc386_delay)
128
129        movb    $0x20, al               /* start of hardware int's (0x20)   */
130        outb    al, $0x21
131        call    SYM(pc386_delay)
132        movb    $0x28, al               /* start of hardware int's 2 (0x28) */
133        outb    al, $0xA1
134        call    SYM(pc386_delay)
135
136        movb    $0x04, al               /* 8259-1 is master                 */
137        outb    al, $0x21
138        call    SYM(pc386_delay)
139        movb    $0x02, al               /* 8259-2 is slave                  */
140        outb    al, $0xA1
141        call    SYM(pc386_delay)
142
143        movb    $0x01, al               /* 8086 mode for both               */
144        outb    al, $0x21
145        call    SYM(pc386_delay)
146        outb    al, $0xA1
147        call    SYM(pc386_delay)
148
149        movb    $0xFF, al               /* mask off all interrupts for now  */
150        outb    al, $0xA1
151        call    SYM(pc386_delay)
152        movb    $0xFB, al               /* mask all irq's but irq2 which    */
153        outb    al, $0x21               /* is cascaded                      */
154        call    SYM(pc386_delay)
155
156        movw    $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */
157
158        jmp     SYM (_establish_stack)  # return to the bsp entry code
159
160/*-------------------------------------------------------------------------+
161|         Function: _return_to_monitor
162|      Description: Return to board's monitor (we have none so simply restart).
163| Global Variables: None.
164|        Arguments: None.
165|          Returns: Nothing.
166+--------------------------------------------------------------------------*/
167
168        .p2align 4
169
170        PUBLIC (_return_to_monitor)
171SYM (_return_to_monitor):
172
173        call    SYM (Timer_exit)
174        call    SYM (Clock_exit)
175        jmp     SYM (start)
176
177/*-------------------------------------------------------------------------+
178|         Function: _default_int_handler
179|      Description: default interrupt handler
180| Global Variables: None.
181|        Arguments: None.
182|          Returns: Nothing.
183+--------------------------------------------------------------------------*/
184        .p2align 4
185
186/*---------------------------------------------------------------------------+
187| GDT itself
188+--------------------------------------------------------------------------*/
189
190BEGIN_DATA
191        .p2align 4
192
193        PUBLIC (_Global_descriptor_table)
194SYM (_Global_descriptor_table):
195
196        /* NULL segment */
197        .word 0, 0
198        .byte 0, 0, 0, 0
199
200        /* code segment */
201        .word 0xffff, 0
202        .byte 0, 0x9e, 0xcf, 0
203
204        /* data segment */
205        .word 0xffff, 0
206        .byte 0, 0x92, 0xcf, 0
207
208/*---------------------------------------------------------------------------+
209| Descriptor of GDT
210+--------------------------------------------------------------------------*/
211SYM (gdtdesc):
212        .word (3*8 - 1)
213        .long SYM (_Global_descriptor_table)
214
215/*---------------------------------------------------------------------------+
216| IDT itself
217+---------------------------------------------------------------------------*/
218        .p2align 4
219
220        PUBLIC(Interrupt_descriptor_table)
221SYM(Interrupt_descriptor_table):
222        .rept 256
223        .word 0,0,0,0
224        .endr
225
226/*---------------------------------------------------------------------------+
227| Descriptor of IDT
228+--------------------------------------------------------------------------*/
229
230        .p2align 4
231SYM(idtdesc):
232        .word  (256*8 - 1)
233        .long  SYM (Interrupt_descriptor_table)
234
235END_DATA
236
237    .section .m_hdr
238        .long 0x1BADB002
239        .long 0
240        .long 0xE4524FFE
241END
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