source: rtems/c/src/lib/libbsp/i386/pc386/start/start.S @ 7521e43

4.115
Last change on this file since 7521e43 was 7521e43, checked in by Jennifer Averett <Jennifer.Averett@…>, on Jul 14, 2011 at 3:07:21 PM

2011-07-14 Jennifer Averett <Jennifer.Averett@…>

  • start/start.S: Moved enable_sse into a subroutine that may be called from other cores on an SMP system.
  • Property mode set to 100644
File size: 9.8 KB
Line 
1/*-------------------------------------------------------------------------+
2| start.s v1.1 - PC386 BSP - 1997/08/07
3+--------------------------------------------------------------------------+
4| This file contains the entry point for the application.
5| The name of this entry point is compiler dependent.
6| It jumps to the BSP which is responsible for performing all initialization.
7+--------------------------------------------------------------------------+
8| (C) Copyright 1997 -
9| - NavIST Group - Real-Time Distributed Systems and Industrial Automation
10|
11| http://pandora.ist.utl.pt
12|
13| Instituto Superior Tecnico * Lisboa * PORTUGAL
14+--------------------------------------------------------------------------+
15| Modified the 20/05/1998  by valette@crf.canon.fr in order to give a working
16| example of eraly stage debugging via the DEBUG_EARLY_START define.
17+--------------------------------------------------------------------------+
18| Disclaimer:
19|
20| This file is provided "AS IS" without warranty of any kind, either
21| expressed or implied.
22+--------------------------------------------------------------------------+
23| This code is based on an earlier generation RTEMS i386 start.s and the
24| following copyright applies:
25|
26| **************************************************************************
27| *  COPYRIGHT (c) 1989-1999.
28| *  On-Line Applications Research Corporation (OAR).
29| *
30| *  The license and distribution terms for this file may be
31| *  found in the file LICENSE in this distribution or at
32| *  http://www.rtems.com/license/LICENSE.
33| **************************************************************************
34|
35|  $Id$
36+--------------------------------------------------------------------------*/
37
38/*
39 * The most trivial start.s possible. It does not know anything
40 * about system it is running on, so it will jump to appropriate
41 * place in BSP specific place to do things it knows nothing about
42 */
43
44#include <rtems/asm.h>
45#include <rtems/score/cpu.h>
46
47/*----------------------------------------------------------------------------+
48| Size of heap and stack:
49+----------------------------------------------------------------------------*/
50
51#ifndef CPU_STACK_ALIGNMENT
52#error  "Missing header ? CPU_STACK_ALIGNMENT NOT DEFINED"
53#endif
54
55.set STACK_SIZE, 0x1000
56
57/*----------------------------------------------------------------------------+
58| CODE section
59+----------------------------------------------------------------------------*/
60
61BEGIN_CODE
62
63        PUBLIC (start)          # GNU default entry point
64
65        EXTERN (boot_card)
66        EXTERN (_load_segments)
67        EXTERN (_return_to_monitor)
68        EXTERN (_IBMPC_initVideo)
69        EXTERN (debugPollingGetChar)
70        EXTERN (checkCPUtypeSetCr0)
71        EXTERN (BSP_console_select)
72        EXTERN (printk)
73#ifdef __SSE__
74        EXTERN (x86_capability)
75#ifdef __SSE3__
76        EXTERN (x86_capability_x)
77#endif
78#endif
79
80/*
81 * In case this crashes on your machine and this is not due
82 * to video mode set by the loader, you may try to define
83 * the following variable:
84 */
85/* #define DEBUG_EARLY_START */
86
87SYM (start):
88        /*
89         *  When things are really, REALLY!, bad -- turn on the speaker and
90         *  lock up.  This shows whether or not we make it to a certain
91         *  location.
92         */
93#if 0
94        inb     $0x61, al
95        orb     $0x03, al
96        outb    al, $0x61       # enable the speaker
97speakl: jmp     speakl             # and SPIN!!!
98#endif
99
100        nop
101        cli                     # DISABLE INTERRUPTS!!!
102        cld
103
104        /* Save multiboot info if we detect a multiboot loader */
105        cmp     $0x2badb002,eax
106        jne     2f
107
108        /* We have multiboot info; let's hope DS and ES are OK... */
109        movl    ebx, SYM(_boot_multiboot_info_p)
110        /* Check for memory size info and save */
111        movl    ebx, esi
112        movl    (esi), eax
113        movl    eax, ebx
114        movl    $SYM(_boot_multiboot_info), edi
115        /* save flags, always present */
116        movsd
117        /* flag 1 is memory */
118        and     $1, eax
119        je      1f
120        movl    $2, ecx
121        rep movsd
122        /* flag 2 is the command line */
1231:      movl    ebx, eax
124        and     $4, eax
125        je      3f
126        movl    (_boot_multiboot_info_p), eax
127        movl    16(eax), esi
128        movl    $255, ecx
1292:      movzbl  (esi), eax
130        test    al, al
131        je      3f
132        movb    al, (edi)
133        inc     edi
134        inc     esi
135        dec     ecx
136        je      3f
137        jmp     2b
1383:      xor     al, al
139        movb    al, (edi)
140#ifdef DEBUG_EARLY_START
141        /*
142         * Must get video attribute to have a working printk.
143         * Note that the following code assume we already have
144         * valid segments and a stack. It should be true for
145         * any loader starting RTEMS in protected mode (or
146         * at least I hope so : -)).
147         */
148        call _IBMPC_initVideo
149        /*
150         * try printk and a getchar in polling mode ASAP
151         */
152        movl    $welcome_msg, 0(esp)
153        call    printk
154        addl    $4, esp
155
156        /* call debugPollingGetChar */
157
158#endif
159
160/*----------------------------------------------------------------------------+
161| Load the segment registers (this is done by the board's BSP) and perform any
162| other board specific initialization procedures, this piece of code
163| does not know anything about
164|
165| NOTE: Upon return, gs will contain the segment descriptor for a segment which
166|       maps directly to all of physical memory.
167+----------------------------------------------------------------------------*/
168
169        jmp     SYM (_load_segments)    # load board dependent segments
170
171/*----------------------------------------------------------------------------+
172| Set up the stack
173+----------------------------------------------------------------------------*/
174
175        PUBLIC (_establish_stack)
176SYM (_establish_stack):
177
178        movl    $_end, eax              # eax = end of bss/start of heap
179        addl    $STACK_SIZE, eax        # make room for stack
180        subl    $4,          eax    # reserve room for arg to 'boot_card'
181        andl    $ - CPU_STACK_ALIGNMENT, eax    # align SP on CPU_STACK_ALIGNMENT boundary
182        movl    eax, esp                # set stack pointer
183        movl    eax, ebp                # set base pointer
184
185/*----------------------------------------------------------------------------+
186| Zero out the BSS segment
187+----------------------------------------------------------------------------*/
188
189SYM (zero_bss):
190        cld                             # make direction flag count up
191        movl    $ SYM (_end), ecx       # find end of .bss
192        movl    $ SYM (__bss_start), edi # edi = beginning of .bss
193        subl    edi, ecx                # ecx = size of .bss in bytes
194        shrl    ecx                     # size of .bss in longs
195        shrl    ecx
196        xorl    eax, eax                # value to clear out memory
197        repne                           # while ecx != 0
198        stosl                           #   clear a long in the bss
199
200/*-------------------------------------------------------------------+
201| Initialize the video because zero_bss has cleared initVideo parameters
202| if it was called earlier
203| So from now we can use printk
204+-------------------------------------------------------------------*/
205        call _IBMPC_initVideo
206
207/*---------------------------------------------------------------------+
208| Check CPU type. Enable Cache and init coprocessor if needed.
209+---------------------------------------------------------------------*/
210        call checkCPUtypeSetCr0
211
212/*---------------------------------------------------------------------+
213| Redirect printk (and console) port if desired
214+---------------------------------------------------------------------*/
215        call SYM(BSP_console_select)
216
217#ifdef __SSE__
218        call SYM(enable_sse)
219#endif
220
221/*---------------------------------------------------------------------+
222| Transfer control to User's Board Support Package
223| Note: at the top we reserved space for the argument
224|       so that
225|          initial_esp = ( TOS - 4 ) & ~(CPU_STACK_ALIGNMENT-1)
226|       this ensures that
227|       1) esp is now aligned
228|       2) there is space for the cmdline pointer which we just
229|          may store at *(esp)
230+---------------------------------------------------------------------*/
231
232        movl    $SYM(_boot_multiboot_cmdline), (esp)
233        call    SYM (boot_card)
234
235        cli     # stops interrupts from being processed after hlt!
236        hlt     # shutdown
237
238#ifdef __SSE__
239/*--------------------------------------------------------------------+
240 | Enable SSE; we really only care about fxsave/fxrstor and leave
241 | The only feature *we* (as an OS) use is fxsave/fxrstor.
242 | But as a courtesy we make sure we don't execute on hardware
243 | that doesn't support features possibly used by the compiler.
244+---------------------------------------------------------------------*/
245        PUBLIC (enable_sse)
246SYM(enable_sse):
247        movl    SYM (x86_capability), eax
248        testl   $0x01000000, eax
249        jne     1f
250        movl    $SYM (no_fxsave_msg), 0(esp)
251        jmp     SYM(_sse_panic)
2521:
253        testl   $0x02000000, eax
254        jne     1f
255        movl    $SYM (no_sse_msg), 0(esp)
256        jmp     SYM(_sse_panic)
2571:
258#ifdef __SSE2__
259        testl   $0x04000000, eax
260        jne     1f
261        movl    $SYM (no_sse2_msg), 0(esp)
262        jmp     SYM(_sse_panic)
2631:
264#endif
265#ifdef __SSE3__
266        movl    SYM (x86_capability_x), eax
267        testl   $1, eax
268        jne     1f
269        movl    $SYM (no_sse3_msg), 0(esp)
270        jmp     SYM(_sse_panic)
2711:
272#endif
273        mov     cr4, eax                # OK to enable now
274        or      $0x600, eax
275        mov     eax, cr4
276        ret
277
278SYM(_sse_panic):
279        call SYM(printk)
2801:      hlt
281        jmp 1b
282#endif
283
284END_CODE
285
286BEGIN_DATA
287        PUBLIC(_boot_multiboot_info_p)
288SYM(_boot_multiboot_info_p):
289        .long 0
290
291        PUBLIC(_boot_multiboot_info)
292        PUBLIC(_boot_multiboot_flags)
293        PUBLIC(_boot_multiboot_memory)
294        PUBLIC(_boot_multiboot_cmdline)
295SYM(_boot_multiboot_info):
296SYM(_boot_multiboot_flags):
297        .long 0 /* flags */
298SYM(_boot_multiboot_memory):
299        .long 0 /* mem_lower */
300        .long 0 /* mem_upper */
301SYM(_boot_multiboot_cmdline):
302        .rept 256 /* cmd line */
303        .byte 0
304        .endr
305
306        PUBLIC(_stack_size)
307SYM(_stack_size):
308        .long STACK_SIZE
309
310#ifdef DEBUG_EARLY_START
311
312        PUBLIC (welcome_msg)
313SYM (welcome_msg) :
314        .string "Ready to debug RTEMS ?\nEnter <CR>\n"
315
316        PUBLIC (hex_msg)
317SYM (hex_msg) :
318        .string "0x%x\n"
319
320        PUBLIC (made_it_msg)
321SYM (made_it_msg) :
322        .string "made it to %d\n"
323
324#endif
325
326#ifdef __SSE__
327SYM (no_fxsave_msg) :
328        .string "PANIC: compiled for SSE but CPU seems to have no FXSAVE/FXRSTOR support (which I need)\n"
329SYM (no_sse_msg) :
330        .string "PANIC: compiled for SSE but your CPU seems to have no SSE support\n"
331#ifdef __SSE2__
332SYM (no_sse2_msg) :
333        .string "PANIC: compiled for SSE2 but your CPU seems to have no SSE2 support\n"
334#endif
335#ifdef __SSE3__
336SYM (no_sse3_msg) :
337        .string "PANIC: compiled for SSE3 but your CPU seems to have no SSE3 support\n"
338#endif
339#endif
340
341END_DATA
342
343END
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