[7150f00f] | 1 | /*-------------------------------------------------------------------------+ |
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| 2 | | start.s v1.1 - PC386 BSP - 1997/08/07 |
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| 3 | +--------------------------------------------------------------------------+ |
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| 4 | | This file contains the entry point for the application. |
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| 5 | | The name of this entry point is compiler dependent. |
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| 6 | | It jumps to the BSP which is responsible for performing all initialization. |
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| 7 | +--------------------------------------------------------------------------+ |
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| 8 | | (C) Copyright 1997 - |
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| 9 | | - NavIST Group - Real-Time Distributed Systems and Industrial Automation |
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| 10 | | |
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| 11 | | http://pandora.ist.utl.pt |
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| 12 | | |
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| 13 | | Instituto Superior Tecnico * Lisboa * PORTUGAL |
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| 14 | +--------------------------------------------------------------------------+ |
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[2efdd08] | 15 | | Modified the 20/05/1998 by valette@crf.canon.fr in order to give a working |
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| 16 | | example of eraly stage debugging via the DEBUG_EARLY_START define. |
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| 17 | +--------------------------------------------------------------------------+ |
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[7150f00f] | 18 | | Disclaimer: |
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| 19 | | |
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| 20 | | This file is provided "AS IS" without warranty of any kind, either |
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| 21 | | expressed or implied. |
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| 22 | +--------------------------------------------------------------------------+ |
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| 23 | | This code is based on an earlier generation RTEMS i386 start.s and the |
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| 24 | | following copyright applies: |
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| 25 | | |
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| 26 | | ************************************************************************** |
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[08311cc3] | 27 | | * COPYRIGHT (c) 1989-1999. |
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[6128a4a] | 28 | | * On-Line Applications Research Corporation (OAR). |
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[7150f00f] | 29 | | * |
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| 30 | | * The license and distribution terms for this file may be |
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| 31 | | * found in the file LICENSE in this distribution or at |
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[af2abc9e] | 32 | | * http://www.rtems.com/license/LICENSE. |
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[7150f00f] | 33 | | ************************************************************************** |
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| 34 | | |
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[6f9c75c3] | 35 | | $Id$ |
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[7150f00f] | 36 | +--------------------------------------------------------------------------*/ |
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| 37 | |
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[4050a7f] | 38 | /* |
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| 39 | * The most trivial start.s possible. It does not know anything |
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| 40 | * about system it is running on, so it will jump to appropriate |
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| 41 | * place in BSP specific place to do things it knows nothing about |
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| 42 | */ |
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[7150f00f] | 43 | |
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[cc1426bb] | 44 | #include <rtems/asm.h> |
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[23303c03] | 45 | #include <rtems/score/cpu.h> |
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[7150f00f] | 46 | |
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[96d56b3] | 47 | /*----------------------------------------------------------------------------+ |
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[6128a4a] | 48 | | Size of heap and stack: |
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[96d56b3] | 49 | +----------------------------------------------------------------------------*/ |
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| 50 | |
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[23303c03] | 51 | #ifndef CPU_STACK_ALIGNMENT |
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| 52 | #error "Missing header ? CPU_STACK_ALIGNMENT NOT DEFINED" |
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| 53 | #endif |
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| 54 | |
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[96d56b3] | 55 | .set STACK_SIZE, 0x1000 |
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| 56 | |
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[7150f00f] | 57 | /*----------------------------------------------------------------------------+ |
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| 58 | | CODE section |
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| 59 | +----------------------------------------------------------------------------*/ |
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| 60 | |
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| 61 | BEGIN_CODE |
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| 62 | |
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| 63 | PUBLIC (start) # GNU default entry point |
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| 64 | |
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[e2a2ec60] | 65 | EXTERN (boot_card) |
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[4050a7f] | 66 | EXTERN (_load_segments) |
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| 67 | EXTERN (_return_to_monitor) |
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[2efdd08] | 68 | EXTERN (_IBMPC_initVideo) |
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[4050a7f] | 69 | EXTERN (debugPollingGetChar) |
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[ab0df696] | 70 | EXTERN (checkCPUtypeSetCr0) |
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[4a4201c] | 71 | EXTERN (printk) |
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| 72 | #ifdef __SSE__ |
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| 73 | EXTERN (x86_capability) |
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| 74 | #ifdef __SSE3__ |
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| 75 | EXTERN (x86_capability_x) |
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| 76 | #endif |
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| 77 | #endif |
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[6128a4a] | 78 | |
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[2efdd08] | 79 | /* |
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[4050a7f] | 80 | * In case this crashes on your machine and this is not due |
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[2efdd08] | 81 | * to video mode set by the loader, you may try to define |
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[4050a7f] | 82 | * the following variable: |
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[2efdd08] | 83 | */ |
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[5d18fb0] | 84 | /* #define DEBUG_EARLY_START */ |
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[7150f00f] | 85 | |
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[4050a7f] | 86 | SYM (start): |
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[bb6d368] | 87 | /* |
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| 88 | * When things are really, REALLY!, bad -- turn on the speaker and |
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[6128a4a] | 89 | * lock up. This shows whether or not we make it to a certain |
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[bb6d368] | 90 | * location. |
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| 91 | */ |
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| 92 | #if 0 |
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| 93 | inb $0x61, al |
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| 94 | orb $0x03, al |
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| 95 | outb al, $0x61 # enable the speaker |
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| 96 | speakl: jmp speakl # and SPIN!!! |
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| 97 | #endif |
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| 98 | |
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[7150f00f] | 99 | nop |
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| 100 | cli # DISABLE INTERRUPTS!!! |
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[2efdd08] | 101 | cld |
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[662c157] | 102 | |
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[1c5ebc5] | 103 | /* Save multiboot info if we detect a multiboot loader */ |
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| 104 | cmp $0x2badb002,eax |
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| 105 | jne 2f |
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[359e537] | 106 | |
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[1c5ebc5] | 107 | /* We have multiboot info; let's hope DS and ES are OK... */ |
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| 108 | movl ebx, SYM(_boot_multiboot_info_p) |
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| 109 | /* Check for memory size info and save */ |
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| 110 | movl ebx, esi |
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| 111 | movl (esi), eax |
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| 112 | movl eax, ebx |
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| 113 | movl $SYM(_boot_multiboot_info), edi |
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| 114 | /* save flags, always present */ |
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| 115 | movsd |
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| 116 | /* flag 1 is memory */ |
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| 117 | and $1, eax |
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| 118 | je 1f |
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| 119 | movl $2, ecx |
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| 120 | rep movsd |
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| 121 | /* flag 2 is the command line */ |
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| 122 | 1: movl ebx, eax |
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| 123 | and $4, eax |
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| 124 | je 3f |
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| 125 | movl (_boot_multiboot_info_p), eax |
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| 126 | movl 16(eax), esi |
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| 127 | movl $255, ecx |
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| 128 | 2: movzbl (esi), eax |
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| 129 | test al, al |
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| 130 | je 3f |
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| 131 | movb al, (edi) |
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| 132 | inc edi |
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| 133 | inc esi |
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| 134 | dec ecx |
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| 135 | je 3f |
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| 136 | jmp 2b |
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| 137 | 3: xor al, al |
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| 138 | movb al, (edi) |
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[ab0df696] | 139 | #ifdef DEBUG_EARLY_START |
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[2efdd08] | 140 | /* |
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| 141 | * Must get video attribute to have a working printk. |
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[6128a4a] | 142 | * Note that the following code assume we already have |
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[2efdd08] | 143 | * valid segments and a stack. It should be true for |
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| 144 | * any loader starting RTEMS in protected mode (or |
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| 145 | * at least I hope so : -)). |
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| 146 | */ |
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| 147 | call _IBMPC_initVideo |
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| 148 | /* |
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| 149 | * try printk and a getchar in polling mode ASAP |
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| 150 | */ |
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[4a4201c] | 151 | movl $welcome_msg, 0(esp) |
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[2efdd08] | 152 | call printk |
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| 153 | addl $4, esp |
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| 154 | |
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[2d7d605] | 155 | /* call debugPollingGetChar */ |
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[6128a4a] | 156 | |
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| 157 | #endif |
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[7150f00f] | 158 | |
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| 159 | /*----------------------------------------------------------------------------+ |
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| 160 | | Load the segment registers (this is done by the board's BSP) and perform any |
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[4050a7f] | 161 | | other board specific initialization procedures, this piece of code |
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[6128a4a] | 162 | | does not know anything about |
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[7150f00f] | 163 | | |
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| 164 | | NOTE: Upon return, gs will contain the segment descriptor for a segment which |
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| 165 | | maps directly to all of physical memory. |
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| 166 | +----------------------------------------------------------------------------*/ |
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| 167 | |
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| 168 | jmp SYM (_load_segments) # load board dependent segments |
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| 169 | |
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| 170 | /*----------------------------------------------------------------------------+ |
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| 171 | | Set up the stack |
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| 172 | +----------------------------------------------------------------------------*/ |
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| 173 | |
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| 174 | PUBLIC (_establish_stack) |
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| 175 | SYM (_establish_stack): |
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| 176 | |
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| 177 | movl $_end, eax # eax = end of bss/start of heap |
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[96d56b3] | 178 | addl $STACK_SIZE, eax # make room for stack |
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[23303c03] | 179 | subl $4, eax # reserve room for arg to 'boot_card' |
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| 180 | andl $ - CPU_STACK_ALIGNMENT, eax # align SP on CPU_STACK_ALIGNMENT boundary |
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[7150f00f] | 181 | movl eax, esp # set stack pointer |
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| 182 | movl eax, ebp # set base pointer |
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| 183 | |
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| 184 | /*----------------------------------------------------------------------------+ |
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| 185 | | Zero out the BSS segment |
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| 186 | +----------------------------------------------------------------------------*/ |
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| 187 | |
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| 188 | SYM (zero_bss): |
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| 189 | cld # make direction flag count up |
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| 190 | movl $ SYM (_end), ecx # find end of .bss |
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[3f432fbd] | 191 | movl $ SYM (__bss_start), edi # edi = beginning of .bss |
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[7150f00f] | 192 | subl edi, ecx # ecx = size of .bss in bytes |
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[f02ffca] | 193 | shrl ecx # size of .bss in longs |
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| 194 | shrl ecx |
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[7150f00f] | 195 | xorl eax, eax # value to clear out memory |
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| 196 | repne # while ecx != 0 |
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[14023b45] | 197 | stosl # clear a long in the bss |
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[d57c04e] | 198 | |
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| 199 | /*-------------------------------------------------------------------+ |
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| 200 | | Initialize the video because zero_bss has cleared initVideo parameters |
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| 201 | | if it was called earlier |
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| 202 | | So from now we can use printk |
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| 203 | +-------------------------------------------------------------------*/ |
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| 204 | call _IBMPC_initVideo |
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[6128a4a] | 205 | |
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[4050a7f] | 206 | /*---------------------------------------------------------------------+ |
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[ab0df696] | 207 | | Check CPU type. Enable Cache and init coprocessor if needed. |
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[4050a7f] | 208 | +---------------------------------------------------------------------*/ |
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[ab0df696] | 209 | call checkCPUtypeSetCr0 |
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[6128a4a] | 210 | |
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[7521e43] | 211 | #ifdef __SSE__ |
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| 212 | call SYM(enable_sse) |
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| 213 | #endif |
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| 214 | |
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| 215 | /*---------------------------------------------------------------------+ |
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| 216 | | Transfer control to User's Board Support Package |
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| 217 | | Note: at the top we reserved space for the argument |
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| 218 | | so that |
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| 219 | | initial_esp = ( TOS - 4 ) & ~(CPU_STACK_ALIGNMENT-1) |
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| 220 | | this ensures that |
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| 221 | | 1) esp is now aligned |
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| 222 | | 2) there is space for the cmdline pointer which we just |
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| 223 | | may store at *(esp) |
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| 224 | +---------------------------------------------------------------------*/ |
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| 225 | |
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| 226 | movl $SYM(_boot_multiboot_cmdline), (esp) |
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| 227 | call SYM (boot_card) |
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| 228 | |
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| 229 | cli # stops interrupts from being processed after hlt! |
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| 230 | hlt # shutdown |
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| 231 | |
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[4a4201c] | 232 | #ifdef __SSE__ |
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| 233 | /*--------------------------------------------------------------------+ |
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| 234 | | Enable SSE; we really only care about fxsave/fxrstor and leave |
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| 235 | | The only feature *we* (as an OS) use is fxsave/fxrstor. |
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| 236 | | But as a courtesy we make sure we don't execute on hardware |
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| 237 | | that doesn't support features possibly used by the compiler. |
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| 238 | +---------------------------------------------------------------------*/ |
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[7521e43] | 239 | PUBLIC (enable_sse) |
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| 240 | SYM(enable_sse): |
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[4a4201c] | 241 | movl SYM (x86_capability), eax |
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| 242 | testl $0x01000000, eax |
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| 243 | jne 1f |
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| 244 | movl $SYM (no_fxsave_msg), 0(esp) |
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| 245 | jmp SYM(_sse_panic) |
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| 246 | 1: |
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| 247 | testl $0x02000000, eax |
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| 248 | jne 1f |
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| 249 | movl $SYM (no_sse_msg), 0(esp) |
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| 250 | jmp SYM(_sse_panic) |
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[359e537] | 251 | 1: |
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[4a4201c] | 252 | #ifdef __SSE2__ |
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| 253 | testl $0x04000000, eax |
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| 254 | jne 1f |
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| 255 | movl $SYM (no_sse2_msg), 0(esp) |
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| 256 | jmp SYM(_sse_panic) |
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| 257 | 1: |
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| 258 | #endif |
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| 259 | #ifdef __SSE3__ |
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| 260 | movl SYM (x86_capability_x), eax |
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| 261 | testl $1, eax |
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| 262 | jne 1f |
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| 263 | movl $SYM (no_sse3_msg), 0(esp) |
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| 264 | jmp SYM(_sse_panic) |
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| 265 | 1: |
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| 266 | #endif |
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| 267 | mov cr4, eax # OK to enable now |
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| 268 | or $0x600, eax |
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| 269 | mov eax, cr4 |
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[7521e43] | 270 | ret |
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[4a4201c] | 271 | |
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| 272 | SYM(_sse_panic): |
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| 273 | call SYM(printk) |
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| 274 | 1: hlt |
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| 275 | jmp 1b |
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| 276 | #endif |
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| 277 | |
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[7150f00f] | 278 | END_CODE |
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| 279 | |
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| 280 | BEGIN_DATA |
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[662c157] | 281 | PUBLIC(_boot_multiboot_info_p) |
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| 282 | SYM(_boot_multiboot_info_p): |
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| 283 | .long 0 |
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| 284 | |
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| 285 | PUBLIC(_boot_multiboot_info) |
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[1c5ebc5] | 286 | PUBLIC(_boot_multiboot_flags) |
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| 287 | PUBLIC(_boot_multiboot_memory) |
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| 288 | PUBLIC(_boot_multiboot_cmdline) |
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[662c157] | 289 | SYM(_boot_multiboot_info): |
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[1c5ebc5] | 290 | SYM(_boot_multiboot_flags): |
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[662c157] | 291 | .long 0 /* flags */ |
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[1c5ebc5] | 292 | SYM(_boot_multiboot_memory): |
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[662c157] | 293 | .long 0 /* mem_lower */ |
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| 294 | .long 0 /* mem_upper */ |
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[1c5ebc5] | 295 | SYM(_boot_multiboot_cmdline): |
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| 296 | .rept 256 /* cmd line */ |
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| 297 | .byte 0 |
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| 298 | .endr |
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[359e537] | 299 | |
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[4050a7f] | 300 | PUBLIC(_stack_size) |
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| 301 | SYM(_stack_size): |
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| 302 | .long STACK_SIZE |
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[7150f00f] | 303 | |
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[2efdd08] | 304 | #ifdef DEBUG_EARLY_START |
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[4050a7f] | 305 | |
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[2efdd08] | 306 | PUBLIC (welcome_msg) |
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| 307 | SYM (welcome_msg) : |
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| 308 | .string "Ready to debug RTEMS ?\nEnter <CR>\n" |
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| 309 | |
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[4050a7f] | 310 | PUBLIC (hex_msg) |
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| 311 | SYM (hex_msg) : |
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| 312 | .string "0x%x\n" |
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[7150f00f] | 313 | |
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[4050a7f] | 314 | PUBLIC (made_it_msg) |
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| 315 | SYM (made_it_msg) : |
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| 316 | .string "made it to %d\n" |
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[7150f00f] | 317 | |
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[4050a7f] | 318 | #endif |
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[7150f00f] | 319 | |
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[4a4201c] | 320 | #ifdef __SSE__ |
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| 321 | SYM (no_fxsave_msg) : |
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| 322 | .string "PANIC: compiled for SSE but CPU seems to have no FXSAVE/FXRSTOR support (which I need)\n" |
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| 323 | SYM (no_sse_msg) : |
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| 324 | .string "PANIC: compiled for SSE but your CPU seems to have no SSE support\n" |
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| 325 | #ifdef __SSE2__ |
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| 326 | SYM (no_sse2_msg) : |
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| 327 | .string "PANIC: compiled for SSE2 but your CPU seems to have no SSE2 support\n" |
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| 328 | #endif |
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| 329 | #ifdef __SSE3__ |
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| 330 | SYM (no_sse3_msg) : |
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| 331 | .string "PANIC: compiled for SSE3 but your CPU seems to have no SSE3 support\n" |
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| 332 | #endif |
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| 333 | #endif |
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| 334 | |
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[4050a7f] | 335 | END_DATA |
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[7150f00f] | 336 | |
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[4050a7f] | 337 | END |
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