source: rtems/c/src/lib/libbsp/i386/pc386/console/vgainit.c @ c499856

4.115
Last change on this file since c499856 was 1fef02ca, checked in by Joel Sherrill <joel.sherrill@…>, on 03/14/11 at 14:57:00

2011-03-14 Joel Sherrill <joel.sherrill@…>

PR 1762/cpukit

  • Makefile.am, preinstall.am, console/console.c, console/keyboard.c, console/keyboard.h, console/pc_keyb.c, console/ps2_mouse.c, console/vgainit.c: Made mouse parser engine generic. Now use generic serial mouse driver. Moved many externs from C to .h.
  • console/kbd_parser.c, console/serial_mouse_config.c: New files.
  • console/mouse_parser.c, console/mouse_parser.h, console/serial_mouse.c, console/serial_mouse.h: Removed.
  • Property mode set to 100644
File size: 20.7 KB
Line 
1/*
2 * Copyright (c) 1999 Greg Haerr <greg@censoft.com>
3 * Copyright (c) 1991 David I. Bell
4 * Permission is granted to use, distribute, or modify this source,
5 * provided that this copyright notice remains intact.
6 *
7 * Alternate EGA/VGA Screen Driver Init, direct hw programming
8 */
9#include <i386_io.h>
10
11#ifdef __rtems__
12#define ROMFONT         0       /* =0 no bios rom fonts available*/
13#else
14#define ROMFONT         1       /* =1 uses PC rom fonts */
15#endif
16
17/* defines are defined in device.h of the MicroWindows package */
18#define MODE_SET        0       /* draw pixels as given (default) */
19#define MODE_XOR        1       /* draw pixels using XOR */
20#define MODE_OR 2       /* draw pixels using OR (notimp)*/
21#define MODE_AND        3       /* draw pixels using AND (notimp)*/
22#define  MODE_MAX       3
23typedef int MODE;    /* drawing mode*/
24
25/* Define one and only one of the following to be nonzero*/
26#define VGA_ET4000      0       /* TSENG LABS ET4000 chip 800x600*/
27#define VGA_STANDARD    1       /* standard VGA 640x480*/
28#define EGA_STANDARD    0       /* standard EGA 640x350*/
29
30#define DONE    0
31#define IN      1
32#define OUT     2
33
34#define RAM_SCAN_LINES  32      /* number of scan lines in fonts in RAM */
35#define FONT_CHARS      256     /* number of characters in font tables */
36#define CHAR_WIDTH      8       /* number of pixels for character width */
37
38#define PALREG  0x3c0
39#define SEQREG  0x3c4
40#define SEQVAL  0x3c5
41#define GRREG   0x3ce
42#define GRVAL   0x3cf
43#define ATTRREG 0x3da
44#define CRTCREG 0x3d4
45#define CRTCVAL 0x3d5
46
47#define GENREG1 0x3c2
48#define GENREG2 0x3cc
49#define GENREG3 0x3ca
50
51#define DATA_ROTATE     3       /* register number for data rotate */
52
53typedef struct {
54  int action;
55  int port1;
56  int data1;
57  int port2;
58  int data2;
59} REGIO;
60
61#if ROMFONT
62extern FARADDR          rom_char_addr;          /* address of ROM font*/
63extern int              ROM_CHAR_HEIGHT;        /* ROM character height*/
64#endif
65
66/* local data*/
67static REGIO            graphics_on[];
68static REGIO            graph_off[];
69
70/* entry points*/
71void            ega_hwinit(void);
72void            ega_hwterm(void);
73
74/* local routines*/
75static void writeregs(REGIO *rp);
76static void out_word(unsigned int p,unsigned int d);
77static void setmode(MODE mode);
78
79void
80ega_hwinit(void)
81{
82        writeregs(graphics_on);
83}
84
85void
86ega_hwterm(void)
87{
88  setmode(MODE_SET);
89
90  /* Copy character table from ROM back into bit plane 2 before turning
91   * off graphics.
92   */
93  out_word(SEQREG, 0x0100);     /* syn reset */
94  out_word(SEQREG, 0x0402);     /* cpu writes only to map 2 */
95  out_word(SEQREG, 0x0704);     /* sequential addressing */
96  out_word(SEQREG, 0x0300);     /* clear synchronous reset */
97
98  out_word(GRREG, 0x0204);      /* select map 2 for CPU reads */
99  out_word(GRREG, 0x0005);      /* disable odd-even addressing */
100
101#if ROMFONT
102  {
103          FARADDR       srcoffset;
104          FARADDR       destoffset;
105          int           data;
106          int           ch;
107          int           row;
108
109          srcoffset = rom_char_addr;
110          destoffset = EGA_BASE;
111          for (ch = 0; ch < FONT_CHARS; ch++) {
112                for(row = 0; row < ROM_CHAR_HEIGHT; row++) {
113                        data = GETBYTE_FP(srcoffset++);
114                        PUTBYTE_FP(destoffset++, data);
115                }
116                destoffset += (RAM_SCAN_LINES - ROM_CHAR_HEIGHT);
117          }
118  }
119#endif
120
121  /* Finally set the registers back for text mode. */
122  writeregs(graph_off);
123}
124
125/* Set the graphics registers as indicated by the given table */
126static void
127writeregs(REGIO *rp)
128{
129  for (; rp->action != DONE; rp++) {
130        switch (rp->action) {
131            case IN:
132                        inp(rp->port1);
133                        break;
134            case OUT:
135                        outp(rp->port1, rp->data1);
136                        if (rp->port2)
137                                outp(rp->port2, rp->data2);
138                        break;
139        }
140  }
141}
142
143/* Output a word to an I/O port. */
144static void
145out_word(unsigned int p,unsigned int d)
146{
147  outp(p, d & 0xff);
148  outp(p + 1, (d >> 8) & 0xff);
149}
150
151/* Values for the data rotate register to implement drawing modes. */
152static unsigned char mode_table[MODE_MAX + 1] = {
153  0x00, 0x18, 0x10, 0x08
154};
155
156/* Set the drawing mode.
157 * This is either SET, OR, AND, or XOR.
158 */
159static void
160setmode(MODE mode)
161{
162  if (mode > MODE_MAX)
163        return;
164  outp(GRREG, DATA_ROTATE);
165  outp(GRVAL, mode_table[mode]);
166}
167
168#if VGA_ET4000
169
170/* VGA 800x600 16-color graphics (BIOS mode 0x29).
171 */
172REGIO graphics_on[] = {
173  /* Reset attr F/F */
174  IN, ATTRREG, 0, 0, 0,
175
176  /* Disable palette */
177  OUT, PALREG, 0, 0, 0,
178
179  /* Reset sequencer regs */
180  OUT, SEQREG, 0, SEQVAL, 0,
181  OUT, SEQREG, 1, SEQVAL, 1,
182  OUT, SEQREG, 2, SEQVAL, 0x0f,
183  OUT, SEQREG, 3, SEQVAL, 0,
184  OUT, SEQREG, 4, SEQVAL, 6,
185
186  /* Misc out reg */
187  OUT, GENREG1, 0xe3, 0, 0,
188
189  /* Sequencer enable */
190  OUT, SEQREG, 0, SEQVAL, 0x03,
191
192  /* Unprotect crtc regs 0-7 */
193  OUT, CRTCREG, 0x11, CRTCVAL, 0,
194
195  /* Crtc */
196  OUT, CRTCREG, 0, CRTCVAL, 0x7a,
197  OUT, CRTCREG, 1, CRTCVAL, 0x63,
198  OUT, CRTCREG, 2, CRTCVAL, 0x64,
199  OUT, CRTCREG, 3, CRTCVAL, 0x1d,
200  OUT, CRTCREG, 4, CRTCVAL, 0x68,
201  OUT, CRTCREG, 5, CRTCVAL, 0x9a,
202  OUT, CRTCREG, 6, CRTCVAL, 0x78,
203  OUT, CRTCREG, 7, CRTCVAL, 0xf0,
204  OUT, CRTCREG, 8, CRTCVAL, 0x00,
205  OUT, CRTCREG, 9, CRTCVAL, 0x60,
206  OUT, CRTCREG, 10, CRTCVAL, 0x00,
207  OUT, CRTCREG, 11, CRTCVAL, 0x00,
208  OUT, CRTCREG, 12, CRTCVAL, 0x00,
209  OUT, CRTCREG, 13, CRTCVAL, 0x00,
210  OUT, CRTCREG, 14, CRTCVAL, 0x00,
211  OUT, CRTCREG, 15, CRTCVAL, 0x00,
212  OUT, CRTCREG, 16, CRTCVAL, 0x5c,
213  OUT, CRTCREG, 17, CRTCVAL, 0x8e,
214  OUT, CRTCREG, 18, CRTCVAL, 0x57,
215  OUT, CRTCREG, 19, CRTCVAL, 0x32,
216  OUT, CRTCREG, 20, CRTCVAL, 0x00,
217  OUT, CRTCREG, 21, CRTCVAL, 0x5b,
218  OUT, CRTCREG, 22, CRTCVAL, 0x75,
219  OUT, CRTCREG, 23, CRTCVAL, 0xc3,
220  OUT, CRTCREG, 24, CRTCVAL, 0xff,
221
222  /* Graphics controller */
223  OUT, GENREG2, 0x00, 0, 0,
224  OUT, GENREG3, 0x01, 0, 0,
225  OUT, GRREG, 0, GRVAL, 0x00,
226  OUT, GRREG, 1, GRVAL, 0x00,
227  OUT, GRREG, 2, GRVAL, 0x00,
228  OUT, GRREG, 3, GRVAL, 0x00,
229  OUT, GRREG, 4, GRVAL, 0x00,
230  OUT, GRREG, 5, GRVAL, 0x00,
231  OUT, GRREG, 6, GRVAL, 0x05,
232  OUT, GRREG, 7, GRVAL, 0x0f,
233  OUT, GRREG, 8, GRVAL, 0xff,
234
235  /* Reset attribute flip/flop */
236  IN, ATTRREG, 0, 0, 0,
237
238  /* Palette */
239  OUT, PALREG, 0, PALREG, 0x00,
240  OUT, PALREG, 1, PALREG, 0x01,
241  OUT, PALREG, 2, PALREG, 0x02,
242  OUT, PALREG, 3, PALREG, 0x03,
243  OUT, PALREG, 4, PALREG, 0x04,
244  OUT, PALREG, 5, PALREG, 0x05,
245  OUT, PALREG, 6, PALREG, 0x06,
246  OUT, PALREG, 7, PALREG, 0x07,
247  OUT, PALREG, 8, PALREG, 0x38,
248  OUT, PALREG, 9, PALREG, 0x39,
249  OUT, PALREG, 10, PALREG, 0x3a,
250  OUT, PALREG, 11, PALREG, 0x3b,
251  OUT, PALREG, 12, PALREG, 0x3c,
252  OUT, PALREG, 13, PALREG, 0x3d,
253  OUT, PALREG, 14, PALREG, 0x3e,
254  OUT, PALREG, 15, PALREG, 0x3f,
255  OUT, PALREG, 16, PALREG, 0x01,
256  OUT, PALREG, 17, PALREG, 0x00,
257  OUT, PALREG, 18, PALREG, 0x0f,
258  OUT, PALREG, 19, PALREG, 0x00,
259
260  /* Enable palette */
261  OUT, PALREG, 0x20, 0, 0,
262
263  /* End of table */
264  DONE, 0, 0, 0, 0
265};
266
267/* VGA 80x25 text (BIOS mode 3).
268 */
269static REGIO graph_off[] = {
270  /* Reset attr F/F */
271  IN, ATTRREG, 0, 0, 0,
272
273  /* Disable palette */
274  OUT, PALREG, 0, 0, 0,
275
276  /* Reset sequencer regs */
277  OUT, SEQREG, 0, SEQVAL, 1,
278  OUT, SEQREG, 1, SEQVAL, 1,
279  OUT, SEQREG, 2, SEQVAL, 3,
280  OUT, SEQREG, 3, SEQVAL, 0,
281  OUT, SEQREG, 4, SEQVAL, 2,
282
283  /* Misc out reg */
284  OUT, GENREG1, 0x63, 0, 0,
285
286  /* Sequencer enable */
287  OUT, SEQREG, 0, SEQVAL, 3,
288
289  /* Unprotect crtc regs 0-7 */
290  OUT, CRTCREG, 0x11, CRTCVAL, 0,
291
292  /* Crtc */
293  OUT, CRTCREG, 0, CRTCVAL, 0x5f,       /* horiz total */
294  OUT, CRTCREG, 1, CRTCVAL, 0x4f,       /* horiz end */
295  OUT, CRTCREG, 2, CRTCVAL, 0x50,       /* horiz blank */
296  OUT, CRTCREG, 3, CRTCVAL, 0x82,       /* end blank */
297  OUT, CRTCREG, 4, CRTCVAL, 0x55,       /* horiz retrace */
298  OUT, CRTCREG, 5, CRTCVAL, 0x81,       /* end retrace */
299  OUT, CRTCREG, 6, CRTCVAL, 0xbf,       /* vert total */
300  OUT, CRTCREG, 7, CRTCVAL, 0x1f,       /* overflows */
301  OUT, CRTCREG, 8, CRTCVAL, 0x00,       /* row scan */
302  OUT, CRTCREG, 9, CRTCVAL, 0x4f,       /* max scan line */
303  OUT, CRTCREG, 10, CRTCVAL, 0x00,      /* cursor start */
304  OUT, CRTCREG, 11, CRTCVAL, 0x0f,      /* cursor end */
305  OUT, CRTCREG, 12, CRTCVAL, 0x0e,      /* start high addr */
306  OUT, CRTCREG, 13, CRTCVAL, 0xb0,      /* low addr */
307  OUT, CRTCREG, 14, CRTCVAL, 0x16,      /* cursor high */
308  OUT, CRTCREG, 15, CRTCVAL, 0x30,      /* cursor low */
309  OUT, CRTCREG, 16, CRTCVAL, 0x9c,      /* vert retrace */
310  OUT, CRTCREG, 17, CRTCVAL, 0x8e,      /* retrace end */
311  OUT, CRTCREG, 18, CRTCVAL, 0x8f,      /* vert end */
312  OUT, CRTCREG, 19, CRTCVAL, 0x28,      /* offset */
313  OUT, CRTCREG, 20, CRTCVAL, 0x1f,      /* underline */
314  OUT, CRTCREG, 21, CRTCVAL, 0x96,      /* vert blank */
315  OUT, CRTCREG, 22, CRTCVAL, 0xb9,      /* end blank */
316  OUT, CRTCREG, 23, CRTCVAL, 0xa3,      /* crt mode */
317  OUT, CRTCREG, 24, CRTCVAL, 0xff,      /* line compare */
318
319  /* Graphics controller */
320  OUT, GENREG2, 0x00, 0, 0,
321  OUT, GENREG3, 0x01, 0, 0,
322  OUT, GRREG, 0, GRVAL, 0x00,
323  OUT, GRREG, 1, GRVAL, 0x00,
324  OUT, GRREG, 2, GRVAL, 0x00,
325  OUT, GRREG, 3, GRVAL, 0x00,
326  OUT, GRREG, 4, GRVAL, 0x00,
327  OUT, GRREG, 5, GRVAL, 0x10,
328  OUT, GRREG, 6, GRVAL, 0x0e,
329  OUT, GRREG, 7, GRVAL, 0x00,
330  OUT, GRREG, 8, GRVAL, 0xff,
331
332  /* Reset attribute flip/flop */
333  IN, ATTRREG, 0, 0, 0,
334
335  /* Palette */
336  OUT, PALREG, 0, PALREG, 0x00,
337  OUT, PALREG, 1, PALREG, 0x01,
338  OUT, PALREG, 2, PALREG, 0x02,
339  OUT, PALREG, 3, PALREG, 0x03,
340  OUT, PALREG, 4, PALREG, 0x04,
341  OUT, PALREG, 5, PALREG, 0x05,
342  OUT, PALREG, 6, PALREG, 0x06,
343  OUT, PALREG, 7, PALREG, 0x07,
344  OUT, PALREG, 8, PALREG, 0x10,
345  OUT, PALREG, 9, PALREG, 0x11,
346  OUT, PALREG, 10, PALREG, 0x12,
347  OUT, PALREG, 11, PALREG, 0x13,
348  OUT, PALREG, 12, PALREG, 0x14,
349  OUT, PALREG, 13, PALREG, 0x15,
350  OUT, PALREG, 14, PALREG, 0x16,
351  OUT, PALREG, 15, PALREG, 0x17,
352  OUT, PALREG, 16, PALREG, 0x08,
353  OUT, PALREG, 17, PALREG, 0x00,
354  OUT, PALREG, 18, PALREG, 0x0f,
355  OUT, PALREG, 19, PALREG, 0x00,
356
357  /* Enable palette */
358  OUT, PALREG, 0x20, 0, 0,
359
360  /* End of table */
361  DONE, 0, 0, 0, 0
362};
363
364#endif
365
366#if VGA_STANDARD
367
368/* VGA 640x480 16-color graphics (BIOS mode 0x12).
369 */
370static REGIO graphics_on[] = {
371  /* Reset attr F/F */
372  { IN, ATTRREG, 0, 0, 0 },
373
374  /* Disable palette */
375  { OUT, PALREG, 0, 0, 0 },
376
377  /* Reset sequencer regs */
378  { OUT, SEQREG, 0, SEQVAL, 0 },
379  { OUT, SEQREG, 1, SEQVAL, 1 },
380  { OUT, SEQREG, 2, SEQVAL, 0x0f },
381  { OUT, SEQREG, 3, SEQVAL, 0 },
382  { OUT, SEQREG, 4, SEQVAL, 6 },
383
384  /* Misc out reg */
385  { OUT, GENREG1, 0xe3, 0, 0 },
386
387  /* Sequencer enable */
388  { OUT, SEQREG, 0, SEQVAL, 0x03 },
389
390  /* Unprotect crtc regs 0-7 */
391  { OUT, CRTCREG, 0x11, CRTCVAL, 0 },
392
393  /* Crtc */
394  { OUT, CRTCREG, 0, CRTCVAL, 0x5f },
395  { OUT, CRTCREG, 1, CRTCVAL, 0x4f },
396  { OUT, CRTCREG, 2, CRTCVAL, 0x50 },
397  { OUT, CRTCREG, 3, CRTCVAL, 0x82 },
398  { OUT, CRTCREG, 4, CRTCVAL, 0x54 },
399  { OUT, CRTCREG, 5, CRTCVAL, 0x80 },
400  { OUT, CRTCREG, 6, CRTCVAL, 0x0b },
401  { OUT, CRTCREG, 7, CRTCVAL, 0x3e },
402  { OUT, CRTCREG, 8, CRTCVAL, 0x00 },
403  { OUT, CRTCREG, 9, CRTCVAL, 0x40 },
404  { OUT, CRTCREG, 10, CRTCVAL, 0x00 },
405  { OUT, CRTCREG, 11, CRTCVAL, 0x00 },
406  { OUT, CRTCREG, 12, CRTCVAL, 0x00 },
407  { OUT, CRTCREG, 13, CRTCVAL, 0x00 },
408  { OUT, CRTCREG, 14, CRTCVAL, 0x00 },
409  { OUT, CRTCREG, 15, CRTCVAL, 0x59 },
410  { OUT, CRTCREG, 16, CRTCVAL, 0xea },
411  { OUT, CRTCREG, 17, CRTCVAL, 0x8c },
412  { OUT, CRTCREG, 18, CRTCVAL, 0xdf },
413  { OUT, CRTCREG, 19, CRTCVAL, 0x28 },
414  { OUT, CRTCREG, 20, CRTCVAL, 0x00 },
415  { OUT, CRTCREG, 21, CRTCVAL, 0xe7 },
416  { OUT, CRTCREG, 22, CRTCVAL, 0x04 },
417  { OUT, CRTCREG, 23, CRTCVAL, 0xe3 },
418  { OUT, CRTCREG, 24, CRTCVAL, 0xff },
419
420  /* Graphics controller */
421  { OUT, GENREG2, 0x00, 0, 0 },
422  { OUT, GENREG3, 0x01, 0, 0 },
423  { OUT, GRREG, 0, GRVAL, 0x00 },
424  { OUT, GRREG, 1, GRVAL, 0x00 },
425  { OUT, GRREG, 2, GRVAL, 0x00 },
426  { OUT, GRREG, 3, GRVAL, 0x00 },
427  { OUT, GRREG, 4, GRVAL, 0x00 },
428  { OUT, GRREG, 5, GRVAL, 0x00 },
429  { OUT, GRREG, 6, GRVAL, 0x05 },
430  { OUT, GRREG, 7, GRVAL, 0x0f },
431  { OUT, GRREG, 8, GRVAL, 0xff },
432
433  /* Reset attribute flip/flop */
434  { IN, ATTRREG, 0, 0, 0 },
435
436  /* Palette */
437  { OUT, PALREG, 0, PALREG, 0x00 },
438  { OUT, PALREG, 1, PALREG, 0x01 },
439  { OUT, PALREG, 2, PALREG, 0x02 },
440  { OUT, PALREG, 3, PALREG, 0x03 },
441  { OUT, PALREG, 4, PALREG, 0x04 },
442  { OUT, PALREG, 5, PALREG, 0x05 },
443  { OUT, PALREG, 6, PALREG, 0x06 },
444  { OUT, PALREG, 7, PALREG, 0x07 },
445  { OUT, PALREG, 8, PALREG, 0x38 },
446  { OUT, PALREG, 9, PALREG, 0x39 },
447  { OUT, PALREG, 10, PALREG, 0x3a },
448  { OUT, PALREG, 11, PALREG, 0x3b },
449  { OUT, PALREG, 12, PALREG, 0x3c },
450  { OUT, PALREG, 13, PALREG, 0x3d },
451  { OUT, PALREG, 14, PALREG, 0x3e },
452  { OUT, PALREG, 15, PALREG, 0x3f },
453  { OUT, PALREG, 16, PALREG, 0x01 },
454  { OUT, PALREG, 17, PALREG, 0x00 },
455  { OUT, PALREG, 18, PALREG, 0x0f },
456  { OUT, PALREG, 19, PALREG, 0x00 },
457
458  /* Enable palette */
459  { OUT, PALREG, 0x20, 0, 0 },
460
461  /* End of table */
462  { DONE, 0, 0, 0, 0 }
463};
464
465/* VGA 80x25 text (BIOS mode 3).
466 */
467static REGIO graph_off[] = {
468  /* Reset attr F/F */
469  { IN, ATTRREG, 0, 0, 0 },
470
471  /* Disable palette */
472  { OUT, PALREG, 0, 0, 0 },
473
474  /* Reset sequencer regs */
475  { OUT, SEQREG, 0, SEQVAL, 1 },
476  { OUT, SEQREG, 1, SEQVAL, 1 },
477  { OUT, SEQREG, 2, SEQVAL, 3 },
478  { OUT, SEQREG, 3, SEQVAL, 0 },
479  { OUT, SEQREG, 4, SEQVAL, 2 },
480
481  /* Misc out reg */
482  { OUT, GENREG1, 0x63, 0, 0 },
483
484  /* Sequencer enable */
485  { OUT, SEQREG, 0, SEQVAL, 3 },
486
487  /* Unprotect crtc regs 0-7 */
488  { OUT, CRTCREG, 0x11, CRTCVAL, 0 },
489
490  /* Crtc */
491  { OUT, CRTCREG, 0, CRTCVAL, 0x5f },   /* horiz total */
492  { OUT, CRTCREG, 1, CRTCVAL, 0x4f },   /* horiz end */
493  { OUT, CRTCREG, 2, CRTCVAL, 0x50 },   /* horiz blank */
494  { OUT, CRTCREG, 3, CRTCVAL, 0x82 },   /* end blank */
495  { OUT, CRTCREG, 4, CRTCVAL, 0x55 },   /* horiz retrace */
496  { OUT, CRTCREG, 5, CRTCVAL, 0x81 },   /* end retrace */
497  { OUT, CRTCREG, 6, CRTCVAL, 0xbf },   /* vert total */
498  { OUT, CRTCREG, 7, CRTCVAL, 0x1f },   /* overflows */
499  { OUT, CRTCREG, 8, CRTCVAL, 0x00 },   /* row scan */
500  { OUT, CRTCREG, 9, CRTCVAL, 0x4f },   /* max scan line */
501  { OUT, CRTCREG, 10, CRTCVAL, 0x00 },  /* cursor start */
502  { OUT, CRTCREG, 11, CRTCVAL, 0x0f },  /* cursor end */
503  { OUT, CRTCREG, 12, CRTCVAL, 0x0e },  /* start high addr */
504  { OUT, CRTCREG, 13, CRTCVAL, 0xb0 },  /* low addr */
505  { OUT, CRTCREG, 14, CRTCVAL, 0x16 },  /* cursor high */
506  { OUT, CRTCREG, 15, CRTCVAL, 0x30 },  /* cursor low */
507  { OUT, CRTCREG, 16, CRTCVAL, 0x9c },  /* vert retrace */
508  { OUT, CRTCREG, 17, CRTCVAL, 0x8e },  /* retrace end */
509  { OUT, CRTCREG, 18, CRTCVAL, 0x8f },  /* vert end */
510  { OUT, CRTCREG, 19, CRTCVAL, 0x28 },  /* offset */
511  { OUT, CRTCREG, 20, CRTCVAL, 0x1f },  /* underline */
512  { OUT, CRTCREG, 21, CRTCVAL, 0x96 },  /* vert blank */
513  { OUT, CRTCREG, 22, CRTCVAL, 0xb9 },  /* end blank */
514  { OUT, CRTCREG, 23, CRTCVAL, 0xa3 },  /* crt mode */
515  { OUT, CRTCREG, 24, CRTCVAL, 0xff },  /* line compare */
516
517  /* Graphics controller */
518  { OUT, GENREG2, 0x00, 0, 0 },
519  { OUT, GENREG3, 0x01, 0, 0 },
520  { OUT, GRREG, 0, GRVAL, 0x00 },
521  { OUT, GRREG, 1, GRVAL, 0x00 },
522  { OUT, GRREG, 2, GRVAL, 0x00 },
523  { OUT, GRREG, 3, GRVAL, 0x00 },
524  { OUT, GRREG, 4, GRVAL, 0x00 },
525  { OUT, GRREG, 5, GRVAL, 0x10 },
526  { OUT, GRREG, 6, GRVAL, 0x0e },
527  { OUT, GRREG, 7, GRVAL, 0x00 },
528  { OUT, GRREG, 8, GRVAL, 0xff },
529
530  /* Reset attribute flip/flop */
531  { IN, ATTRREG, 0, 0, 0 },
532
533  /* Palette */
534  { OUT, PALREG, 0, PALREG, 0x00 },
535  { OUT, PALREG, 1, PALREG, 0x01 },
536  { OUT, PALREG, 2, PALREG, 0x02 },
537  { OUT, PALREG, 3, PALREG, 0x03 },
538  { OUT, PALREG, 4, PALREG, 0x04 },
539  { OUT, PALREG, 5, PALREG, 0x05 },
540  { OUT, PALREG, 6, PALREG, 0x06 },
541  { OUT, PALREG, 7, PALREG, 0x07 },
542  { OUT, PALREG, 8, PALREG, 0x10 },
543  { OUT, PALREG, 9, PALREG, 0x11 },
544  { OUT, PALREG, 10, PALREG, 0x12 },
545  { OUT, PALREG, 11, PALREG, 0x13 },
546  { OUT, PALREG, 12, PALREG, 0x14 },
547  { OUT, PALREG, 13, PALREG, 0x15 },
548  { OUT, PALREG, 14, PALREG, 0x16 },
549  { OUT, PALREG, 15, PALREG, 0x17 },
550  { OUT, PALREG, 16, PALREG, 0x08 },
551  { OUT, PALREG, 17, PALREG, 0x00 },
552  { OUT, PALREG, 18, PALREG, 0x0f },
553  { OUT, PALREG, 19, PALREG, 0x00 },
554
555  /* Enable palette */
556  { OUT, PALREG, 0x20, 0, 0 },
557
558  /* End of table */
559  { DONE, 0, 0, 0, 0 }
560};
561
562#endif
563
564#if EGA_STANDARD
565
566/* EGA 640x350 16-color graphics (BIOS mode 0x10).
567 */
568static REGIO graphics_on[] = {
569  /* Reset attr F/F */
570  IN, ATTRREG, 0, 0, 0,
571
572  /* Disable palette */
573  OUT, PALREG, 0, 0, 0,
574
575  /* Reset sequencer regs */
576  OUT, SEQREG, 0, SEQVAL, 0,
577  OUT, SEQREG, 1, SEQVAL, 1,
578  OUT, SEQREG, 2, SEQVAL, 0x0f,
579  OUT, SEQREG, 3, SEQVAL, 0,
580  OUT, SEQREG, 4, SEQVAL, 6,
581
582  /* Misc out reg */
583  OUT, GENREG1, 0xa7, 0, 0,
584
585  /* Sequencer enable */
586  OUT, SEQREG, 0, SEQVAL, 0x03,
587
588  /* Unprotect crtc regs 0-7 */
589  OUT, CRTCREG, 0x11, CRTCVAL, 0,
590
591  /* Crtc */
592  OUT, CRTCREG, 0, CRTCVAL, 0x5b,
593  OUT, CRTCREG, 1, CRTCVAL, 0x4f,
594  OUT, CRTCREG, 2, CRTCVAL, 0x53,
595  OUT, CRTCREG, 3, CRTCVAL, 0x37,
596  OUT, CRTCREG, 4, CRTCVAL, 0x52,
597  OUT, CRTCREG, 5, CRTCVAL, 0x00,
598  OUT, CRTCREG, 6, CRTCVAL, 0x6c,
599  OUT, CRTCREG, 7, CRTCVAL, 0x1f,
600  OUT, CRTCREG, 8, CRTCVAL, 0x00,
601  OUT, CRTCREG, 9, CRTCVAL, 0x00,
602  OUT, CRTCREG, 10, CRTCVAL, 0x00,
603  OUT, CRTCREG, 11, CRTCVAL, 0x00,
604  OUT, CRTCREG, 12, CRTCVAL, 0x00,
605  OUT, CRTCREG, 13, CRTCVAL, 0x00,
606  OUT, CRTCREG, 14, CRTCVAL, 0x00,
607  OUT, CRTCREG, 15, CRTCVAL, 0x00,
608  OUT, CRTCREG, 16, CRTCVAL, 0x5e,
609  OUT, CRTCREG, 17, CRTCVAL, 0x2b,
610  OUT, CRTCREG, 18, CRTCVAL, 0x5d,
611  OUT, CRTCREG, 19, CRTCVAL, 0x28,
612  OUT, CRTCREG, 20, CRTCVAL, 0x0f,
613  OUT, CRTCREG, 21, CRTCVAL, 0x5f,
614  OUT, CRTCREG, 22, CRTCVAL, 0x0a,
615  OUT, CRTCREG, 23, CRTCVAL, 0xe3,
616  OUT, CRTCREG, 24, CRTCVAL, 0xff,
617
618  /* Graphics controller */
619  OUT, GENREG2, 0x00, 0, 0,
620  OUT, GENREG3, 0x01, 0, 0,
621  OUT, GRREG, 0, GRVAL, 0x00,
622  OUT, GRREG, 1, GRVAL, 0x00,
623  OUT, GRREG, 2, GRVAL, 0x00,
624  OUT, GRREG, 3, GRVAL, 0x00,
625  OUT, GRREG, 4, GRVAL, 0x00,
626  OUT, GRREG, 5, GRVAL, 0x00,
627  OUT, GRREG, 6, GRVAL, 0x05,
628  OUT, GRREG, 7, GRVAL, 0x0f,
629  OUT, GRREG, 8, GRVAL, 0xff,
630
631  /* Reset attribute flip/flop */
632  IN, ATTRREG, 0, 0, 0,
633
634  /* Palette */
635  OUT, PALREG, 0, PALREG, 0x00,
636  OUT, PALREG, 1, PALREG, 0x01,
637  OUT, PALREG, 2, PALREG, 0x02,
638  OUT, PALREG, 3, PALREG, 0x03,
639  OUT, PALREG, 4, PALREG, 0x04,
640  OUT, PALREG, 5, PALREG, 0x05,
641  OUT, PALREG, 6, PALREG, 0x06,
642  OUT, PALREG, 7, PALREG, 0x07,
643  OUT, PALREG, 8, PALREG, 0x38,
644  OUT, PALREG, 9, PALREG, 0x39,
645  OUT, PALREG, 10, PALREG, 0x3a,
646  OUT, PALREG, 11, PALREG, 0x3b,
647  OUT, PALREG, 12, PALREG, 0x3c,
648  OUT, PALREG, 13, PALREG, 0x3d,
649  OUT, PALREG, 14, PALREG, 0x3e,
650  OUT, PALREG, 15, PALREG, 0x3f,
651  OUT, PALREG, 16, PALREG, 0x01,
652  OUT, PALREG, 17, PALREG, 0x00,
653  OUT, PALREG, 18, PALREG, 0x0f,
654  OUT, PALREG, 19, PALREG, 0x00,
655
656  /* Enable palette */
657  OUT, PALREG, 0x20, 0, 0,
658
659  /* End of table */
660  DONE, 0, 0, 0, 0
661};
662
663/* EGA 80x25 text (BIOS mode 3).
664 */
665static REGIO graph_off[] = {
666  /* Reset attr F/F */
667  IN, ATTRREG, 0, 0, 0,
668
669  /* Disable palette */
670  OUT, PALREG, 0, 0, 0,
671
672  /* Reset sequencer regs */
673  OUT, SEQREG, 0, SEQVAL, 1,
674  OUT, SEQREG, 1, SEQVAL, 1,
675  OUT, SEQREG, 2, SEQVAL, 3,
676  OUT, SEQREG, 3, SEQVAL, 0,
677  OUT, SEQREG, 4, SEQVAL, 3,
678
679  /* Misc out reg */
680  OUT, GENREG1, 0xa7, 0, 0,
681
682  /* Sequencer enable */
683  OUT, SEQREG, 0, SEQVAL, 3,
684
685  /* Crtc */
686  OUT, CRTCREG, 0, CRTCVAL, 0x5b,       /* horiz total */
687  OUT, CRTCREG, 1, CRTCVAL, 0x4f,       /* horiz end */
688  OUT, CRTCREG, 2, CRTCVAL, 0x53,       /* horiz blank */
689  OUT, CRTCREG, 3, CRTCVAL, 0x37,       /* end blank */
690  OUT, CRTCREG, 4, CRTCVAL, 0x51,       /* horiz retrace */
691  OUT, CRTCREG, 5, CRTCVAL, 0x5b,       /* end retrace */
692  OUT, CRTCREG, 6, CRTCVAL, 0x6c,       /* vert total */
693  OUT, CRTCREG, 7, CRTCVAL, 0x1f,       /* overflows */
694  OUT, CRTCREG, 8, CRTCVAL, 0x00,       /* row scan */
695  OUT, CRTCREG, 9, CRTCVAL, 0x0d,       /* max scan line */
696  OUT, CRTCREG, 10, CRTCVAL, 0x00,      /* cursor start */
697  OUT, CRTCREG, 11, CRTCVAL, 0x0f,      /* cursor end */
698  OUT, CRTCREG, 12, CRTCVAL, 0x00,      /* start high addr */
699  OUT, CRTCREG, 13, CRTCVAL, 0x00,      /* low addr */
700  OUT, CRTCREG, 14, CRTCVAL, 0x00,      /* cursor high */
701  OUT, CRTCREG, 15, CRTCVAL, 0x00,      /* cursor low */
702  OUT, CRTCREG, 16, CRTCVAL, 0x5e,      /* vert retrace */
703  OUT, CRTCREG, 17, CRTCVAL, 0x2b,      /* retrace end */
704  OUT, CRTCREG, 18, CRTCVAL, 0x5d,      /* vert end */
705  OUT, CRTCREG, 19, CRTCVAL, 0x28,      /* offset */
706  OUT, CRTCREG, 20, CRTCVAL, 0x0f,      /* underline */
707  OUT, CRTCREG, 21, CRTCVAL, 0x5e,      /* vert blank */
708  OUT, CRTCREG, 22, CRTCVAL, 0x0a,      /* end blank */
709  OUT, CRTCREG, 23, CRTCVAL, 0xa3,      /* crt mode */
710  OUT, CRTCREG, 24, CRTCVAL, 0xff,      /* line compare */
711
712  /* Graphics controller */
713  OUT, GENREG2, 0x00, 0, 0,
714  OUT, GENREG3, 0x01, 0, 0,
715  OUT, GRREG, 0, GRVAL, 0x00,
716  OUT, GRREG, 1, GRVAL, 0x00,
717  OUT, GRREG, 2, GRVAL, 0x00,
718  OUT, GRREG, 3, GRVAL, 0x00,
719  OUT, GRREG, 4, GRVAL, 0x00,
720  OUT, GRREG, 5, GRVAL, 0x10,
721  OUT, GRREG, 6, GRVAL, 0x0e,
722  OUT, GRREG, 7, GRVAL, 0x00,
723  OUT, GRREG, 8, GRVAL, 0xff,
724
725  /* Reset attribute flip/flop */
726  IN, ATTRREG, 0, 0, 0,
727
728  /* Palette */
729  OUT, PALREG, 0, PALREG, 0x00,
730  OUT, PALREG, 1, PALREG, 0x01,
731  OUT, PALREG, 2, PALREG, 0x02,
732  OUT, PALREG, 3, PALREG, 0x03,
733  OUT, PALREG, 4, PALREG, 0x04,
734  OUT, PALREG, 5, PALREG, 0x05,
735  OUT, PALREG, 6, PALREG, 0x14,
736  OUT, PALREG, 7, PALREG, 0x07,
737  OUT, PALREG, 8, PALREG, 0x38,
738  OUT, PALREG, 9, PALREG, 0x39,
739  OUT, PALREG, 10, PALREG, 0x3a,
740  OUT, PALREG, 11, PALREG, 0x3b,
741  OUT, PALREG, 12, PALREG, 0x3c,
742  OUT, PALREG, 13, PALREG, 0x3d,
743  OUT, PALREG, 14, PALREG, 0x3e,
744  OUT, PALREG, 15, PALREG, 0x3f,
745  OUT, PALREG, 16, PALREG, 0x08,
746  OUT, PALREG, 17, PALREG, 0x00,
747  OUT, PALREG, 18, PALREG, 0x0f,
748  OUT, PALREG, 19, PALREG, 0x00,
749
750  /* Enable palette */
751  OUT, PALREG, 0x20, 0, 0,
752
753  /* End of table */
754  DONE, 0, 0, 0, 0
755};
756
757#endif
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