source: rtems/c/src/lib/libbsp/i386/pc386/console/uart_bus_pci.c @ 356b2c23

5
Last change on this file since 356b2c23 was 356b2c23, checked in by Joel Sherrill <joel@…>, on Mar 4, 2016 at 9:40:49 PM

pc386: Add PCI UART support

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File size: 12.4 KB
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1/*
2 * This file was brought over from FreeBSD for the PCI device table.
3 * The code for using the table is RTEMS specific is also under the
4 * FreeBSD license.
5 *
6 * COPYRIGHT (c) 1989-2012.
7 * On-Line Applications Research Corporation (OAR).
8 */
9
10/*-
11 * Copyright (c) 2006 Marcel Moolenaar
12 * Copyright (c) 2001 M. Warner Losh
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 *    notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 *    notice, this list of conditions and the following disclaimer in the
22 *    documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#ifdef __rtems__
37#include <stddef.h>
38#include <stdint.h>
39#else
40#include <sys/cdefs.h>
41__FBSDID("$FreeBSD$");
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/bus.h>
46#include <sys/conf.h>
47#include <sys/kernel.h>
48#include <sys/module.h>
49#include <machine/bus.h>
50#include <sys/rman.h>
51#include <machine/resource.h>
52
53#include <dev/pci/pcivar.h>
54
55#include <dev/uart/uart.h>
56#include <dev/uart/uart_bus.h>
57#endif
58
59#define DEFAULT_RCLK    1843200
60
61#ifndef __rtems__
62static int uart_pci_probe(device_t dev);
63
64static device_method_t uart_pci_methods[] = {
65        /* Device interface */
66        DEVMETHOD(device_probe,         uart_pci_probe),
67        DEVMETHOD(device_attach,        uart_bus_attach),
68        DEVMETHOD(device_detach,        uart_bus_detach),
69        DEVMETHOD(device_resume,        uart_bus_resume),
70        DEVMETHOD_END
71};
72
73static driver_t uart_pci_driver = {
74        uart_driver_name,
75        uart_pci_methods,
76        sizeof(struct uart_softc),
77};
78#endif
79
80struct pci_id {
81        uint16_t        vendor;
82        uint16_t        device;
83        uint16_t        subven;
84        uint16_t        subdev;
85        const char      *desc;
86        int             rid;
87        int             rclk;
88        int             regshft;
89};
90
91static const struct pci_id pci_ns8250_ids[] = {
92{ 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
93        128 * DEFAULT_RCLK },
94{ 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14,
95        128 * DEFAULT_RCLK },
96{ 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 },
97{ 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 },
98{ 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2",
99        0x10 },
100{ 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 },
101{ 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 },
102{ 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 },
103{ 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 },
104{ 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 },
105{ 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 },
106{ 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 },
107{ 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 },
108{ 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 },
109{ 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 },
110{ 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 },
111{ 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 },
112{ 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 },
113{ 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 },
114{ 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 },
115{ 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530",
116        0x18 },
117{ 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 },
118{ 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 },
119{ 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 },
120{ 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10,
121        8 * DEFAULT_RCLK },
122{ 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10,
123        8 * DEFAULT_RCLK },
124{ 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10,
125        8 * DEFAULT_RCLK },
126{ 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10,
127        8 * DEFAULT_RCLK },
128{ 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10,
129        8 * DEFAULT_RCLK },
130{ 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART",
131        0x10, 16384000 },
132{ 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART",
133        0x10 },
134{ 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10},
135{ 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 },
136{ 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10,
137        8 * DEFAULT_RCLK },
138{ 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10,
139        24 * DEFAULT_RCLK, 2 },
140{ 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10,
141        24 * DEFAULT_RCLK, 2 },
142{ 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 },
143{ 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller", 0x10 },
144{ 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 },
145{ 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 },
146{ 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 },
147{ 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller",
148        0x10 },
149{ 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 },
150{ 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 },
151{ 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
152{ 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 },
153{ 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 },
154{ 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 },
155{ 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 },
156{ 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 },
157{ 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 },
158{ 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 },
159{ 0x9710, 0x9900, 0xa000, 0x1000,
160        "MosChip MCS9900 PCIe to Peripheral Controller", 0x10 },
161{ 0x9710, 0x9901, 0xa000, 0x1000,
162        "MosChip MCS9901 PCIe to Peripheral Controller", 0x10 },
163{ 0x9710, 0x9904, 0xa000, 0x1000,
164        "MosChip MCS9904 PCIe to Peripheral Controller", 0x10 },
165{ 0x9710, 0x9922, 0xa000, 0x1000,
166        "MosChip MCS9922 PCIe to Peripheral Controller", 0x10 },
167{ 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 },
168{ 0xffff, 0, 0xffff, 0, NULL, 0, 0}
169};
170
171#ifndef __rtems__
172const static struct pci_id *
173uart_pci_match(device_t dev, const struct pci_id *id)
174{
175        uint16_t device, subdev, subven, vendor;
176
177        vendor = pci_get_vendor(dev);
178        device = pci_get_device(dev);
179        while (id->vendor != 0xffff &&
180            (id->vendor != vendor || id->device != device))
181                id++;
182        if (id->vendor == 0xffff)
183                return (NULL);
184        if (id->subven == 0xffff)
185                return (id);
186        subven = pci_get_subvendor(dev);
187        subdev = pci_get_subdevice(dev);
188        while (id->vendor == vendor && id->device == device &&
189            (id->subven != subven || id->subdev != subdev))
190                id++;
191        return ((id->vendor == vendor && id->device == device) ? id : NULL);
192}
193
194static int
195uart_pci_probe(device_t dev)
196{
197        struct uart_softc *sc;
198        const struct pci_id *id;
199        int result;
200
201        sc = device_get_softc(dev);
202
203        id = uart_pci_match(dev, pci_ns8250_ids);
204        if (id != NULL) {
205                sc->sc_class = &uart_ns8250_class;
206                goto match;
207        }
208        /* Add checks for non-ns8250 IDs here. */
209        return (ENXIO);
210
211 match:
212        result = uart_bus_probe(dev, id->regshft, id->rclk, id->rid, 0);
213        /* Bail out on error. */
214        if (result > 0)
215                return (result);
216        /* Set/override the device description. */
217        if (id->desc)
218                device_set_desc(dev, id->desc);
219        return (result);
220}
221
222DRIVER_MODULE(uart, pci, uart_pci_driver, uart_devclass, NULL, NULL);
223#endif
224
225#ifdef __rtems__
226
227#include <bsp.h>
228// #include <termios.h>
229#include <stdio.h>
230#include <stdlib.h>
231
232// #include <rtems/termiostypes.h>
233#include <libchip/serial.h>
234#include <libchip/ns16550.h>
235#include <rtems/bspIo.h>
236#include <rtems/pci.h>
237#include "../../../shared/console_private.h"
238
239#define MAX_BOARDS 4
240
241/*
242 * Information saved from PCI scan
243 */
244typedef struct {
245  bool      found;
246  uint32_t  base;
247  uint8_t   irq;
248  uint8_t   bus;
249  uint8_t   slot;
250  int       ports;
251  uint32_t  clock;
252} port_instance_conf_t;
253
254/*
255 *  Register Access Routines
256 */
257static uint8_t pci_ns16550_get_register(uint32_t addr, uint8_t i)
258{
259  uint8_t          val = 0;
260  volatile uint32_t *reg = (volatile uint32_t *)(addr + (i*4));
261
262  val = *reg;
263  /* printk( "RD(%p -> 0x%02x) ", reg, val ); */
264  return val;
265}
266
267static void pci_ns16550_set_register(uint32_t addr, uint8_t i, uint8_t val)
268{
269  volatile uint32_t *reg = (volatile uint32_t *)(addr + (i*4));
270
271  /* printk( "WR(%p <- 0x%02x) ", reg, val ); */
272  *reg = val;
273}
274
275void pci_uart_probe(void)
276{
277  port_instance_conf_t  conf[MAX_BOARDS];
278  int                   boards = 0;
279  int                   b = 0;
280  console_tbl          *ports;
281  console_tbl          *port_p;
282  int                   bus;
283  int                   dev;
284  int                   fun;
285  int                   status;
286  int                   instance;
287  int                   i;
288  int                   total_ports = 0;
289
290  for ( b=0 ; b<MAX_BOARDS ; b++ ) {
291    conf[b].found = false;
292  }
293
294  /*
295   *  Scan for Serial port boards
296   */
297  for ( instance=0 ; instance < MAX_BOARDS ; instance++ ) {
298
299    for ( i=0 ; pci_ns8250_ids[i].vendor != 0xffff ; i++ ) {
300      if ( pci_ns8250_ids[i].vendor == 0xffff ) {
301        break;
302      }
303/*
304      printk("Looking for 0x%04x:0x%04x\n",
305        pci_ns8250_ids[i].vendor,
306        pci_ns8250_ids[i].device);
307*/
308      status = pci_find_device(
309        pci_ns8250_ids[i].vendor,
310        pci_ns8250_ids[i].device,
311        instance,
312        &bus,
313        &dev,
314        &fun
315      );
316      if ( status == PCIB_ERR_SUCCESS ) {
317        boards++;
318        conf[instance].found = true;
319        conf[instance].clock =  pci_ns8250_ids[i].rclk;
320        conf[instance].ports = 1;
321        total_ports += conf[instance].ports;
322        break;
323      }
324    }
325
326    if ( status != PCIB_ERR_SUCCESS )
327      continue;
328
329    uint8_t  irq;
330    uint32_t base;
331
332    pci_read_config_byte( bus, dev, fun, PCI_INTERRUPT_LINE, &irq );
333    pci_read_config_dword( bus, dev, fun, PCI_BASE_ADDRESS_0, &base );
334
335    conf[instance].irq  = irq;
336    conf[instance].base = base;
337
338    printk(
339      "Found %s #%d at 0x%08x IRQ %d with %d clock\n",
340      pci_ns8250_ids[i].desc,
341      instance,
342      conf[instance].base,
343      conf[instance].irq,
344      conf[instance].clock
345    );
346  }
347
348  /*
349   *  Now allocate array of device structures and fill them in
350   */
351  int device_instance;
352  ports = calloc( total_ports, sizeof( console_tbl ) );
353  port_p = ports;
354  device_instance = 1;
355  for ( b=0 ; b<MAX_BOARDS ; b++ ) {
356    if ( conf[b].found == false )
357      continue;
358    char name[32];
359
360    sprintf( name, "/dev/pcicom%d", device_instance++ );
361    port_p->sDeviceName   = strdup( name );
362    port_p->deviceType    = SERIAL_NS16550;
363    if ( conf[b].irq <= 15 ) {
364      port_p->pDeviceFns    = &ns16550_fns;
365    } else {
366      printk(
367        "%s IRQ=%d >= 16 requires APIC support, using polling\n",
368        name,
369        conf[b].irq <= 15
370      );
371      port_p->pDeviceFns    = &ns16550_fns_polled;
372    }
373
374    port_p->deviceProbe   = NULL;
375    port_p->pDeviceFlow   = NULL;
376    port_p->ulMargin      = 16;
377    port_p->ulHysteresis  = 8;
378    port_p->pDeviceParams = (void *) 9600;
379    port_p->ulCtrlPort1   = conf[b].base;
380    port_p->ulCtrlPort2   = 0;                   /* NA */
381    port_p->ulDataPort    = 0;                   /* NA */
382    port_p->getRegister   = pci_ns16550_get_register;
383    port_p->setRegister   = pci_ns16550_set_register;
384    port_p->getData       = NULL;                /* NA */
385    port_p->setData       = NULL;                /* NA */
386    port_p->ulClock       = conf[b].clock;
387    port_p->ulIntVector   = conf[b].irq;
388
389    port_p++;
390  }    /* end boards */
391
392  /*
393   *  Register the devices
394   */
395  if ( boards )
396    console_register_devices( ports, total_ports );
397}
398#endif
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