[356b2c23] | 1 | /* |
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| 2 | * This file was brought over from FreeBSD for the PCI device table. |
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| 3 | * The code for using the table is RTEMS specific is also under the |
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| 4 | * FreeBSD license. |
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| 5 | * |
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| 6 | * COPYRIGHT (c) 1989-2012. |
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| 7 | * On-Line Applications Research Corporation (OAR). |
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| 8 | */ |
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| 9 | |
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| 10 | /*- |
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| 11 | * Copyright (c) 2006 Marcel Moolenaar |
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| 12 | * Copyright (c) 2001 M. Warner Losh |
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| 13 | * All rights reserved. |
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| 14 | * |
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| 15 | * Redistribution and use in source and binary forms, with or without |
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| 16 | * modification, are permitted provided that the following conditions |
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| 17 | * are met: |
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| 18 | * 1. Redistributions of source code must retain the above copyright |
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| 19 | * notice, this list of conditions and the following disclaimer. |
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| 20 | * 2. Redistributions in binary form must reproduce the above copyright |
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| 21 | * notice, this list of conditions and the following disclaimer in the |
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| 22 | * documentation and/or other materials provided with the distribution. |
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| 23 | * |
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| 24 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
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| 25 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
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| 26 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
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| 27 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 28 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
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| 29 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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| 30 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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| 31 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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| 32 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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| 33 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 34 | */ |
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| 35 | |
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| 36 | #ifdef __rtems__ |
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| 37 | #include <stddef.h> |
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| 38 | #include <stdint.h> |
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[03ad2a5a] | 39 | #include <i386_io.h> |
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[356b2c23] | 40 | #else |
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| 41 | #include <sys/cdefs.h> |
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| 42 | __FBSDID("$FreeBSD$"); |
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| 43 | |
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| 44 | #include <sys/param.h> |
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| 45 | #include <sys/systm.h> |
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| 46 | #include <sys/bus.h> |
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| 47 | #include <sys/conf.h> |
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| 48 | #include <sys/kernel.h> |
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| 49 | #include <sys/module.h> |
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| 50 | #include <machine/bus.h> |
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| 51 | #include <sys/rman.h> |
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| 52 | #include <machine/resource.h> |
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| 53 | |
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| 54 | #include <dev/pci/pcivar.h> |
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| 55 | |
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| 56 | #include <dev/uart/uart.h> |
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| 57 | #include <dev/uart/uart_bus.h> |
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[03ad2a5a] | 58 | |
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[356b2c23] | 59 | #endif |
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| 60 | |
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| 61 | #define DEFAULT_RCLK 1843200 |
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| 62 | |
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| 63 | #ifndef __rtems__ |
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| 64 | static int uart_pci_probe(device_t dev); |
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| 65 | |
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| 66 | static device_method_t uart_pci_methods[] = { |
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| 67 | /* Device interface */ |
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| 68 | DEVMETHOD(device_probe, uart_pci_probe), |
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| 69 | DEVMETHOD(device_attach, uart_bus_attach), |
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| 70 | DEVMETHOD(device_detach, uart_bus_detach), |
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| 71 | DEVMETHOD(device_resume, uart_bus_resume), |
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| 72 | DEVMETHOD_END |
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| 73 | }; |
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| 74 | |
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| 75 | static driver_t uart_pci_driver = { |
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| 76 | uart_driver_name, |
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| 77 | uart_pci_methods, |
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| 78 | sizeof(struct uart_softc), |
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| 79 | }; |
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| 80 | #endif |
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| 81 | |
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| 82 | struct pci_id { |
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| 83 | uint16_t vendor; |
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| 84 | uint16_t device; |
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| 85 | uint16_t subven; |
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| 86 | uint16_t subdev; |
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| 87 | const char *desc; |
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| 88 | int rid; |
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| 89 | int rclk; |
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| 90 | int regshft; |
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| 91 | }; |
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| 92 | |
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| 93 | static const struct pci_id pci_ns8250_ids[] = { |
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| 94 | { 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14, |
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| 95 | 128 * DEFAULT_RCLK }, |
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| 96 | { 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14, |
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| 97 | 128 * DEFAULT_RCLK }, |
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| 98 | { 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 }, |
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| 99 | { 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 }, |
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| 100 | { 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2", |
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| 101 | 0x10 }, |
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| 102 | { 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 }, |
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| 103 | { 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 }, |
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| 104 | { 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 }, |
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| 105 | { 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 }, |
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| 106 | { 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 }, |
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| 107 | { 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 }, |
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| 108 | { 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 }, |
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| 109 | { 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 }, |
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| 110 | { 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 }, |
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| 111 | { 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 }, |
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| 112 | { 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 }, |
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| 113 | { 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 }, |
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| 114 | { 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 }, |
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| 115 | { 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 }, |
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| 116 | { 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 }, |
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| 117 | { 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530", |
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| 118 | 0x18 }, |
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| 119 | { 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 }, |
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| 120 | { 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 }, |
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| 121 | { 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 }, |
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| 122 | { 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10, |
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| 123 | 8 * DEFAULT_RCLK }, |
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| 124 | { 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10, |
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| 125 | 8 * DEFAULT_RCLK }, |
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| 126 | { 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10, |
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| 127 | 8 * DEFAULT_RCLK }, |
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| 128 | { 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10, |
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| 129 | 8 * DEFAULT_RCLK }, |
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| 130 | { 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10, |
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| 131 | 8 * DEFAULT_RCLK }, |
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| 132 | { 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART", |
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| 133 | 0x10, 16384000 }, |
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| 134 | { 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART", |
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| 135 | 0x10 }, |
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| 136 | { 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10}, |
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| 137 | { 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 }, |
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| 138 | { 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10, |
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| 139 | 8 * DEFAULT_RCLK }, |
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| 140 | { 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10, |
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| 141 | 24 * DEFAULT_RCLK, 2 }, |
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| 142 | { 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10, |
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| 143 | 24 * DEFAULT_RCLK, 2 }, |
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| 144 | { 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 }, |
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| 145 | { 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller", 0x10 }, |
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| 146 | { 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 }, |
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| 147 | { 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 }, |
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| 148 | { 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 }, |
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| 149 | { 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller", |
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| 150 | 0x10 }, |
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| 151 | { 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 }, |
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| 152 | { 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 }, |
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| 153 | { 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 }, |
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| 154 | { 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 }, |
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| 155 | { 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 }, |
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| 156 | { 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 }, |
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| 157 | { 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 }, |
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| 158 | { 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 }, |
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| 159 | { 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 }, |
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| 160 | { 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 }, |
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| 161 | { 0x9710, 0x9900, 0xa000, 0x1000, |
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| 162 | "MosChip MCS9900 PCIe to Peripheral Controller", 0x10 }, |
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| 163 | { 0x9710, 0x9901, 0xa000, 0x1000, |
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| 164 | "MosChip MCS9901 PCIe to Peripheral Controller", 0x10 }, |
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| 165 | { 0x9710, 0x9904, 0xa000, 0x1000, |
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| 166 | "MosChip MCS9904 PCIe to Peripheral Controller", 0x10 }, |
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| 167 | { 0x9710, 0x9922, 0xa000, 0x1000, |
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| 168 | "MosChip MCS9922 PCIe to Peripheral Controller", 0x10 }, |
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| 169 | { 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 }, |
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| 170 | { 0xffff, 0, 0xffff, 0, NULL, 0, 0} |
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| 171 | }; |
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| 172 | |
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| 173 | #ifndef __rtems__ |
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| 174 | const static struct pci_id * |
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| 175 | uart_pci_match(device_t dev, const struct pci_id *id) |
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| 176 | { |
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| 177 | uint16_t device, subdev, subven, vendor; |
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| 178 | |
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| 179 | vendor = pci_get_vendor(dev); |
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| 180 | device = pci_get_device(dev); |
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| 181 | while (id->vendor != 0xffff && |
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| 182 | (id->vendor != vendor || id->device != device)) |
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| 183 | id++; |
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| 184 | if (id->vendor == 0xffff) |
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| 185 | return (NULL); |
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| 186 | if (id->subven == 0xffff) |
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| 187 | return (id); |
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| 188 | subven = pci_get_subvendor(dev); |
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| 189 | subdev = pci_get_subdevice(dev); |
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| 190 | while (id->vendor == vendor && id->device == device && |
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| 191 | (id->subven != subven || id->subdev != subdev)) |
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| 192 | id++; |
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| 193 | return ((id->vendor == vendor && id->device == device) ? id : NULL); |
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| 194 | } |
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| 195 | |
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| 196 | static int |
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| 197 | uart_pci_probe(device_t dev) |
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| 198 | { |
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| 199 | struct uart_softc *sc; |
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| 200 | const struct pci_id *id; |
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| 201 | int result; |
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| 202 | |
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| 203 | sc = device_get_softc(dev); |
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| 204 | |
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| 205 | id = uart_pci_match(dev, pci_ns8250_ids); |
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| 206 | if (id != NULL) { |
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| 207 | sc->sc_class = &uart_ns8250_class; |
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| 208 | goto match; |
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| 209 | } |
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| 210 | /* Add checks for non-ns8250 IDs here. */ |
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| 211 | return (ENXIO); |
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| 212 | |
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| 213 | match: |
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| 214 | result = uart_bus_probe(dev, id->regshft, id->rclk, id->rid, 0); |
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| 215 | /* Bail out on error. */ |
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| 216 | if (result > 0) |
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| 217 | return (result); |
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| 218 | /* Set/override the device description. */ |
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| 219 | if (id->desc) |
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| 220 | device_set_desc(dev, id->desc); |
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| 221 | return (result); |
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| 222 | } |
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| 223 | |
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| 224 | DRIVER_MODULE(uart, pci, uart_pci_driver, uart_devclass, NULL, NULL); |
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| 225 | #endif |
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| 226 | |
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| 227 | #ifdef __rtems__ |
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| 228 | |
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| 229 | #include <bsp.h> |
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[03ad2a5a] | 230 | #include <bsp/bspimpl.h> |
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| 231 | |
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[356b2c23] | 232 | #include <stdio.h> |
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| 233 | #include <stdlib.h> |
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| 234 | |
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| 235 | #include <libchip/serial.h> |
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| 236 | #include <libchip/ns16550.h> |
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| 237 | #include <rtems/bspIo.h> |
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| 238 | #include <rtems/pci.h> |
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| 239 | #include "../../../shared/console_private.h" |
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| 240 | |
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| 241 | #define MAX_BOARDS 4 |
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| 242 | |
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| 243 | /* |
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| 244 | * Information saved from PCI scan |
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| 245 | */ |
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| 246 | typedef struct { |
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[03ad2a5a] | 247 | bool found; |
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| 248 | const char* desc; |
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| 249 | uint32_t base; |
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| 250 | uint8_t irq; |
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| 251 | uint8_t bus; |
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| 252 | uint8_t slot; |
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| 253 | int ports; |
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| 254 | uint32_t clock; |
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[356b2c23] | 255 | } port_instance_conf_t; |
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| 256 | |
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| 257 | /* |
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[03ad2a5a] | 258 | * Memory Mapped Register Access Routines |
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[356b2c23] | 259 | */ |
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[03ad2a5a] | 260 | |
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| 261 | #define UART_PCI_IO (0) |
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| 262 | |
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| 263 | static uint8_t pci_ns16550_mem_get_register(uint32_t addr, uint8_t i) |
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[356b2c23] | 264 | { |
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| 265 | uint8_t val = 0; |
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| 266 | volatile uint32_t *reg = (volatile uint32_t *)(addr + (i*4)); |
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| 267 | val = *reg; |
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[03ad2a5a] | 268 | if (UART_PCI_IO) |
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| 269 | printk( "RD(%p -> 0x%02x) ", reg, val ); |
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[356b2c23] | 270 | return val; |
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| 271 | } |
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| 272 | |
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[03ad2a5a] | 273 | static void pci_ns16550_mem_set_register(uint32_t addr, uint8_t i, uint8_t val) |
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[356b2c23] | 274 | { |
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| 275 | volatile uint32_t *reg = (volatile uint32_t *)(addr + (i*4)); |
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[03ad2a5a] | 276 | if (UART_PCI_IO) |
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| 277 | printk( "WR(%p <- 0x%02x) ", reg, val ); |
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[356b2c23] | 278 | *reg = val; |
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| 279 | } |
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| 280 | |
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[03ad2a5a] | 281 | /* |
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| 282 | * IO Register Access Routines |
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| 283 | */ |
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| 284 | static uint8_t pci_ns16550_io_get_register(uint32_t addr, uint8_t i) |
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| 285 | { |
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| 286 | uint8_t val = rtems_inb(addr + i); |
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| 287 | if (UART_PCI_IO) |
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[1503c1c3] | 288 | printk( "RD(%p -> 0x%02x) ", (void*) addr + i, val ); |
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[03ad2a5a] | 289 | return val; |
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| 290 | } |
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| 291 | |
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| 292 | static void pci_ns16550_io_set_register(uint32_t addr, uint8_t i, uint8_t val) |
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| 293 | { |
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| 294 | if (UART_PCI_IO) |
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[1503c1c3] | 295 | printk( "WR(%p <- 0x%02x) ", (void*) addr + i, val ); |
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[03ad2a5a] | 296 | rtems_outb(addr + i, val); |
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| 297 | } |
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| 298 | |
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[356b2c23] | 299 | void pci_uart_probe(void) |
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| 300 | { |
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| 301 | port_instance_conf_t conf[MAX_BOARDS]; |
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| 302 | int boards = 0; |
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| 303 | int b = 0; |
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| 304 | console_tbl *ports; |
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| 305 | console_tbl *port_p; |
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| 306 | int bus; |
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| 307 | int dev; |
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| 308 | int fun; |
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| 309 | int status; |
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| 310 | int instance; |
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| 311 | int i; |
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| 312 | int total_ports = 0; |
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| 313 | |
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| 314 | for ( b=0 ; b<MAX_BOARDS ; b++ ) { |
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| 315 | conf[b].found = false; |
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| 316 | } |
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| 317 | |
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| 318 | /* |
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| 319 | * Scan for Serial port boards |
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| 320 | */ |
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| 321 | for ( instance=0 ; instance < MAX_BOARDS ; instance++ ) { |
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| 322 | |
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| 323 | for ( i=0 ; pci_ns8250_ids[i].vendor != 0xffff ; i++ ) { |
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| 324 | if ( pci_ns8250_ids[i].vendor == 0xffff ) { |
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| 325 | break; |
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| 326 | } |
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| 327 | /* |
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| 328 | printk("Looking for 0x%04x:0x%04x\n", |
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| 329 | pci_ns8250_ids[i].vendor, |
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| 330 | pci_ns8250_ids[i].device); |
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| 331 | */ |
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| 332 | status = pci_find_device( |
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| 333 | pci_ns8250_ids[i].vendor, |
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| 334 | pci_ns8250_ids[i].device, |
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| 335 | instance, |
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| 336 | &bus, |
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| 337 | &dev, |
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| 338 | &fun |
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| 339 | ); |
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| 340 | if ( status == PCIB_ERR_SUCCESS ) { |
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[014292a1] | 341 | uint8_t irq; |
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| 342 | uint32_t base; |
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[03ad2a5a] | 343 | bool io; |
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[014292a1] | 344 | |
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| 345 | pci_read_config_dword( bus, dev, fun, PCI_BASE_ADDRESS_0, &base ); |
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[356b2c23] | 346 | |
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[03ad2a5a] | 347 | /* |
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| 348 | * Reject memory mapped 64-bit boards. We need 2 BAR registers and the |
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| 349 | * driver's base field is only 32-bits any way. |
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| 350 | */ |
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| 351 | io = (base & 1) == 1; |
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| 352 | if (io || (!io && (((base >> 1) & 3) != 2))) { |
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| 353 | boards++; |
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| 354 | conf[instance].found = true; |
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| 355 | conf[instance].desc = pci_ns8250_ids[i].desc; |
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| 356 | conf[instance].clock = pci_ns8250_ids[i].rclk; |
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| 357 | conf[instance].ports = 1; |
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| 358 | total_ports += conf[instance].ports; |
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| 359 | |
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| 360 | pci_read_config_byte( bus, dev, fun, PCI_INTERRUPT_LINE, &irq ); |
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| 361 | |
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| 362 | conf[instance].irq = irq; |
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| 363 | conf[instance].base = base; |
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| 364 | } |
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[014292a1] | 365 | } |
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| 366 | } |
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[356b2c23] | 367 | } |
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| 368 | |
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| 369 | /* |
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| 370 | * Now allocate array of device structures and fill them in |
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| 371 | */ |
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[014292a1] | 372 | if (boards) { |
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| 373 | int device_instance; |
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| 374 | |
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| 375 | ports = calloc( total_ports, sizeof( console_tbl ) ); |
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| 376 | if (ports != NULL) { |
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| 377 | port_p = ports; |
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| 378 | device_instance = 1; |
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| 379 | for (b = 0; b < MAX_BOARDS; b++) { |
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[03ad2a5a] | 380 | uint32_t base = 0; |
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| 381 | bool io; |
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| 382 | const char* locatable = ""; |
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| 383 | const char* prefectable = locatable; |
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[014292a1] | 384 | char name[32]; |
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| 385 | if ( conf[b].found == false ) |
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| 386 | continue; |
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| 387 | sprintf( name, "/dev/pcicom%d", device_instance++ ); |
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| 388 | port_p->sDeviceName = strdup( name ); |
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| 389 | port_p->deviceType = SERIAL_NS16550; |
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| 390 | if ( conf[b].irq <= 15 ) { |
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| 391 | port_p->pDeviceFns = &ns16550_fns; |
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| 392 | } else { |
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| 393 | printk( |
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| 394 | "%s IRQ=%d >= 16 requires APIC support, using polling\n", |
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| 395 | name, |
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| 396 | conf[b].irq |
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| 397 | ); |
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| 398 | port_p->pDeviceFns = &ns16550_fns_polled; |
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| 399 | } |
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[356b2c23] | 400 | |
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[03ad2a5a] | 401 | /* |
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| 402 | * PCI BAR (http://wiki.osdev.org/PCI#Base_Address_Registers): |
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| 403 | * |
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| 404 | * Bit 0: 0 = memory, 1 = IO |
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| 405 | * |
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| 406 | * Memory: |
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| 407 | * Bit 2-1 : 0 = any 32bit address, |
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| 408 | * 1 = < 1M |
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| 409 | * 2 = any 64bit address |
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| 410 | * Bit 3 : 0 = no, 1 = yes |
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| 411 | * Bit 31-4 : base address (16-byte aligned) |
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| 412 | * |
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| 413 | * IO: |
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| 414 | * Bit 1 : reserved |
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| 415 | * Bit 31-2 : base address (4-byte aligned) |
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| 416 | */ |
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| 417 | |
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| 418 | io = (conf[b].base & 1) == 1; |
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| 419 | |
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| 420 | if (io) { |
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| 421 | base = conf[b].base & 0xfffffffc; |
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| 422 | } else { |
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| 423 | int loc = (conf[b].base >> 1) & 3; |
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| 424 | if (loc == 0) { |
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| 425 | base = conf[b].base & 0xfffffff0; |
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| 426 | locatable = ",A32"; |
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| 427 | } else if (loc == 1) { |
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| 428 | base = conf[b].base & 0x0000fff0; |
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| 429 | locatable = ",A16"; |
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| 430 | } |
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| 431 | prefectable = (conf[b].base & (1 << 3)) == 0 ? ",no-prefech" : ",prefetch"; |
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| 432 | } |
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| 433 | |
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[014292a1] | 434 | port_p->deviceProbe = NULL; |
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| 435 | port_p->pDeviceFlow = NULL; |
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| 436 | port_p->ulMargin = 16; |
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| 437 | port_p->ulHysteresis = 8; |
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| 438 | port_p->pDeviceParams = (void *) 9600; |
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[03ad2a5a] | 439 | port_p->ulCtrlPort1 = base; |
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[014292a1] | 440 | port_p->ulCtrlPort2 = 0; /* NA */ |
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| 441 | port_p->ulDataPort = 0; /* NA */ |
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[03ad2a5a] | 442 | if (io) { |
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| 443 | port_p->getRegister = pci_ns16550_io_get_register; |
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| 444 | port_p->setRegister = pci_ns16550_io_set_register; |
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| 445 | } else { |
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| 446 | port_p->getRegister = pci_ns16550_mem_get_register; |
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| 447 | port_p->setRegister = pci_ns16550_mem_set_register; |
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| 448 | } |
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[014292a1] | 449 | port_p->getData = NULL; /* NA */ |
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| 450 | port_p->setData = NULL; /* NA */ |
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| 451 | port_p->ulClock = conf[b].clock; |
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| 452 | port_p->ulIntVector = conf[b].irq; |
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| 453 | |
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[03ad2a5a] | 454 | |
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| 455 | printk( |
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[1503c1c3] | 456 | "%s:%d:%s,%s:0x%lx%s%s,irq:%d,clk:%lu\n", /* */ |
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[03ad2a5a] | 457 | name, b, conf[b].desc, |
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| 458 | io ? "io" : "mem", base, locatable, prefectable, |
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| 459 | conf[b].irq, conf[b].clock |
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| 460 | ); |
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| 461 | |
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| 462 | |
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[014292a1] | 463 | port_p++; |
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| 464 | } /* end boards */ |
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| 465 | |
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| 466 | /* |
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| 467 | * Register the devices |
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| 468 | */ |
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| 469 | console_register_devices( ports, total_ports ); |
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| 470 | |
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| 471 | /* |
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| 472 | * Do not free the ports memory, the console hold this memory for-ever. |
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| 473 | */ |
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| 474 | } |
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| 475 | } |
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[356b2c23] | 476 | } |
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| 477 | #endif |
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