1 | /* |
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2 | * Clock Tick Device Driver |
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3 | * |
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4 | * History: |
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5 | * + Original driver was go32 clock by Joel Sherrill |
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6 | * + go32 clock driver hardware code was inserted into new |
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7 | * boilerplate when the pc386 BSP by: |
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8 | * Pedro Miguel Da Cruz Neto Romano <pmcnr@camoes.rnl.ist.utl.pt> |
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9 | * Jose Rufino <ruf@asterix.ist.utl.pt> |
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10 | * + Reworked by Joel Sherrill to use clock driver template. |
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11 | * This removes all boilerplate and leave original hardware |
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12 | * code I developed for the go32 BSP. |
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13 | * |
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14 | * COPYRIGHT (c) 1989-2008. |
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15 | * On-Line Applications Research Corporation (OAR). |
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16 | * |
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17 | * The license and distribution terms for this file may be |
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18 | * found in the file LICENSE in this distribution or at |
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19 | * http://www.rtems.com/license/LICENSE. |
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20 | * |
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21 | * $Id$ |
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22 | */ |
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23 | |
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24 | #include <bsp.h> |
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25 | #include <bsp/irq.h> |
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26 | #include <bspopts.h> |
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27 | #include <libcpu/cpuModel.h> |
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28 | |
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29 | #define CLOCK_VECTOR 0 |
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30 | |
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31 | volatile uint32_t pc386_microseconds_per_isr; |
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32 | volatile uint32_t pc386_isrs_per_tick; |
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33 | uint32_t pc386_clock_click_count; |
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34 | |
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35 | /* |
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36 | * Roughly the number of cycles per tick and per nanosecond. Note that these |
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37 | * will be wildly inaccurate if the chip speed changes due to power saving |
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38 | * or thermal modes. |
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39 | * |
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40 | * NOTE: These are only used when the TSC method is used. |
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41 | */ |
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42 | uint64_t pc586_tsc_per_tick; |
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43 | uint64_t pc586_nanoseconds_per_tick; |
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44 | |
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45 | uint64_t pc586_tsc_at_tick; |
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46 | |
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47 | /* this driver may need to count ISRs per tick */ |
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48 | #define CLOCK_DRIVER_ISRS_PER_TICK pc386_isrs_per_tick |
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49 | |
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50 | /* if so, the driver may use the count in Clock_driver_support_at_tick */ |
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51 | #ifdef CLOCK_DRIVER_ISRS_PER_TICK |
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52 | extern volatile uint32_t Clock_driver_isrs; |
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53 | #endif |
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54 | |
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55 | #define READ_8254( _lsb, _msb ) \ |
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56 | do { outport_byte(TIMER_MODE, TIMER_SEL0|TIMER_LATCH); \ |
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57 | inport_byte(TIMER_CNTR0, _lsb); \ |
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58 | inport_byte(TIMER_CNTR0, _msb); \ |
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59 | } while (0) |
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60 | |
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61 | |
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62 | /* |
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63 | * Hooks which get swapped based upon which nanoseconds since last |
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64 | * tick method is preferred. |
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65 | */ |
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66 | void (*Clock_driver_support_at_tick)(void) = NULL; |
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67 | uint32_t (*Clock_driver_nanoseconds_since_last_tick)(void) = NULL; |
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68 | |
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69 | /* |
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70 | * What do we do at each clock tick? |
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71 | */ |
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72 | void Clock_driver_support_at_tick_tsc(void) |
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73 | { |
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74 | #ifdef CLOCK_DRIVER_ISRS_PER_TICK |
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75 | /* |
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76 | * The driver is multiple ISRs per clock tick. |
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77 | */ |
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78 | if (!Clock_driver_isrs) |
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79 | pc586_tsc_at_tick = rdtsc(); |
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80 | #else |
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81 | /* |
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82 | * The driver is one ISR per clock tick. |
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83 | */ |
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84 | pc586_tsc_at_tick = rdtsc(); |
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85 | #endif |
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86 | } |
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87 | |
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88 | void Clock_driver_support_at_tick_empty(void) |
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89 | { |
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90 | } |
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91 | |
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92 | #define Clock_driver_support_install_isr( _new, _old ) \ |
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93 | do { \ |
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94 | _old = NULL; \ |
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95 | } while(0) |
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96 | |
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97 | extern volatile uint32_t Clock_driver_isrs; |
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98 | |
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99 | uint32_t bsp_clock_nanoseconds_since_last_tick_tsc(void) |
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100 | { |
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101 | /****** |
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102 | * Get nanoseconds using Pentium-compatible TSC register |
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103 | ******/ |
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104 | |
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105 | uint64_t diff_nsec; |
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106 | |
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107 | diff_nsec = rdtsc() - pc586_tsc_at_tick; |
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108 | |
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109 | /* |
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110 | * At this point, with a hypothetical 10 GHz CPU clock and 100 Hz tick |
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111 | * clock, diff_nsec <= 27 bits. |
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112 | */ |
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113 | diff_nsec *= pc586_nanoseconds_per_tick; /* <= 54 bits */ |
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114 | diff_nsec /= pc586_tsc_per_tick; |
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115 | |
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116 | if (diff_nsec > pc586_nanoseconds_per_tick) |
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117 | /* |
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118 | * Hmmm... Some drift or rounding. Pin the value to 1 nanosecond before |
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119 | * the next tick. |
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120 | */ |
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121 | /* diff_nsec = pc586_nanoseconds_per_tick - 1; */ |
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122 | diff_nsec = 12345; |
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123 | |
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124 | return (uint32_t)diff_nsec; |
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125 | } |
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126 | |
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127 | uint32_t bsp_clock_nanoseconds_since_last_tick_i8254(void) |
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128 | { |
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129 | |
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130 | /****** |
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131 | * Get nanoseconds using 8254 timer chip |
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132 | ******/ |
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133 | |
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134 | uint32_t usecs, clicks, isrs; |
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135 | uint32_t usecs1, usecs2; |
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136 | uint8_t lsb, msb; |
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137 | rtems_interrupt_level level; |
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138 | |
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139 | /* |
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140 | * Fetch all the data in an interrupt critical section. |
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141 | */ |
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142 | rtems_interrupt_disable(level); |
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143 | READ_8254(lsb, msb); |
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144 | isrs = Clock_driver_isrs; |
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145 | rtems_interrupt_enable(level); |
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146 | |
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147 | /* |
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148 | * Now do the math |
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149 | */ |
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150 | /* convert values read into counter clicks */ |
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151 | clicks = ((msb << 8) | lsb); |
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152 | |
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153 | /* whole ISRs we have done since the last tick */ |
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154 | usecs1 = (pc386_isrs_per_tick - isrs - 1) * pc386_microseconds_per_isr; |
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155 | |
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156 | /* the partial ISR we in the middle of now */ |
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157 | usecs2 = pc386_microseconds_per_isr - TICK_TO_US(clicks); |
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158 | |
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159 | /* total microseconds */ |
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160 | usecs = usecs1 + usecs2; |
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161 | #if 0 |
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162 | printk( "usecs1=%d usecs2=%d ", usecs1, usecs2 ); |
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163 | printk( "maxclicks=%d clicks=%d ISRs=%d ISRsper=%d usersPer=%d usecs=%d\n", |
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164 | pc386_clock_click_count, clicks, |
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165 | Clock_driver_isrs, pc386_isrs_per_tick, |
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166 | pc386_microseconds_per_isr, usecs ); |
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167 | #endif |
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168 | |
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169 | /* return it in nanoseconds */ |
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170 | return usecs * 1000; |
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171 | |
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172 | } |
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173 | |
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174 | /* |
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175 | * Calibrate CPU cycles per tick. Interrupts should be disabled. |
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176 | */ |
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177 | static void calibrate_tsc(void) |
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178 | { |
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179 | uint64_t begin_time; |
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180 | uint8_t then_lsb, then_msb, now_lsb, now_msb; |
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181 | uint32_t i; |
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182 | |
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183 | pc586_nanoseconds_per_tick = |
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184 | rtems_configuration_get_microseconds_per_tick() * 1000; |
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185 | |
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186 | /* |
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187 | * We just reset the timer, so we know we're at the beginning of a tick. |
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188 | */ |
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189 | |
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190 | /* |
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191 | * Count cycles. Watching the timer introduces a several microsecond |
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192 | * uncertaintity, so let it cook for a while and divide by the number of |
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193 | * ticks actually executed. |
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194 | */ |
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195 | |
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196 | begin_time = rdtsc(); |
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197 | |
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198 | for (i = rtems_clock_get_ticks_per_second() * pc386_isrs_per_tick; |
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199 | i != 0; --i ) { |
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200 | /* We know we've just completed a tick when timer goes from low to high */ |
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201 | then_lsb = then_msb = 0xff; |
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202 | do { |
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203 | READ_8254(now_lsb, now_msb); |
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204 | if ((then_msb < now_msb) || |
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205 | ((then_msb == now_msb) && (then_lsb < now_lsb))) |
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206 | break; |
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207 | then_lsb = now_lsb; |
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208 | then_msb = now_msb; |
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209 | } while (1); |
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210 | } |
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211 | |
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212 | pc586_tsc_per_tick = rdtsc() - begin_time; |
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213 | |
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214 | /* Initialize "previous tick" counters */ |
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215 | pc586_tsc_at_tick = rdtsc(); |
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216 | |
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217 | #if 0 |
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218 | printk( "CPU clock at %u MHz\n", (uint32_t)(pc586_tsc_per_tick / 1000000)); |
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219 | #endif |
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220 | |
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221 | pc586_tsc_per_tick /= rtems_clock_get_ticks_per_second(); |
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222 | } |
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223 | |
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224 | static void clockOn( |
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225 | const rtems_irq_connect_data* unused |
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226 | ) |
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227 | { |
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228 | pc386_isrs_per_tick = 1; |
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229 | pc386_microseconds_per_isr = rtems_configuration_get_microseconds_per_tick(); |
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230 | |
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231 | while (US_TO_TICK(pc386_microseconds_per_isr) > 65535) { |
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232 | pc386_isrs_per_tick *= 10; |
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233 | pc386_microseconds_per_isr /= 10; |
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234 | } |
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235 | pc386_clock_click_count = US_TO_TICK(pc386_microseconds_per_isr); |
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236 | |
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237 | BSP_irq_enable_at_i8259s( BSP_PERIODIC_TIMER - BSP_IRQ_VECTOR_BASE ); |
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238 | |
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239 | #if 0 |
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240 | printk( "configured usecs per tick=%d \n", |
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241 | rtems_configuration_get_microseconds_per_tick() ); |
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242 | printk( "Microseconds per ISR =%d\n", pc386_microseconds_per_isr ); |
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243 | printk( "final ISRs per=%d\n", pc386_isrs_per_tick ); |
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244 | printk( "final timer counts=%d\n", pc386_clock_click_count ); |
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245 | #endif |
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246 | |
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247 | outport_byte(TIMER_MODE, TIMER_SEL0|TIMER_16BIT|TIMER_RATEGEN); |
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248 | outport_byte(TIMER_CNTR0, pc386_clock_click_count >> 0 & 0xff); |
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249 | outport_byte(TIMER_CNTR0, pc386_clock_click_count >> 8 & 0xff); |
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250 | |
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251 | /* |
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252 | * Now calibrate cycles per tick. Do this every time we |
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253 | * turn the clock on in case the CPU clock speed has changed. |
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254 | */ |
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255 | if ( x86_has_tsc() ) |
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256 | calibrate_tsc(); |
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257 | } |
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258 | |
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259 | void clockOff(const rtems_irq_connect_data* unused) |
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260 | { |
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261 | /* reset timer mode to standard (BIOS) value */ |
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262 | outport_byte(TIMER_MODE, TIMER_SEL0 | TIMER_16BIT | TIMER_RATEGEN); |
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263 | outport_byte(TIMER_CNTR0, 0); |
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264 | outport_byte(TIMER_CNTR0, 0); |
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265 | } /* Clock_exit */ |
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266 | |
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267 | int clockIsOn(const rtems_irq_connect_data* unused) |
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268 | { |
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269 | return ((i8259s_cache & 0x1) == 0); |
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270 | } |
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271 | |
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272 | /* a bit of a hack since the ISR models do not match */ |
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273 | rtems_isr Clock_isr( |
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274 | rtems_vector_number vector |
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275 | ); |
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276 | |
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277 | bool Clock_isr_enabled = false; |
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278 | void Clock_isr_handler( |
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279 | rtems_irq_hdl_param param |
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280 | ) |
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281 | { |
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282 | if ( Clock_isr_enabled ) |
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283 | Clock_isr( 0 ); |
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284 | } |
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285 | |
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286 | static rtems_irq_connect_data clockIrqData = { |
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287 | BSP_PERIODIC_TIMER, |
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288 | Clock_isr_handler, |
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289 | 0, |
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290 | clockOn, |
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291 | clockOff, |
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292 | clockIsOn |
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293 | }; |
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294 | |
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295 | void Clock_driver_install_handler(void) |
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296 | { |
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297 | if (!BSP_install_rtems_irq_handler (&clockIrqData)) { |
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298 | printk("Unable to install system clock ISR handler\n"); |
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299 | rtems_fatal_error_occurred(1); |
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300 | } |
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301 | } |
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302 | |
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303 | void Clock_driver_support_initialize_hardware(void) |
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304 | { |
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305 | bool use_tsc = false; |
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306 | bool use_8254 = false; |
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307 | |
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308 | #if (CLOCK_DRIVER_USE_TSC == 1) |
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309 | use_tsc = true; |
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310 | #endif |
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311 | |
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312 | #if (CLOCK_DRIVER_USE_8254 == 1) |
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313 | use_8254 = true; |
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314 | #endif |
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315 | |
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316 | if ( !use_tsc && !use_8254 ) { |
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317 | if ( x86_has_tsc() ) use_tsc = true; |
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318 | else use_8254 = true; |
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319 | } |
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320 | |
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321 | if ( use_8254 ) { |
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322 | /* printk( "Use 8254\n" ); */ |
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323 | Clock_driver_support_at_tick = Clock_driver_support_at_tick_empty; |
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324 | Clock_driver_nanoseconds_since_last_tick = |
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325 | bsp_clock_nanoseconds_since_last_tick_i8254; |
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326 | } else { |
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327 | /* printk( "Use TSC\n" ); */ |
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328 | Clock_driver_support_at_tick = Clock_driver_support_at_tick_tsc; |
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329 | Clock_driver_nanoseconds_since_last_tick = |
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330 | bsp_clock_nanoseconds_since_last_tick_tsc; |
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331 | } |
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332 | |
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333 | /* Shell installs nanosecond handler before calling |
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334 | * Clock_driver_support_initialize_hardware() :-( |
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335 | * so we do it again now that we're ready. |
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336 | */ |
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337 | rtems_clock_set_nanoseconds_extension( |
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338 | Clock_driver_nanoseconds_since_last_tick |
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339 | ); |
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340 | |
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341 | Clock_isr_enabled = true; |
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342 | } |
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343 | |
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344 | #define Clock_driver_support_shutdown_hardware() \ |
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345 | do { \ |
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346 | BSP_remove_rtems_irq_handler (&clockIrqData); \ |
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347 | } while (0) |
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348 | |
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349 | #include "../../../shared/clockdrv_shell.h" |
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350 | |
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