[752cd8f] | 1 | /* |
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| 2 | * This file contains directives for the GNU linker which are specific |
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| 3 | * to the Intel 386ex evaluation board. |
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| 4 | * |
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[08311cc3] | 5 | * COPYRIGHT (c) 1989-1999. |
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[752cd8f] | 6 | * On-Line Applications Research Corporation (OAR). |
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| 7 | * |
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[98e4ebf5] | 8 | * The license and distribution terms for this file may be |
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| 9 | * found in the file LICENSE in this distribution or at |
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[03f2154e] | 10 | * http://www.OARcorp.com/rtems/license.html. |
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[752cd8f] | 11 | * |
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[6f9c75c3] | 12 | * $Id$ |
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[04bc5d9] | 13 | * |
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| 14 | * Memory layout: |
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| 15 | * |
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| 16 | * 0x3f80000 -> 0x3ff0000 : text section |
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| 17 | * 0x3ff0000 -> 0x3ff0028 : global descriptor table in ROM |
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| 18 | * 0x3ff0028 -> 0x3fff000 : data section ( copied by start.s to RAM ) |
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| 19 | * 0x3fff000 -> 0x3fffff0 : initial section ( init 386ex, goto protected mode, copy ROM-RAM ) |
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| 20 | * 0x3fffff0 -> 0x4000000 : reset section ( jmp to initial only ) |
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[752cd8f] | 21 | */ |
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| 22 | |
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| 23 | ENTRY(reset) ; |
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| 24 | SECTIONS |
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| 25 | { |
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[33442772] | 26 | |
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| 27 | /**************************************************************************************** |
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| 28 | * data section: |
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| 29 | * |
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| 30 | * This section defines the locations of the data section in ROM as well as in RAM. |
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[04bc5d9] | 31 | * start.s copies the data section to RAM in real mode. This is done PRIOR to the lgdt |
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| 32 | * instruction since the data section contains the Global_descriptor_table and GDTR. |
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[33442772] | 33 | ***********************************************************************************/ |
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| 34 | |
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[04bc5d9] | 35 | _rom_data_start = 0x3ff0000; |
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| 36 | |
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| 37 | _rom_data_segment = 0xF000; |
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| 38 | _rom_data_offset = 0x0; |
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| 39 | |
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| 40 | _ram_data_segment = 0x0000 ; |
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| 41 | _ram_data_offset = 0x0; |
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| 42 | _ram_data_location = _ram_data_segment * 16 + _ram_data_offset; |
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[33442772] | 43 | |
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[ac9253e] | 44 | .init : { _init = .; *(.init) } = 0x9090 |
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| 45 | .fini : { _fini = .; *(.fini) } = 0x9090 |
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[33442772] | 46 | .data : |
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[04bc5d9] | 47 | AT ( _rom_data_start ) |
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[752cd8f] | 48 | { |
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| 49 | _sdata = .; |
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| 50 | *(.data); |
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[04bc5d9] | 51 | _edata = .; |
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[752cd8f] | 52 | } |
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| 53 | _data_start = ADDR(.data) ; |
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[33442772] | 54 | data_start = _data_start ; |
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[752cd8f] | 55 | _data_size = _edata - _sdata ; |
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| 56 | |
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[33442772] | 57 | /************************************************************************************** |
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| 58 | * bss section: |
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| 59 | * |
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| 60 | * The bss section is the last section in RAM. |
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| 61 | *************************************************************************************/ |
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[04bc5d9] | 62 | _edata = ALIGN( 0x10 ); |
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[752cd8f] | 63 | .bss : |
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| 64 | { |
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| 65 | _bss_start = .; |
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| 66 | *(.bss); |
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| 67 | *(COMMON); |
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| 68 | _ebss = ALIGN(0x10); |
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| 69 | end = _ebss; |
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| 70 | _end = end; |
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| 71 | __end = end; |
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| 72 | } |
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[33442772] | 73 | _bss_size = _ebss - _bss_start ; |
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[752cd8f] | 74 | |
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[33442772] | 75 | /************************************************************************************** |
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| 76 | * General variables: |
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| 77 | * |
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| 78 | * The stack_size variable is customizable here. The heap is located directly after |
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| 79 | * The stack in RAM. A routine within bspstart.c uses these variables to ensure that |
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| 80 | * the heap used by RTEMS is as large as the RAM remaining after all workspace configurations |
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| 81 | * are complete. |
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| 82 | *************************************************************************************/ |
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[04bc5d9] | 83 | stack_size = 0x8000 ; |
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[33442772] | 84 | stack_origin = end + stack_size ; |
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| 85 | heap_bottom = stack_origin + 4 ; |
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| 86 | |
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| 87 | /*************************************************************************************** |
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| 88 | * text section: |
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| 89 | * |
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| 90 | * This section is NOT copied into RAM. It is left in ROM, as the flash ROM is quick enough. |
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| 91 | ***************************************************************************************/ |
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[752cd8f] | 92 | .text ( 0x3f80000 ): |
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| 93 | { |
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[33442772] | 94 | CREATE_OBJECT_SYMBOLS |
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| 95 | text_start = . ; |
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[752cd8f] | 96 | _text_start = . ; |
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| 97 | *(.text ) ; |
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[7b0c547a] | 98 | /* |
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| 99 | * Special FreeBSD sysctl sections. |
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| 100 | */ |
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[f86ec42] | 101 | . = ALIGN (16); |
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[7b0c547a] | 102 | __start_set_sysctl_set = .; |
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| 103 | *(set_sysctl_*); |
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| 104 | __stop_set_sysctl_set = ABSOLUTE(.); |
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| 105 | *(set_domain_*); |
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| 106 | *(set_pseudo_*); |
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[f86ec42] | 107 | |
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| 108 | *(.eh_fram) |
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[7b0c547a] | 109 | |
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[f86ec42] | 110 | . = ALIGN (16); |
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| 111 | |
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| 112 | /* |
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| 113 | * C++ constructors |
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| 114 | */ |
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| 115 | __CTOR_LIST__ = .; |
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| 116 | LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) |
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| 117 | *(.ctors) |
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| 118 | LONG(0) |
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| 119 | __CTOR_END__ = .; |
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[33442772] | 120 | . = ALIGN (4) ; |
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[f86ec42] | 121 | __DTOR_LIST__ = .; |
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| 122 | LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) |
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| 123 | *(.dtors) |
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| 124 | LONG(0) |
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| 125 | __DTOR_END__ = .; |
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[caacc739] | 126 | _rodata_start = . ; |
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[85c92574] | 127 | *(.rodata*) |
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[db538d8] | 128 | *(.gnu.linkonce.r*) |
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| 129 | _erodata = ALIGN( 0x10 ) ; |
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[33442772] | 130 | _etext = ALIGN( 0x10 ); |
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| 131 | _endtext = . ; |
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[752cd8f] | 132 | } |
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| 133 | |
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[33442772] | 134 | /******************************************************************************************* |
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| 135 | * initial section: |
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| 136 | * |
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| 137 | * This section is defined after the data section. It must be in the top 64K of memory |
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| 138 | * to enable the initial short jmp from the reset section while still in real-mode. It |
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[04bc5d9] | 139 | * initializes the i386ex, moves the gdt from ROM to RAM,loads the gdt, |
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| 140 | * jumps to protected mode, copies the data section from ROM to RAM and loads the idt. |
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[33442772] | 141 | ******************************************************************************************/ |
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| 142 | |
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| 143 | .initial _rom_data_start + _data_size : |
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[752cd8f] | 144 | { |
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| 145 | *(.initial); |
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| 146 | } |
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| 147 | |
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[33442772] | 148 | /******************************************************************************************* |
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[04bc5d9] | 149 | * board reset section: |
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[33442772] | 150 | * |
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| 151 | * This section contains the short jmp from the reset section to the initial section. It is |
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| 152 | * the first code executed on reset/power on. |
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| 153 | ******************************************************************************************/ |
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| 154 | |
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[04bc5d9] | 155 | .reset 0x3fffff0: |
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[752cd8f] | 156 | { |
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| 157 | *(.reset); |
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| 158 | } |
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[4cb5d29] | 159 | |
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| 160 | |
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| 161 | /* Stabs debugging sections. */ |
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| 162 | .stab 0 : { *(.stab) } |
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| 163 | .stabstr 0 : { *(.stabstr) } |
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| 164 | .stab.excl 0 : { *(.stab.excl) } |
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| 165 | .stab.exclstr 0 : { *(.stab.exclstr) } |
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| 166 | .stab.index 0 : { *(.stab.index) } |
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| 167 | .stab.indexstr 0 : { *(.stab.indexstr) } |
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| 168 | .comment 0 : { *(.comment) } |
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| 169 | |
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| 170 | /* DWARF debug sections. |
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| 171 | Symbols in the DWARF debugging sections are relative to the beginning |
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| 172 | of the section so we begin them at 0. */ |
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| 173 | /* DWARF 1 */ |
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| 174 | .debug 0 : { *(.debug) } |
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| 175 | .line 0 : { *(.line) } |
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| 176 | |
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| 177 | /* GNU DWARF 1 extensions */ |
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| 178 | .debug_srcinfo 0 : { *(.debug_srcinfo) } |
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| 179 | .debug_sfnames 0 : { *(.debug_sfnames) } |
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| 180 | |
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| 181 | /* DWARF 1.1 and DWARF 2 */ |
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| 182 | .debug_aranges 0 : { *(.debug_aranges) } |
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| 183 | .debug_pubnames 0 : { *(.debug_pubnames) } |
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| 184 | |
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| 185 | /* DWARF 2 */ |
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| 186 | .debug_info 0 : { *(.debug_info) } |
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| 187 | .debug_abbrev 0 : { *(.debug_abbrev) } |
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| 188 | .debug_line 0 : { *(.debug_line) } |
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| 189 | .debug_frame 0 : { *(.debug_frame) } |
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| 190 | .debug_str 0 : { *(.debug_str) } |
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| 191 | .debug_loc 0 : { *(.debug_loc) } |
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| 192 | .debug_macinfo 0 : { *(.debug_macinfo) } |
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| 193 | |
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| 194 | /* SGI/MIPS DWARF 2 extensions */ |
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| 195 | .debug_weaknames 0 : { *(.debug_weaknames) } |
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| 196 | .debug_funcnames 0 : { *(.debug_funcnames) } |
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| 197 | .debug_typenames 0 : { *(.debug_typenames) } |
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| 198 | .debug_varnames 0 : { *(.debug_varnames) } |
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| 199 | /* These must appear regardless of . */ |
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[04bc5d9] | 200 | } |
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