source: rtems/c/src/lib/libbsp/i386/i386ex/network/uti596.h @ 20ad9e9d

4.104.114.84.95
Last change on this file since 20ad9e9d was 20ad9e9d, checked in by Joel Sherrill <joel.sherrill@…>, on 11/23/98 at 14:28:09

New network driver from Erik Ivanenko <erik.ivanenko@…>.
  • Property mode set to 100644
File size: 6.5 KB
RevLine 
[20ad9e9d]1
2/* uti596.h: Contains the defines and structures used by the uti596 driver */
3
4/*
5 * EII: March 11: Created v. 0.0
6 *      Jan 12/98 Added STAT bits, s11-=s5 and max_colls.
7 */
8
9#ifndef UTI596_H
10#define UTI596_H
11#include <rtems/error.h>
12#include <rtems/rtems_bsdnet.h>
13
14#include <sys/param.h>
15#include <sys/mbuf.h>
16#include <sys/socket.h>
17#include <sys/sockio.h>
18
19#include <net/if.h>
20
21#include <netinet/in.h>
22#include <netinet/if_ether.h>
23
24/* Ethernet statistics */
25
26struct enet_statistics{
27  int   rx_packets;                     /* total packets received       */
28  int   tx_packets;                     /* total packets transmitted    */
29  int   rx_errors;                      /* bad packets received         */
30  int   tx_errors;                      /* packet transmit problems     */
31  int   rx_dropped;                     /* no space in buffers          */
32  int   tx_dropped;                     /*                              */
33  int   tx_retries_exceeded;              /* excessive retries            */
34  int   multicast;                      /* multicast packets received   */
35  int   collisions;
36
37  /* detailed rx_errors: */
38  int   rx_length_errors;
39  int   rx_over_errors;                 /* receiver ring buff overflow  */
40  int   rx_crc_errors;                  /* recved pkt with crc error    */
41  int   rx_frame_errors;                /* recv'd frame alignment error */
42  int   rx_fifo_errors;                 /* recv'r fifo overrun          */
43  int   rx_missed_errors;               /* receiver missed packet       */
44
45  /* detailed tx_errors */
46  int   tx_aborted_errors;
47  int   tx_carrier_errors;
48  int   tx_fifo_errors;
49  int   tx_heartbeat_errors;
50  int   tx_window_errors;
51};
52
53
54
55enum commands {
56  CmdNOp           = 0,
57  CmdSASetup       = 1,
58  CmdConfigure     = 2,
59  CmdMulticastList = 3,
60  CmdTx            = 4,
61  CmdTDR           = 5,
62  CmdDump          = 6,
63  CmdDiagnose      = 7
64};
65
66
67#define UTI596_MUTEX   1
68
69
70#define CMD_EOL         0x8000  /* The last command of the list, stop. */
71#define CMD_SUSP        0x4000  /* Suspend after doing cmd. */
72#define CMD_INTR        0x2000  /* Interrupt after doing cmd. */
73
74#define CMD_FLEX        0x0008  /* Enable flexible memory model */
75
76#define SCB_STAT_CX     0x8000  /* Cmd completes with 'I' bit set */
77#define SCB_STAT_FR     0x4000  /* Frame Received                 */
78#define SCB_STAT_CNA    0x2000  /* Cmd unit Not Active            */
79#define SCB_STAT_RNR    0x1000  /* Receiver Not Ready             */
80
81#define STAT_C          0x8000  /* Set to 1 after execution              */
82#define STAT_B          0x4000  /* 1 : Cmd being executed, 0 : Cmd done. */
83#define STAT_OK         0x2000  /* 1: Command executed ok 0 : Error      */
84#define STAT_A          0x1000  /* command has been aborted              */
85
86#define STAT_S11        0x0800
87#define STAT_S10        0x0400
88#define STAT_S9         0x0200
89#define STAT_S8         0x0100
90#define STAT_S7         0x0080
91#define STAT_S6         0x0040
92#define STAT_S5         0x0020
93#define STAT_MAX_COLLS  0x000F
94
95
96#define RBD_STAT_P      0x4000  /* prefetch */
97#define RBD_STAT_F      0x4000  /* used */
98
99#define  CUC_START      0x0100
100#define  CUC_RESUME     0x0200
101#define  CUC_SUSPEND    0x0300
102#define  CUC_ABORT      0x0400
103#define  RX_START       0x0010
104#define  RX_RESUME      0x0020
105#define  RX_SUSPEND     0x0030
106#define  RX_ABORT       0x0040
107
108#define  RU_SUSPENDED    0x001
109#define  RU_NO_RESOURCES 0x0020
110#define  RU_READY        0x0040
111
112       
113
114#define IO_ADDR         0x360
115#define PORT_ADDR       IO_ADDR
116#define CHAN_ATTN       PORT_ADDR + 4
117#define NIC_ADDR        PORT_ADDR + 8
118
119struct i596_cmd {
120    volatile unsigned short status;
121    volatile unsigned short command;
122    struct i596_cmd *next;
123};
124
125#define I596_NULL ( ( void * ) 0xffffffff)
126#define UTI_596_END_OF_FRAME            0x8000
127#define SIZE_MASK       0x3fff
128
129/*
130 * Transmit buffer Descriptor
131 */
132
133struct i596_tbd {
134    unsigned short size;
135    unsigned short pad;
136    struct i596_tbd *next;
137    char *data;
138};
139
140/*
141 * Receive buffer Descriptor
142 */
143
144struct i596_rbd {
145    unsigned short count;
146    unsigned short offset;
147    struct i596_rbd *next;
148    char           *data;
149    unsigned short size;
150    unsigned short pad;
151};
152
153/*
154 * Transmit Command Structure
155 */
156struct tx_cmd {
157    struct i596_cmd cmd;
158    struct i596_tbd *pTbd;
159    unsigned short size;
160    unsigned short pad;
161} ;
162
163
164/*
165 * Receive Frame Descriptor
166 */
167struct i596_rfd {
168    volatile unsigned short stat;
169    volatile unsigned short cmd;
170    struct i596_rfd *next;
171    struct i596_rbd *pRbd;
172    unsigned short count;
173    unsigned short size;
174    char data [1532 ];   
175} ;
176
177
178struct i596_dump {
179  struct i596_cmd cmd;
180  char * pData;
181};
182
183struct i596_set_add {
184  struct i596_cmd cmd;
185  char   data[8];
186};
187
188struct i596_configure {
189  struct i596_cmd cmd;
190  char   data[16];
191};
192
193
194
195#define RX_RING_SIZE 8
196
197/*
198 * System Control Block
199 */
200struct i596_scb {
201    volatile unsigned short status;
202    volatile unsigned short command;
203    struct i596_cmd *pCmd;
204    struct i596_rfd *pRfd;
205    volatile unsigned long crc_err;
206    volatile unsigned long align_err;
207    volatile unsigned long resource_err;
208    volatile unsigned long over_err;
209    volatile unsigned long rcvdt_err;
210    volatile unsigned long short_err;
211    volatile unsigned short t_on;
212    volatile unsigned short t_off;
213};
214
215
216/*
217 * Intermediate System Control Block
218 */
219struct i596_iscp {
220    volatile unsigned long stat;
221    struct i596_scb *scb;
222} ;
223/*
224 * System Control Parameters
225 */
226struct i596_scp {
227    unsigned long sysbus;
228    unsigned long pad;
229    struct i596_iscp *iscp;
230} ;
231
232struct uti596_softc {
233  struct arpcom                 arpcom;
234  rtems_irq_connect_data        irqInfo;
235  struct i596_scp              *pScp;
236  struct i596_iscp              iscp;
237  struct i596_scb               scb;
238  struct i596_set_add           set_add;
239  struct i596_configure         set_conf;
240  struct i596_cmd               tdr;
241  unsigned long                 stat;
242  struct tx_cmd                *pTxCmd;
243  struct i596_tbd              *pTbd;
244
245  int                   ioAddr;
246
247  struct i596_rfd     *pBeginRFA;
248  struct i596_rfd     *pEndRFA;
249  struct i596_rfd     *pLastUnkRFD;
250  struct i596_rbd     *pLastUnkRBD;
251  struct i596_rfd     *pEndSavedQueue;
252  struct i596_cmd     *pCmdHead;
253  struct i596_cmd     *pCmdTail;  /* unneeded, as chaining not used, but implemented */
254
255  rtems_id              rxDaemonTid;
256  rtems_id              txDaemonTid;
257
258  struct enet_statistics stats;
259  int                  started;
260  unsigned long        rxInterrupts;
261  unsigned long        txInterrupts;
262  volatile int         cmdOk;
263  int                  resetDone;
264  unsigned long        txRawWait;
265  struct i596_rfd     *pInboundFrameQueue;
266  short int            rxBdCount;
267  short int            txBdCount;
268  short int            countRFD;
269  short int            savedCount;
270  struct i596_rfd     *pSavedRfdQueue;
271  rtems_name           semaphore_name;
272  rtems_id             semaphore_id;
273  char                 zeroes[64];
274  unsigned long        rawsndcnt;
275} ;
276#endif
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