source: rtems/c/src/lib/libbsp/i386/force386/include/bsp.h @ d637822

4.104.114.84.95
Last change on this file since d637822 was 98e4ebf, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 8, 1997 at 3:45:54 PM

Fixed typo in the pointer to the license terms.

  • Property mode set to 100644
File size: 4.4 KB
Line 
1/*  bsp.h
2 *
3 *  This include file definitions related to the Force CPU-386 board.
4 *
5 *  COPYRIGHT (c) 1989-1997.
6 *  On-Line Applications Research Corporation (OAR).
7 *  Copyright assigned to U.S. Government, 1994.
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.OARcorp.com/rtems/license.html.
12 *
13 *  $Id$
14 */
15
16#ifndef __FORCE386_h
17#define __FORCE386_h
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#include <rtems.h>
24#include <iosupp.h>
25#include <console.h>
26#include <clockdrv.h>
27
28/*
29 *  Define the time limits for RTEMS Test Suite test durations.
30 *  Long test and short test duration limits are provided.  These
31 *  values are in seconds and need to be converted to ticks for the
32 *  application.
33 *
34 */
35
36#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
37#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
38
39/*
40 *  Define the interrupt mechanism for Time Test 27
41 *
42 *  NOTE: Use a software interrupt for the i386.
43 */
44
45#define MUST_WAIT_FOR_INTERRUPT 0
46
47#define Install_tm27_vector( handler ) set_vector( (handler), 0x90, 1 )
48
49#define Cause_tm27_intr()              asm volatile( "int $0x90" : : );
50
51#define Clear_tm27_intr()
52
53#define Lower_tm27_intr()
54
55/*
56 *  Simple spin delay in microsecond units for device drivers.
57 *  This is very dependent on the clock speed of the target.
58 */
59
60#define delay( _microseconds ) \
61  { \
62    rtems_unsigned32 _counter; \
63    \
64    _counter = (_microseconds); \
65    \
66    asm volatile ( "0: nop;" \
67                   " mov %0,%0 ;" \
68                   " loop 0b" : "=c" (_counter) \
69                              : "0"  (_counter) \
70                 ); \
71    \
72  }
73
74/* Constants */
75
76#define RAM_START 0
77#define RAM_END   0x100000
78
79/* I/O addressing */
80
81/*
82 *  The following determines whether Port B or the Console should
83 *  be used for test I/O.  Setting ONE (and only ONE) of these to 1
84 *  enables I/O on that port.
85 *
86 *  PORT A - DUSCC MC68562 Channel A
87 *  PORT B - DUSCC MC68562 Channel B
88 *  PORT C - MFP MC68901 Channel      (*** FORCEbug console ***)
89 */
90
91#define PORTB         1               /* use port b as test port */
92#define PORTC         0               /* use console port as test port */
93
94#if ( PORTB == 1 )
95#define TX_STATUS     0x1b6           /* DUSCC General Status Register */
96#define RX_STATUS     0x1b6           /* DUSCC General Status Register */
97#define TX_BUFFER     0x1e0           /* DUSCC Transmitter Channel B */
98#define RX_BUFFER     0x1e8           /* DUSCC Receiver Channel B */
99#define Is_tx_ready( _status ) ( (_status) & 0x20 )
100#define Is_rx_ready( _status ) ( (_status) & 0x10 )
101#endif
102
103#if ( PORTC == 1 )
104#define TX_STATUS     0x12c           /* MFP Transmit Status Register */
105#define RX_STATUS     0x12a           /* MFP Receive Status Register */
106#define TX_BUFFER     0x12e           /* MFP Transmitter Channel  */
107#define RX_BUFFER     0x12e           /* MFP Receiver Channel  */
108#define Is_tx_ready( _status ) ( (_status) & 0x80 )
109#define Is_rx_ready( _status ) ( (_status) & 0x80 )
110#endif
111
112/* Timer constants */
113
114#define IERA   0x106     /* Interrupt Enable Register A */
115#define IMRA   0x112     /* Interrupt Mask Register A */
116#define TACR   0x118     /* Timer A Control Register */
117#define TADR   0x11e     /* Timer A Data Register */
118
119#define IERB   0x108     /* Interrupt Enable Register B */
120#define TBCR   0x11a     /* Timer B Control Register */
121#define TBDR   0x120     /* Timer B Data Register */
122
123/* Structures */
124
125#ifdef F386_INIT
126#undef BSP_EXTERN
127#define BSP_EXTERN
128#else
129#undef BSP_EXTERN
130#define BSP_EXTERN extern
131#endif
132
133/*
134 *  Device Driver Table Entries
135 */
136
137/*
138 * NOTE: Use the standard Console driver entry
139 */
140 
141/*
142 * NOTE: Use the standard Clock driver entry
143 */
144
145/*
146 * How many libio files we want
147 */
148
149#define BSP_LIBIO_MAX_FDS       20
150
151/* miscellaneous stuff assumed to exist */
152
153extern rtems_configuration_table BSP_Configuration;
154
155extern i386_IDT_slot Interrupt_descriptor_table[ 256 ];
156extern i386_GDT_slot Global_descriptor_table[ 8192 ];
157
158BSP_EXTERN unsigned short Idt[3];  /* Interrupt Descriptor Table Address */
159BSP_EXTERN unsigned short Gdt[3];  /* Global Descriptor Table Address */
160BSP_EXTERN unsigned int   Idt_base;
161BSP_EXTERN unsigned int   Gdt_base;
162
163/* routines */
164
165i386_isr_entry set_vector(
166  rtems_isr_entry     handler,
167  rtems_vector_number vector,
168  int                 type
169);
170
171#ifdef __cplusplus
172}
173#endif
174
175#endif
176/* end of include file */
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