source: rtems/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/lock.c @ d637822

4.104.114.84.95
Last change on this file since d637822 was 98e4ebf5, checked in by Joel Sherrill <joel.sherrill@…>, on 10/08/97 at 15:45:54

Fixed typo in the pointer to the license terms.

  • Property mode set to 100644
File size: 1.6 KB
Line 
1/*  Shared Memory Lock Routines
2 *
3 *  This shared memory locked queue support routine need to be
4 *  able to lock the specified locked queue.  Interrupts are
5 *  disabled while the queue is locked to prevent preemption
6 *  and deadlock when two tasks poll for the same lock.
7 *  previous level.
8 *
9 *  COPYRIGHT (c) 1989-1997.
10 *  On-Line Applications Research Corporation (OAR).
11 *  Copyright assigned to U.S. Government, 1994.
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.OARcorp.com/rtems/license.html.
16 *
17 *  $Id$
18 */
19
20#include <bsp.h>
21#include <shm.h>
22
23/*
24 *  Shm_Initialize_lock
25 *
26 *  Initialize the lock for the specified locked queue.
27 */
28
29void Shm_Initialize_lock(
30  Shm_Locked_queue_Control *lq_cb
31)
32{
33  lq_cb->lock = LQ_UNLOCKED;
34}
35
36/*  Shm_Lock( &lq_cb )
37 *
38 *  This shared memory locked queue support routine locks the
39 *  specified locked queue.  It disables interrupts to prevent
40 *  a deadlock condition.
41 */
42
43void Shm_Lock(
44  Shm_Locked_queue_Control *lq_cb
45)
46{
47  rtems_unsigned32  isr_level;
48  vol_u32          *lockptr = &lq_cb->lock;
49  rtems_unsigned32  lock_value;
50
51  rtems_interrupt_disable( isr_level );
52
53    Shm_isrstat = isr_level;
54
55    do {
56      HPPA_ASM_LDCWS( 0, 0, lockptr, lock_value );
57    } while (lock_value == SHM_LOCK_VALUE);
58}
59
60/*
61 *  Shm_Unlock
62 *
63 *  Unlock the lock for the specified locked queue.
64 */
65
66void Shm_Unlock(
67  Shm_Locked_queue_Control *lq_cb
68)
69{
70  rtems_unsigned32 isr_level;
71
72  lq_cb->lock = SHM_UNLOCK_VALUE;
73  isr_level = Shm_isrstat;
74  rtems_interrupt_enable( isr_level );
75}
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