source: rtems/c/src/lib/libbsp/epiphany/epiphany_sim/start/start.S @ 6f71dcb7

4.115
Last change on this file since 6f71dcb7 was 6f71dcb7, checked in by Hesham ALMatary <heshamelmatary@…>, on 05/21/15 at 16:53:53

Epiphany: Add the first epiphany_sim BSP v4

This BSP in intended to run on the simulator that should be built
from RSB. When building RTEMS for Epiphany --disable-networking must
be provided part of the configure command.

  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*
2 * Copyright (c) 2015 University of York.
3 * Hesham ALMatary <hmka501@york.ac.uk>
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26#include <bsp/linker-symbols.h>
27#include <rtems/asm.h>
28
29EXTERN(bsp_section_bss_begin)
30EXTERN(bsp_section_bss_end)
31EXTERN(ISR_Handler)
32EXTERN(bsp_start_vector_table_end)
33EXTERN(bsp_start_vector_table_size)
34EXTERN(bsp_vector_table_size)
35EXTERN(bsp_section_stack_begin)
36
37PUBLIC(EPIPHANY_Exception_default)
38PUBLIC(bsp_start_vector_table_begin)
39PUBLIC(start)
40
41.section .vector, "wax"
42TYPE_FUNC(start)
43SYM(start):
44  .balign 4 ;
45    b .normal_start
46
47  .balign 4 ; 0x4
48    b .sw_exception
49
50  .balign 4 ; 0x8
51    b .normal_start
52
53  .balign 4 ; 0xc
54    b .clock_isr
55
56  .balign 4 ; 0x10
57    b .timer1_isr
58
59  .balign 4 ; 0x14
60    b _EPIPHANY_Exception_default
61
62  .balign 4 ; 0x18
63    b _EPIPHANY_Exception_default
64
65  .balign 4 ; 0x1c
66    b _EPIPHANY_Exception_default
67
68  .balign 4 ; 0x20
69    b _EPIPHANY_Exception_default
70
71  .balign 4 ; 0x24
72    b _EPIPHANY_Exception_default
73
74_bsp_start_vector_table_begin:
75  .word .normal_start /* Reset */
76  .word _EPIPHANY_Exception_default /* SW exception */
77  .word _EPIPHANY_Exception_default /* Data Page Fault */
78  .word _EPIPHANY_Exception_default /* Timer 0 */
79  .word _EPIPHANY_Exception_default /* Timer 1 */
80  .word _EPIPHANY_Exception_default /* Message int */
81  .word _EPIPHANY_Exception_default /* DMA0 int */
82  .word _EPIPHANY_Exception_default /* DMA1 int */
83  .word _EPIPHANY_Exception_default /* WAND */
84  .word _EPIPHANY_Exception_default /* User interrupt */
85
86_bsp_start_vector_table_end:
87
88.size  _start, .-_start
89
90.section .start,"ax"
91.align  4
92.type   _external_start, %function
93.normal_start:
94  /* Initialize the stack and frame pointers */
95  mov  sp, %low(bsp_section_stack_begin)
96  movt sp, %high(bsp_section_stack_begin)
97  mov  fp, sp
98
99cpu0:
100  /* Zero .bss section */
101  mov  r0, %low(bsp_section_bss_begin)
102  movt r0, %high(bsp_section_bss_begin)
103  mov  r1, sp
104  mov  r2,#0
105  mov  r3,#0
106
107_bss_clear_loop:
108  strd  r2, [r0], +#1
109  sub   r5, r1, r0
110  bne   _bss_clear_loop
111
112  /* Clear the reset interrupt flag */
113  mov   r0, %low(_jump_to_c)
114  movt  r0, %high(_jump_to_c)
115  movts iret, r0
116  rti
117
118_jump_to_c:
119  /* Jump to bootcard */
120  mov  r3, %low(_boot_card)
121  movt r3, %high(_boot_card)
122  jalr r3
123
124 /* Should never reach here */
125 idle
126
127.size  .normal_start, .-.normal_start
128
129.balign 4
130.type   .sw_exception, %function
131.sw_exception:
132  idle
133
134.balign 4
135.type   .clock_isr, %function
136.clock_isr:
137  /*
138   * r62 and r63 are saved here, and restored from _ISR_Handler, they
139   * and hold vector number and _ISR_Handler address repsectively.
140   */
141  add  sp, sp, #-8
142  str  r62, [sp, #0]
143  str  r63, [sp, #4]
144  mov  r62, 3
145  mov  r63, %low(_ISR_Handler)
146  movt r63, %high(_ISR_Handler)
147  jr   r6
148
149.balign 4
150.type   .timer1_isr, %function
151.timer1_isr:
152  /*
153   * r62 and r63 are saved here, and restored from _ISR_Handler, they
154   * and hold vector number and _ISR_Handler address repsectively.
155   */
156  add  sp, sp, #-8
157  str  r62, [sp, 0]
158  str  r63, [sp, 4]
159  mov  r62, 4
160  mov  r63, %low(_ISR_Handler)
161  movt r63, %high(_ISR_Handler)
162  jr   r63
163
164.balign 4
165TYPE_FUNC(EPIPHANY_Exception_default)
166SYM(EPIPHANY_Exception_default):
167  idle
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