source: rtems/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c @ c8b1ab9

4.104.114.9
Last change on this file since c8b1ab9 was c8b1ab9, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 18, 2008 at 9:51:35 PM

2008-08-18 Allan Hessenflow <allanh@…>

  • Makefile.am, console/console-io.c, startup/bspstart.c: Update to use shared libcpu version of code implemented as part of bf537Stamp effort.
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*  bspstart.c for eZKit533
2 *
3 *  This routine starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 * 
8 *  Copyright (c) 2006 by Atos Automacao Industrial Ltda.
9 *             written by Alain Schaefer <alain.schaefer@easc.ch>
10 *                    and Antonio Giovanini <antonio@atos.com.br>
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 */
18
19
20#include <string.h>
21
22#include <bsp.h>
23#include <cplb.h>
24#include <rtems/libio.h>
25#include <rtems/libcsupport.h>
26#include <libcpu/interrupt.h>
27
28const unsigned int dcplbs_table[16][2] = { 
29        { 0xFFA00000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },
30        { 0xFF900000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data B */
31        { 0xFF800000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data A */
32        { 0xFFB00000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },
33
34        { 0x20300000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 3 */
35        { 0x20200000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 2 (Secnd)  */
36        { 0x20100000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 1 (Prim B) */
37        { 0x20000000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 0 (Prim A) */
38
39        { 0x02400000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
40        { 0x02000000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
41        { 0x00C00000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
42        { 0x00800000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
43        { 0x00400000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
44        { 0x00000000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
45
46        { 0xffffffff, 0xffffffff }                                                      /* end of section - termination */
47
48       }
49;
50
51
52const unsigned int _icplbs_table[16][2] = { 
53        { 0xFFA00000,   (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT | CPLB_I_PAGE_MGMT | 0x4) },  /* L1 Code */
54        { 0xEF000000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* AREA DE BOOT */
55        { 0xFFB00000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },     
56
57        { 0x20300000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 3 */
58        { 0x20200000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 2 (Secnd) */
59        { 0x20100000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 1 (Prim B) */
60        { 0x20000000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 0 (Prim A) */
61
62        { 0x02400000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
63        { 0x02000000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
64        { 0x00C00000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
65        { 0x00800000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
66        { 0x00400000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
67        { 0x00000000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
68
69        { 0xffffffff, 0xffffffff }                                                      /* end of section - termination */
70
71       }
72;
73
74/*
75 *  Use the shared implementations of the following routines
76 */
77
78void bsp_libc_init( void *, uint32_t, int );
79void Init_PLL (void);
80void Init_EBIU (void);
81void Init_Flags(void);
82void Init_RTC (void);
83
84void null_isr(void);
85
86/*
87 *  Function:   bsp_pretasking_hook
88 *  Created:    95/03/10
89 *
90 *  Description:
91 *      BSP pretasking hook.  Called just before drivers are initialized.
92 *      Used to setup libc and install any BSP extensions.
93 *
94 *  NOTES:
95 *      Must not use libc (to do io) from here, since drivers are
96 *      not yet initialized.
97 *
98 */
99
100void bsp_pretasking_hook(void)
101{
102    extern int HeapBase;
103    extern int HeapSize;
104    void         *heapStart = &HeapBase;
105    unsigned long heapSize = (unsigned long)&HeapSize;
106
107    bfin_interrupt_init();
108
109    bsp_libc_init(heapStart, heapSize, 0);
110}
111
112/*
113 *  bsp_start
114 *
115 *  This routine does the bulk of the system initialization.
116 */
117
118void bsp_start( void )
119{
120   
121  extern void          * _WorkspaceBase;
122
123  /* BSP Hardware Initialization*/
124  Init_RTC();   /* Blackfin Real Time Clock initialization */ 
125  Init_PLL();   /* PLL initialization */
126  Init_EBIU();  /* EBIU initialization */
127  Init_Flags(); /* GPIO initialization */
128
129  /*
130   *  Allocate the memory for the RTEMS Work Space.  This can come from
131   *  a variety of places: hard coded address, malloc'ed from outside
132   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
133   *  typically done by stock BSPs) by subtracting the required amount
134   *  of work space from the last physical address on the CPU board.
135   */
136
137  /*
138   *  Need to "allocate" the memory for the RTEMS Workspace and
139   *  tell the RTEMS configuration where it is.  This memory is
140   *  not malloc'ed.  It is just "pulled from the air".
141   */
142
143  Configuration.work_space_start = (void *) &_WorkspaceBase;
144
145  int i=0;
146  for (i=5;i<16;i++) {
147    set_vector((rtems_isr_entry)null_isr, i, 1);
148  }
149 
150}
151
152 /*
153  * Init_PLL
154  *
155  * Routine to initialize the PLL. The Ezkit uses a 27 Mhz XTAL.
156  * See "../eZKit533/include/bsp.h" for more information.
157  */
158
159void Init_PLL (void)
160{
161 
162  unsigned int n;
163 
164  /* Configure PLL registers */
165  *((uint16_t*)PLL_LOCKCNT) = 0x1000;
166  *((uint16_t*)PLL_DIV) = PLL_CSEL|PLL_SSEL;
167  *((uint16_t*)PLL_CTL) = PLL_MSEL|PLL_DF;
168
169  /* Commands to set PLL values */
170  asm("cli r0;");
171  asm("idle;");
172  asm("sti r0;");
173 
174  /* Delay for PLL stabilization */
175  for (n=0; n<200; n++) {} 
176 
177}
178
179 /*
180  * Init_EBIU
181  *
182  * Configure extern memory
183  */
184
185void Init_EBIU (void)
186{
187  /* Configure FLASH */
188  *((uint32_t*)EBIU_AMBCTL0)  = 0x7bb07bb0L;
189  *((uint32_t*)EBIU_AMBCTL1)  = 0x7bb07bb0L;
190  *((uint16_t*)EBIU_AMGCTL)   = 0x000f;
191 
192  /* Configure SDRAM
193  *((uint32_t*)EBIU_SDGCTL) = 0x0091998d;
194  *((uint16_t*)EBIU_SDBCTL) = 0x0013;
195  *((uint16_t*)EBIU_SDRRC)  = 0x0817;
196  */
197}
198
199 /*
200  * Init_Flags
201  *
202  * Enable LEDs port
203  */
204void Init_Flags(void)
205{
206  *((uint16_t*)FIO_INEN)    = 0x0100;
207  *((uint16_t*)FIO_DIR)     = 0x0000;
208  *((uint16_t*)FIO_EDGE)    = 0x0100;
209  *((uint16_t*)FIO_MASKA_D) = 0x0100;
210 
211  *((uint8_t*)FlashA_PortB_Dir)  = 0x3f;
212  *((uint8_t*)FlashA_PortB_Data) = 0x00;   
213}
214
215/*
216 * Helper Function to use the EzKits LEDS.
217 * Can be used by the Application.
218 */
219void setLED (uint8_t value)
220{
221  *((uint8_t*)FlashA_PortB_Data) = value;   
222}
223
224/*
225 * Helper Function to use the EzKits LEDS
226 */
227uint8_t getLED (void)
228{
229  return *((uint8_t*)FlashA_PortB_Data);
230}
231
232void initCPLB() {
233
234       int i = 0;
235       unsigned int *addr;
236       unsigned int *data;
237       
238       addr = (unsigned int *)0xffe00100;
239       data = (unsigned int *)0xffe00200;
240
241       while ( dcplbs_table[i][0] != 0xffffffff ) {
242               *addr = dcplbs_table[i][0];
243               *data = dcplbs_table[i][1];
244
245               addr++;
246               data++;
247       } 
248}
Note: See TracBrowser for help on using the repository browser.