source: rtems/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c @ 3495c57

4.104.115
Last change on this file since 3495c57 was 3495c57, checked in by Ralf Corsepius <ralf.corsepius@…>, on 11/30/09 at 03:49:08

Whitespace removal.

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File size: 5.3 KB
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1/*  bspstart.c for eZKit533
2 *
3 *  This routine starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  Copyright (c) 2006 by Atos Automacao Industrial Ltda.
9 *             written by Alain Schaefer <alain.schaefer@easc.ch>
10 *                    and Antonio Giovanini <antonio@atos.com.br>
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 */
18
19
20#include <bsp.h>
21#include <cplb.h>
22#include <libcpu/interrupt.h>
23
24const unsigned int dcplbs_table[16][2] = {
25  { 0xFFA00000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) },
26  { 0xFF900000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data B */
27  { 0xFF800000,   (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data A */
28  { 0xFFB00000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },
29  { 0x20300000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 3 */
30  { 0x20200000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 2 (Secnd)  */
31  { 0x20100000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 1 (Prim B) */
32  { 0x20000000,   (PAGE_SIZE_1MB | CPLB_DNOCACHE) },      /* Async Memory Bank 0 (Prim A) */
33
34  { 0x02400000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
35  { 0x02000000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
36  { 0x00C00000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
37  { 0x00800000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
38  { 0x00400000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
39  { 0x00000000,   (PAGE_SIZE_4MB | CPLB_DNOCACHE) },
40  { 0xffffffff, 0xffffffff }                 /* end of section - termination */
41
42};
43
44
45const unsigned int _icplbs_table[16][2] = {
46  { 0xFFA00000,   (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT | CPLB_I_PAGE_MGMT | 0x4) },  /* L1 Code */
47  { 0xEF000000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* AREA DE BOOT */
48  { 0xFFB00000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },
49  { 0x20300000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 3 */
50  { 0x20200000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 2 (Secnd) */
51  { 0x20100000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 1 (Prim B) */
52  { 0x20000000,   (PAGE_SIZE_1MB | CPLB_INOCACHE) },      /* Async Memory Bank 0 (Prim A) */
53
54  { 0x02400000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
55  { 0x02000000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
56  { 0x00C00000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
57  { 0x00800000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
58  { 0x00400000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
59  { 0x00000000,   (PAGE_SIZE_4MB | CPLB_INOCACHE) },
60  { 0xffffffff, 0xffffffff }               /* end of section - termination */
61
62};
63
64/*
65 *  Use the shared implementations of the following routines
66 */
67
68void Init_PLL (void);
69void Init_EBIU (void);
70void Init_Flags(void);
71void Init_RTC (void);
72
73void null_isr(void);
74
75/*
76 *      BSP pretasking hook.  Called just before drivers are initialized.
77 *      Used to setup libc and install any BSP extensions.
78 */
79
80void bsp_pretasking_hook(void)
81{
82  bfin_interrupt_init();
83}
84
85/*
86 *  bsp_start
87 *
88 *  This routine does the bulk of the system initialization.
89 */
90
91void bsp_start( void )
92{
93  /* BSP Hardware Initialization*/
94  Init_RTC();   /* Blackfin Real Time Clock initialization */
95  Init_PLL();   /* PLL initialization */
96  Init_EBIU();  /* EBIU initialization */
97  Init_Flags(); /* GPIO initialization */
98
99  int i=0;
100  for (i=5;i<16;i++) {
101    set_vector((rtems_isr_entry)null_isr, i, 1);
102  }
103}
104
105/*
106 * Init_PLL
107 *
108 * Routine to initialize the PLL. The Ezkit uses a 27 Mhz XTAL.
109 * See "../eZKit533/include/bsp.h" for more information.
110 */
111void Init_PLL (void)
112{
113  unsigned int n;
114
115  /* Configure PLL registers */
116  *((uint16_t*)PLL_LOCKCNT) = 0x1000;
117  *((uint16_t*)PLL_DIV) = PLL_CSEL|PLL_SSEL;
118  *((uint16_t*)PLL_CTL) = PLL_MSEL|PLL_DF;
119
120  /* Commands to set PLL values */
121  asm("cli r0;");
122  asm("idle;");
123  asm("sti r0;");
124
125  /* Delay for PLL stabilization */
126  for (n=0; n<200; n++) {}
127}
128
129 /*
130  * Init_EBIU
131  *
132  * Configure extern memory
133  */
134
135void Init_EBIU (void)
136{
137  /* Configure FLASH */
138  *((uint32_t*)EBIU_AMBCTL0)  = 0x7bb07bb0L;
139  *((uint32_t*)EBIU_AMBCTL1)  = 0x7bb07bb0L;
140  *((uint16_t*)EBIU_AMGCTL)   = 0x000f;
141
142  /* Configure SDRAM
143  *((uint32_t*)EBIU_SDGCTL) = 0x0091998d;
144  *((uint16_t*)EBIU_SDBCTL) = 0x0013;
145  *((uint16_t*)EBIU_SDRRC)  = 0x0817;
146  */
147}
148
149/*
150 * Init_Flags
151 *
152 * Enable LEDs port
153 */
154void Init_Flags(void)
155{
156  *((uint16_t*)FIO_INEN)    = 0x0100;
157  *((uint16_t*)FIO_DIR)     = 0x0000;
158  *((uint16_t*)FIO_EDGE)    = 0x0100;
159  *((uint16_t*)FIO_MASKA_D) = 0x0100;
160
161  *((uint8_t*)FlashA_PortB_Dir)  = 0x3f;
162  *((uint8_t*)FlashA_PortB_Data) = 0x00;
163}
164
165/*
166 * Helper Function to use the EzKits LEDS.
167 * Can be used by the Application.
168 */
169void setLED (uint8_t value)
170{
171  *((uint8_t*)FlashA_PortB_Data) = value;
172}
173
174/*
175 * Helper Function to use the EzKits LEDS
176 */
177uint8_t getLED (void)
178{
179  return *((uint8_t*)FlashA_PortB_Data);
180}
181
182void initCPLB(void)
183{
184  int i = 0;
185  unsigned int *addr;
186  unsigned int *data;
187
188  addr = (unsigned int *)0xffe00100;
189  data = (unsigned int *)0xffe00200;
190
191  while ( dcplbs_table[i][0] != 0xffffffff ) {
192    *addr = dcplbs_table[i][0];
193    *data = dcplbs_table[i][1];
194    addr++;
195    data++;
196  }
197}
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