source: rtems/c/src/lib/libbsp/bfin/TLL6527M/include/bsp.h @ 0c09ccf3

4.115
Last change on this file since 0c09ccf3 was 0c09ccf3, checked in by Daniel Ramirez <javamonn@…>, on 12/24/13 at 10:14:15

bfin_TLL6527: added new doxygen

  • Property mode set to 100644
File size: 2.4 KB
Line 
1/**
2 * @file
3 * @ingroup bfin_tll6527m
4 * @brief Global BSP definitions.
5 */
6
7/**
8 *@file bsp.h
9 * 
10 *  This include file contains all board IO definitions for TLL6527M.
11 *
12 * COPYRIGHT (c) 2010 by ECE Northeastern University.
13 *
14 * The license and distribution terms for this file may be
15 * found in the file LICENSE in this distribution or at
16 * http://www.rtems.com/license
17 */
18 
19
20#ifndef _BSP_H
21#define _BSP_H
22
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#include <bspopts.h>
29#include <bsp/default-initial-extension.h>
30
31#include <rtems.h>
32#include <rtems/console.h>
33#include <rtems/clockdrv.h>
34#include <rtems/score/bfin.h>
35#include <rtems/bfin/bf52x.h>
36#include <bf52x.h>
37
38/**
39 * @defgroup bfin_tll6527m TLL6527M Support
40 * @ingroup bsp_bfin
41 * @brief TLL6527M Support Package
42 * @{
43 */
44
45/*
46 * PLL and clock setup values:
47 */
48
49/*
50 *  PLL configuration for TLL6527M
51 *
52 *  XTL   =  27 MHz
53 *  CLKIN =  13 MHz
54 *  VCO   = 391 MHz
55 *  CCLK  = 391 MHz
56 *  SCLK  = 130 MHz
57 */
58
59/**
60 * @name PLL Configuration
61 * @{
62 */
63
64#define PLL_CSEL    0x0000      ///< @brief CCLK = VCO      */
65#define PLL_SSEL    0x0003      ///< @brief SCLK = CCLK/3   */
66#define PLL_MSEL    0x3A00      ///< @brief VCO = 29xCLKIN  */
67#define PLL_DF      0x0001      ///< @brief CLKIN = XTL/2   */
68
69/** @} */
70
71/**
72 * @name Clock setup values
73 * @{
74 */
75
76#define CLKIN               (25000000)  ///< @brief Input clock to the PLL */
77#define CCLK        (600000000)   ///< @brief CORE CLOCK     */
78#define SCLK        (100000000)   ///< @brief SYSTEM CLOCK   */
79
80/** @} */
81
82/**
83 * @name UART setup values
84 * @{
85 */
86
87#define BAUDRATE    57600       ///< @brief Console Baudrate   */
88#define WORD_5BITS  0x00        ///< @brief 5 bits word        */
89#define WORD_6BITS  0x01        ///< @brief 6 bits word        */
90#define WORD_7BITS  0x02        ///< @brief 7 bits word        */
91#define WORD_8BITS  0x03        ///< @brief 8 bits word        */
92#define EVEN_PARITY 0x18        ///< @brief Enable EVEN parity */
93#define ODD_PARITY  0x08        ///< @brief Enable ODD parity  */
94#define TWO_STP_BIT 0x04        ///< @brief 2 stop bits        */
95
96/** @} */
97
98rtems_isr_entry set_vector(                     ///< @brief returns old vector */
99  rtems_isr_entry     handler,                  ///< @brief isr routine        */
100  rtems_vector_number vector,                   ///< @brief vector number      */
101  int                 type                      ///< @brief RTEMS or RAW intr  */
102);
103
104/** @} */
105
106#ifdef __cplusplus
107}
108#endif
109
110#endif
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