source: rtems/c/src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in @ cbc433c7

4.115
Last change on this file since cbc433c7 was cbc433c7, checked in by Sebastian Huber <sebastian.huber@…>, on 11/25/14 at 07:40:20

bsps/arm: Add .nocache section

This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
  • Property mode set to 100644
File size: 1.8 KB
Line 
1MEMORY {
2   RAM_INT_0 : ORIGIN = @ZYNQ_RAM_INT_0_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_0_LENGTH@
3   RAM_INT_1 : ORIGIN = @ZYNQ_RAM_INT_1_ORIGIN@, LENGTH = @ZYNQ_RAM_INT_1_LENGTH@
4   RAM_MMU   : ORIGIN = @ZYNQ_RAM_MMU@, LENGTH = @ZYNQ_RAM_MMU_LENGTH@
5   RAM       : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@, LENGTH = @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@
6   NOCACHE   : ORIGIN = @ZYNQ_RAM_ORIGIN_AVAILABLE@ + @ZYNQ_RAM_LENGTH_AVAILABLE@ - @ZYNQ_RAM_NOCACHE_LENGTH@, LENGTH = @ZYNQ_RAM_NOCACHE_LENGTH@
7}
8
9bsp_processor_count = DEFINED (bsp_processor_count) ? bsp_processor_count : @ZYNQ_CPUS@;
10
11REGION_ALIAS ("REGION_START",          RAM);
12REGION_ALIAS ("REGION_VECTOR",         RAM);
13REGION_ALIAS ("REGION_TEXT",           RAM);
14REGION_ALIAS ("REGION_TEXT_LOAD",      RAM);
15REGION_ALIAS ("REGION_RODATA",         RAM);
16REGION_ALIAS ("REGION_RODATA_LOAD",    RAM);
17REGION_ALIAS ("REGION_DATA",           RAM);
18REGION_ALIAS ("REGION_DATA_LOAD",      RAM);
19REGION_ALIAS ("REGION_FAST_TEXT",      RAM);
20REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
21REGION_ALIAS ("REGION_FAST_DATA",      RAM);
22REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
23REGION_ALIAS ("REGION_BSS",            RAM);
24REGION_ALIAS ("REGION_WORK",           RAM);
25REGION_ALIAS ("REGION_STACK",          RAM);
26REGION_ALIAS ("REGION_NOCACHE",        NOCACHE);
27REGION_ALIAS ("REGION_NOCACHE_LOAD",   NOCACHE);
28
29bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096;
30bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024;
31
32bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
33
34bsp_vector_table_in_start_section = 1;
35
36bsp_translation_table_base = ORIGIN (RAM_MMU);
37bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
38
39INCLUDE linkcmds.armv4
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