source: rtems/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c @ c499856

4.115
Last change on this file since c499856 was c499856, checked in by Chris Johns <chrisj@…>, on 03/20/14 at 21:10:47

Change all references of rtems.com to rtems.org.

  • Property mode set to 100644
File size: 1.3 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <bsp.h>
16#include <bsp/start.h>
17#include <bsp/arm-cp15-start.h>
18#include <bsp/arm-a9mpcore-start.h>
19
20BSP_START_DATA_SECTION static const arm_cp15_start_section_config
21zynq_mmu_config_table[] = {
22  ARMV7_CP15_START_DEFAULT_SECTIONS,
23  {
24    .begin = 0xe0000000U,
25    .end = 0xe0200000U,
26    .flags = ARMV7_MMU_DEVICE
27  }, {
28    .begin = 0xf8000000U,
29    .end = 0xf9000000U,
30    .flags = ARMV7_MMU_DEVICE
31  }
32};
33
34/*
35 * Make weak and let the user override.
36 */
37BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void) __attribute__ ((weak));
38
39BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
40{
41  uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache(
42    ARM_CP15_CTRL_A,
43    ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
44  );
45
46  arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
47    ctrl,
48    (uint32_t *) bsp_translation_table_base,
49    ARM_MMU_DEFAULT_CLIENT_DOMAIN,
50    &zynq_mmu_config_table[0],
51    RTEMS_ARRAY_SIZE(zynq_mmu_config_table)
52  );
53}
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