4.115
Last change
on this file since cbc433c7 was
cbc433c7,
checked in by Sebastian Huber <sebastian.huber@…>, on 11/25/14 at 07:40:20
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bsps/arm: Add .nocache section
This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().
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Property mode set to
100644
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File size:
771 bytes
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1 | /* |
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2 | * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. |
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3 | * |
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4 | * embedded brains GmbH |
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5 | * Dornierstr. 4 |
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6 | * 82178 Puchheim |
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7 | * Germany |
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8 | * <info@embedded-brains.de> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #include <bsp.h> |
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16 | #include <bsp/bootcard.h> |
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17 | #include <bsp/arm-a9mpcore-clock.h> |
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18 | #include <bsp/irq-generic.h> |
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19 | #include <bsp/linker-symbols.h> |
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20 | |
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21 | __attribute__ ((weak)) uint32_t zynq_clock_cpu_1x(void) |
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22 | { |
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23 | return ZYNQ_CLOCK_CPU_1X; |
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24 | } |
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25 | |
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26 | void bsp_start(void) |
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27 | { |
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28 | a9mpcore_clock_initialize_early(); |
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29 | bsp_interrupt_initialize(); |
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30 | rtems_cache_coherent_add_area( |
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31 | bsp_nocache_heap_begin, |
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32 | (uintptr_t) bsp_nocache_heap_size |
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33 | ); |
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34 | } |
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