source: rtems/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstart.c @ cbc433c7

4.115
Last change on this file since cbc433c7 was cbc433c7, checked in by Sebastian Huber <sebastian.huber@…>, on 11/25/14 at 07:40:20

bsps/arm: Add .nocache section

This section can be use to provide a cache coherent memory area via
rtems_cache_coherent_add_area().

  • Property mode set to 100644
File size: 771 bytes
Line 
1/*
2 * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#include <bsp.h>
16#include <bsp/bootcard.h>
17#include <bsp/arm-a9mpcore-clock.h>
18#include <bsp/irq-generic.h>
19#include <bsp/linker-symbols.h>
20
21__attribute__ ((weak)) uint32_t zynq_clock_cpu_1x(void)
22{
23  return ZYNQ_CLOCK_CPU_1X;
24}
25
26void bsp_start(void)
27{
28  a9mpcore_clock_initialize_early();
29  bsp_interrupt_initialize();
30  rtems_cache_coherent_add_area(
31    bsp_nocache_heap_begin,
32    (uintptr_t) bsp_nocache_heap_size
33  );
34}
Note: See TracBrowser for help on using the repository browser.