1 | /** |
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2 | * @file |
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3 | * @ingroup arm_zynq |
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4 | * @brief Global BSP definitions. |
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5 | */ |
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6 | |
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7 | /* |
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8 | * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. |
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9 | * |
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10 | * embedded brains GmbH |
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11 | * Dornierstr. 4 |
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12 | * 82178 Puchheim |
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13 | * Germany |
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14 | * <info@embedded-brains.de> |
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15 | * |
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16 | * The license and distribution terms for this file may be |
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17 | * found in the file LICENSE in this distribution or at |
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18 | * http://www.rtems.org/license/LICENSE. |
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19 | */ |
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20 | |
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21 | #ifndef LIBBSP_ARM_XILINX_ZYNQ_BSP_H |
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22 | #define LIBBSP_ARM_XILINX_ZYNQ_BSP_H |
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23 | |
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24 | #include <bspopts.h> |
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25 | |
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26 | #define BSP_FEATURE_IRQ_EXTENSION |
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27 | |
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28 | #ifndef ASM |
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29 | |
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30 | #include <rtems.h> |
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31 | |
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32 | #include <bsp/default-initial-extension.h> |
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33 | #include <bsp/start.h> |
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34 | |
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35 | #ifdef __cplusplus |
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36 | extern "C" { |
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37 | #endif /* __cplusplus */ |
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38 | |
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39 | /** |
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40 | * @defgroup arm_zynq Xilinx-Zynq Support |
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41 | * @ingroup bsp_arm |
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42 | * @brief Xilinz-Zynq Board Support Package |
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43 | * @{ |
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44 | */ |
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45 | |
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46 | #define BSP_ARM_A9MPCORE_SCU_BASE 0xf8f00000 |
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47 | |
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48 | #define BSP_ARM_GIC_CPUIF_BASE 0xf8f00100 |
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49 | |
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50 | #define BSP_ARM_A9MPCORE_GT_BASE 0xf8f00200 |
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51 | |
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52 | #define BSP_ARM_A9MPCORE_PT_BASE 0xf8f00600 |
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53 | |
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54 | #define BSP_ARM_GIC_DIST_BASE 0xf8f01000 |
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55 | |
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56 | #define BSP_ARM_L2C_310_BASE 0xf8f02000 |
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57 | |
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58 | #define BSP_ARM_L2C_310_ID 0x410000c8 |
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59 | |
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60 | /** |
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61 | * @brief Zynq specific set up of the MMU. |
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62 | * |
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63 | * Provide in the application to override |
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64 | * the defaults in the BSP. Note the defaults do not map in the GP0 and GP1 |
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65 | * AXI ports. You should add the specific regions that map into your |
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66 | * PL rather than just open the whole of the GP[01] address space up. |
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67 | */ |
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68 | BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void); |
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69 | |
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70 | uint32_t zynq_clock_cpu_1x(void); |
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71 | |
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72 | /** @} */ |
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73 | |
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74 | #ifdef __cplusplus |
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75 | } |
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76 | #endif /* __cplusplus */ |
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77 | |
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78 | #endif /* ASM */ |
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79 | |
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80 | #endif /* LIBBSP_ARM_XILINX_ZYNQ_BSP_H */ |
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