source: rtems/c/src/lib/libbsp/arm/xilinx-zynq/console/zynq-uart.c @ 3f6a823

4.11
Last change on this file since 3f6a823 was 3f6a823, checked in by Sebastian Huber <sebastian.huber@…>, on Jun 19, 2013 at 10:57:26 AM

bsp/xilinx-zynq: Do not start transmitter break

  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#include <bsp/zynq-uart.h>
16#include <bsp/zynq-uart-regs.h>
17
18#include <libchip/sersupp.h>
19
20static volatile zynq_uart *zynq_uart_get_regs(int minor)
21{
22  const console_tbl *ct = Console_Port_Tbl != NULL ?
23    Console_Port_Tbl[minor] : &Console_Configuration_Ports[minor];
24
25  return (volatile zynq_uart *) ct->ulCtrlPort1;
26}
27
28static void zynq_uart_initialize(int minor)
29{
30  volatile zynq_uart *regs = zynq_uart_get_regs(minor);
31
32  regs->control = ZYNQ_UART_CONTROL_RXDIS
33    | ZYNQ_UART_CONTROL_TXDIS
34    | ZYNQ_UART_CONTROL_RXRES
35    | ZYNQ_UART_CONTROL_TXRES;
36  regs->mode = ZYNQ_UART_MODE_CHMODE(ZYNQ_UART_MODE_CHMODE_NORMAL)
37    | ZYNQ_UART_MODE_PAR(ZYNQ_UART_MODE_PAR_NONE)
38    | ZYNQ_UART_MODE_CHRL(ZYNQ_UART_MODE_CHRL_8);
39  regs->baud_rate_gen = ZYNQ_UART_BAUD_RATE_GEN_CD(1);
40  regs->baud_rate_div = ZYNQ_UART_BAUD_RATE_DIV_BDIV(0xff);
41  regs->rx_fifo_trg_lvl = ZYNQ_UART_RX_FIFO_TRG_LVL_RTRIG(0);
42  regs->rx_timeout = ZYNQ_UART_RX_TIMEOUT_RTO(0);
43  regs->control = ZYNQ_UART_CONTROL_RXEN
44    | ZYNQ_UART_CONTROL_TXEN
45    | ZYNQ_UART_CONTROL_RSTTO;
46}
47
48static int zynq_uart_first_open(int major, int minor, void *arg)
49{
50  rtems_libio_open_close_args_t *oc = (rtems_libio_open_close_args_t *) arg;
51  struct rtems_termios_tty *tty = (struct rtems_termios_tty *) oc->iop->data1;
52  console_data *cd = &Console_Port_Data[minor];
53  const console_tbl *ct = Console_Port_Tbl[minor];
54
55  cd->termios_data = tty;
56  rtems_termios_set_initial_baud(tty, (rtems_termios_baud_t) ct->pDeviceParams);
57
58  return 0;
59}
60
61static int zynq_uart_last_close(int major, int minor, void *arg)
62{
63  return 0;
64}
65
66static int zynq_uart_read_polled(int minor)
67{
68  volatile zynq_uart *regs = zynq_uart_get_regs(minor);
69
70  if ((regs->channel_sts & ZYNQ_UART_CHANNEL_STS_REMPTY) != 0) {
71    return -1;
72  } else {
73    return ZYNQ_UART_TX_RX_FIFO_FIFO_GET(regs->tx_rx_fifo);
74  }
75}
76
77static void zynq_uart_write_polled(int minor, char c)
78{
79  volatile zynq_uart *regs = zynq_uart_get_regs(minor);
80
81  while ((regs->channel_sts & ZYNQ_UART_CHANNEL_STS_TFUL) != 0) {
82    /* Wait */
83  }
84
85  regs->tx_rx_fifo = ZYNQ_UART_TX_RX_FIFO_FIFO(c);
86}
87
88static ssize_t zynq_uart_write_support_polled(
89  int minor,
90  const char *s,
91  size_t n
92)
93{
94  ssize_t i = 0;
95
96  for (i = 0; i < n; ++i) {
97    zynq_uart_write_polled(minor, s[i]);
98  }
99
100  return n;
101}
102
103static int zynq_uart_set_attribues(int minor, const struct termios *term)
104{
105  return -1;
106}
107
108const console_fns zynq_uart_fns = {
109  .deviceProbe = libchip_serial_default_probe,
110  .deviceFirstOpen = zynq_uart_first_open,
111  .deviceLastClose = zynq_uart_last_close,
112  .deviceRead = zynq_uart_read_polled,
113  .deviceWrite = zynq_uart_write_support_polled,
114  .deviceInitialize = zynq_uart_initialize,
115  .deviceWritePolled = zynq_uart_write_polled,
116  .deviceSetAttributes = zynq_uart_set_attribues,
117  .deviceOutputUsesInterrupts = false
118};
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