source: rtems/c/src/lib/libbsp/arm/tms570/startup/bspstart.c @ e56090ef

5
Last change on this file since e56090ef was 4a02a74, checked in by Pavel Pisa <pisa@…>, on 11/28/15 at 11:01:36

bsp/tms570: ensure that linker symbol comparison to NULL is not optimized out.

Signed-off-by: Pavel Pisa <pisa@…>

  • Property mode set to 100644
File size: 2.4 KB
Line 
1/**
2 * @file bspstart.c
3 *
4 * @ingroup tms570
5 *
6 * @brief Startup code.
7 */
8
9/*
10 * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
11 *
12 * Google Summer of Code 2014 at
13 * Czech Technical University in Prague
14 * Zikova 1903/4
15 * 166 36 Praha 6
16 * Czech Republic
17 *
18 * Based on LPC24xx and LPC1768 BSP
19 *
20 * The license and distribution terms for this file may be
21 * found in the file LICENSE in this distribution or at
22 * http://www.rtems.org/license/LICENSE.
23 */
24
25#include <bsp.h>
26#include <bsp/tms570-pom.h>
27#include <bsp/irq-generic.h>
28#include <bsp/start.h>
29#include <bsp/bootcard.h>
30#include <bsp/linker-symbols.h>
31#include <rtems/endian.h>
32
33void bsp_start( void )
34{
35  void *need_remap_ptr;
36  unsigned int need_remap_int;
37
38  #if BYTE_ORDER == BIG_ENDIAN
39    /*
40     * If CPU is big endian (TMS570 family variant)
41     * set the CPU mode to supervisor and big endian.
42     * Do not set mode if CPU is little endian
43     * (RM48 family variant) for which default mode 0x13
44     * defined in cpukit/score/cpu/arm/cpu.c
45     * is right.
46     */
47    arm_cpu_mode = 0x213;
48  #endif
49
50  tms570_initialize_and_clear();
51
52  /*
53   * If RTEMS image does not start at address 0x00000000
54   * then first level exception table at memory begin has
55   * to be replaced to point to RTEMS handlers addresses.
56   *
57   * There is no VBAR or other option because Cortex-R
58   * does provides only fixed address 0x00000000 for exceptions
59   * (0xFFFF0000-0xFFFF001C alternative SCTLR.V = 1 cannot
60   * be used because target area corersponds to PMM peripheral
61   * registers on TMS570).
62   *
63   * Alternative is to use jumps over SRAM based trampolines
64   * but that is not compatible with
65   *   Check TCRAM1 ECC error detection logic
66   * which intentionally introduces data abort during startup
67   * to check SRAM and if exception processing goes through
68   * SRAM then it leads to CPU error halt.
69   *
70   * So use of POM to replace jumps to vectors target
71   * addresses seems to be the best option for now.
72   *
73   * The passing of linker symbol (represented as start address
74   * of global array) through dummy asm block ensures that C compiler
75   * cannot optimize comparison out on premise that reference cannot
76   * evaluate to NULL definition in standard.
77   */
78  need_remap_ptr = bsp_start_vector_table_begin;
79  asm volatile ("\n": "=r" (need_remap_int): "0" (need_remap_ptr));
80  if ( need_remap_int != 0 ) {
81    tms570_pom_remap();
82  }
83
84  /* Interrupts */
85  bsp_interrupt_initialize();
86
87}
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