[4407ee6] | 1 | /** |
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| 2 | * @file irq.c |
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| 3 | * |
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| 4 | * @ingroup tms570 |
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| 5 | * |
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| 6 | * @brief TMS570 interrupt support functions definitions. |
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| 7 | */ |
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| 8 | |
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| 9 | /* |
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| 10 | * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com> |
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| 11 | * |
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| 12 | * Google Summer of Code 2014 at |
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| 13 | * Czech Technical University in Prague |
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| 14 | * Zikova 1903/4 |
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| 15 | * 166 36 Praha 6 |
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| 16 | * Czech Republic |
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| 17 | * |
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| 18 | * Based on LPC24xx and LPC1768 BSP |
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| 19 | * |
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| 20 | * The license and distribution terms for this file may be |
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| 21 | * found in the file LICENSE in this distribution or at |
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| 22 | * http://www.rtems.org/license/LICENSE. |
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| 23 | */ |
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| 24 | |
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| 25 | #include <bsp.h> |
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| 26 | #include <bsp/irq-generic.h> |
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| 27 | #include <bsp/tms570-vim.h> |
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| 28 | #include <bsp/irq.h> |
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| 29 | #include <rtems/score/armv4.h> |
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| 30 | |
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| 31 | /** |
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| 32 | * @brief Check if isr vector is valid |
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| 33 | * |
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| 34 | * Check if isr vector is valid by using BSP_INTERRUPT_VECTOR_MAX and |
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| 35 | * BSP_INTERRUPT_VECTOR_MIN defined in irq.h |
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| 36 | * |
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| 37 | * @param[in] vector interrupt vector to be checked. |
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| 38 | * @retval TRUE vector is valid. |
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| 39 | * @retval FALSE vector is invalid |
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| 40 | */ |
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| 41 | static inline bool tms570_irq_is_valid( |
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| 42 | rtems_vector_number vector |
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| 43 | ) |
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| 44 | { |
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| 45 | return (vector <= BSP_INTERRUPT_VECTOR_MAX) && |
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| 46 | (vector > BSP_INTERRUPT_VECTOR_MIN); |
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| 47 | } |
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| 48 | |
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| 49 | unsigned int priorityTable[BSP_INTERRUPT_VECTOR_MAX+1]; |
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| 50 | |
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| 51 | /** |
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| 52 | * @brief Set priority of the interrupt vector. |
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| 53 | * |
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| 54 | * This function is here because of compability. It should set |
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| 55 | * priority of the interrupt vector. |
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| 56 | * @warning It does not set any priority at HW layer. It is nearly imposible to |
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| 57 | * @warning set priority of the interrupt on TMS570 in a nice way. |
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| 58 | * @param[in] vector vector of isr |
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| 59 | * @param[in] priority new priority assigned to the vector |
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| 60 | * @return Void |
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| 61 | */ |
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| 62 | void tms570_irq_set_priority( |
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| 63 | rtems_vector_number vector, |
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| 64 | unsigned priority |
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| 65 | ) |
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| 66 | { |
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| 67 | if ( tms570_irq_is_valid(vector) ) { |
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| 68 | priorityTable[vector] = priority; |
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| 69 | } |
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| 70 | } |
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| 71 | |
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| 72 | /** |
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| 73 | * @brief Gets priority of the interrupt vector. |
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| 74 | * |
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| 75 | * This function is here because of compability. It returns priority |
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| 76 | * of the isr vector last set by tms570_irq_set_priority function. |
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| 77 | * |
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| 78 | * @warning It does not return any real priority of the HW layer. |
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| 79 | * @param[in] vector vector of isr |
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| 80 | * @retval 0 vector is invalid. |
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| 81 | * @retval priority priority of the interrupt |
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| 82 | */ |
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| 83 | unsigned tms570_irq_get_priority( |
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| 84 | rtems_vector_number vector |
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| 85 | ) |
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| 86 | { |
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| 87 | if ( tms570_irq_is_valid(vector) ) { |
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| 88 | return priorityTable[vector]; |
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| 89 | } |
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| 90 | return 0; |
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| 91 | } |
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| 92 | |
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| 93 | /** |
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| 94 | * @brief Interrupt dispatch |
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| 95 | * |
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| 96 | * Called by OS to determine which interrupt occured. |
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| 97 | * Function passes control to interrupt handler. |
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| 98 | * |
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| 99 | * @return Void |
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| 100 | */ |
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| 101 | void bsp_interrupt_dispatch(void) |
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| 102 | { |
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| 103 | rtems_vector_number vector = TMS570_VIM.IRQINDEX-1; |
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| 104 | |
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| 105 | bsp_interrupt_handler_dispatch(vector); |
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| 106 | } |
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| 107 | |
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| 108 | /** |
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| 109 | * @brief enables interrupt vector in the HW |
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| 110 | * |
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| 111 | * Enables HW interrupt for specified vector |
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| 112 | * |
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| 113 | * @param[in] vector vector of the isr which needs to be enabled. |
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| 114 | * @retval RTEMS_INVALID_ID vector is invalid. |
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| 115 | * @retval RTEMS_SUCCESSFUL interrupt source enabled. |
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| 116 | */ |
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| 117 | rtems_status_code bsp_interrupt_vector_enable( |
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| 118 | rtems_vector_number vector |
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| 119 | ) |
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| 120 | { |
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| 121 | if( !tms570_irq_is_valid(vector) ) { |
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| 122 | return RTEMS_INVALID_ID; |
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| 123 | } |
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| 124 | |
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| 125 | TMS570_VIM.REQENASET[vector >> 5] = 1 << (vector & 0x1f); |
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| 126 | |
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| 127 | return RTEMS_SUCCESSFUL; |
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| 128 | } |
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| 129 | |
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| 130 | /** |
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| 131 | * @brief disables interrupt vector in the HW |
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| 132 | * |
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| 133 | * Disables HW interrupt for specified vector |
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| 134 | * |
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| 135 | * @param[in] vector vector of the isr which needs to be disabled. |
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| 136 | * @retval RTEMS_INVALID_ID vector is invalid. |
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| 137 | * @retval RTEMS_SUCCESSFUL interrupt source disabled. |
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| 138 | */ |
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| 139 | rtems_status_code bsp_interrupt_vector_disable( |
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| 140 | rtems_vector_number vector |
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| 141 | ) |
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| 142 | { |
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| 143 | if( !tms570_irq_is_valid(vector) ) { |
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| 144 | return RTEMS_INVALID_ID; |
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| 145 | } |
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| 146 | |
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| 147 | TMS570_VIM.REQENACLR[vector >> 5] = 1 << (vector & 0x1f); |
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| 148 | |
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| 149 | return RTEMS_SUCCESSFUL; |
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| 150 | } |
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| 151 | |
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| 152 | /** |
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| 153 | * @brief Init function of interrupt module |
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| 154 | * |
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| 155 | * Resets vectored interrupt interface to default state. |
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| 156 | * Disables all interrupts. |
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| 157 | * Set all sources as IRQ (not FIR). |
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| 158 | * |
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| 159 | * @retval RTEMS_SUCCESSFUL All is set |
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| 160 | */ |
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| 161 | rtems_status_code bsp_interrupt_facility_initialize(void) |
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| 162 | { |
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| 163 | void (**vim_vec)(void) = (void (**)(void)) 0xFFF82000; |
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| 164 | unsigned int value = 0x00010203; |
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| 165 | unsigned int i = 0; |
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| 166 | uint32_t sctlr; |
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| 167 | |
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| 168 | /* Disable interrupts */ |
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| 169 | for ( i = 0; i < 3; i++ ) { |
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| 170 | TMS570_VIM.REQENACLR[i] = 0xffffffff; |
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| 171 | } |
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| 172 | /* Map default events on interrupt vectors */ |
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| 173 | for ( i = 0; i < 24; i += 1, value += 0x04040404) { |
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| 174 | TMS570_VIM.CHANCTRL[i] = value; |
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| 175 | } |
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| 176 | /* Set all vectors as IRQ (not FIR) */ |
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| 177 | TMS570_VIM.FIRQPR[0] = 3; |
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| 178 | TMS570_VIM.FIRQPR[1] = 0; |
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| 179 | TMS570_VIM.FIRQPR[2] = 0; |
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| 180 | |
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| 181 | /* |
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| 182 | _CPU_ISR_install_vector( |
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| 183 | ARM_EXCEPTION_IRQ, |
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| 184 | _ARMV4_Exception_interrupt, |
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| 185 | NULL |
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| 186 | ); |
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| 187 | |
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| 188 | Call to setup of interrupt entry in CPU level exception vectors table |
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| 189 | is not used (necessary/possible) because the table is provided |
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| 190 | by c/src/lib/libbsp/arm/shared/start/start.S and POM overlay |
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| 191 | solution remaps that to address zero. |
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| 192 | */ |
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| 193 | |
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| 194 | for ( i = 0; i <= 94; ++i ) { |
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| 195 | vim_vec[i] = _ARMV4_Exception_interrupt; |
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| 196 | } |
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| 197 | /* Clear bit VE in SCTLR register to not use VIM IRQ exception bypass*/ |
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| 198 | asm volatile ("mrc p15, 0, %0, c1, c0, 0\n": "=r" (sctlr)); |
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| 199 | /* |
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| 200 | * Disable bypass of CPU level exception table for interrupt entry which |
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| 201 | * can be provided by VIM hardware |
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| 202 | */ |
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| 203 | sctlr &= ~(1 << 24); |
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[870ff8e9] | 204 | #if 0 |
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| 205 | /* |
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| 206 | * Option to enable exception table bypass for interrupts |
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| 207 | * |
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| 208 | * Because RTEMS requires all interrupts to be serviced through |
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| 209 | * common _ARMV4_Exception_interrupt handler to allow task switching |
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| 210 | * on exit from interrupt working correctly, vim_vec cannot point |
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| 211 | * directly to individual vector handlers and need to point |
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| 212 | * to single entry path. But if TMS570_VIM.IRQINDEX is then used |
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| 213 | * to target execution to corresponding service then for some |
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| 214 | * peripherals (i.e. EMAC) interrupt is already acknowledged |
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| 215 | * by VIM and IRQINDEX is read as zero which leads to spurious |
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| 216 | * interrupt and peripheral not serviced/blocked. |
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| 217 | * |
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| 218 | * To analyze this behavior we used trampolines which setup |
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| 219 | * bsp_interrupt_vector_inject and pass execution to |
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| 220 | * _ARMV4_Exception_interrupt. It works but is more ugly than |
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| 221 | * use of POM remap for these cases where application does not |
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| 222 | * start at address 0x00000000. If RTEMS image is placed at |
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| 223 | * memory space beginning then no of these constructs is necessary. |
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| 224 | */ |
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| 225 | sctlr |= 1 << 24; |
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| 226 | #endif |
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[4407ee6] | 227 | asm volatile ("mcr p15, 0, %0, c1, c0, 0\n": : "r" (sctlr)); |
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| 228 | |
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| 229 | return RTEMS_SUCCESSFUL; |
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| 230 | } |
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