source: rtems/c/src/lib/libbsp/arm/tms570/include/tms570-vim.h @ cf4dfc1

4.11
Last change on this file since cf4dfc1 was 4407ee6, checked in by Premysl Houdek <kom541000@…>, on Aug 20, 2014 at 3:24:23 PM

BSP for TMS570LS31x Hercules Development Kit from TI (TMS570LS3137)

Included variants:

tms570ls3137_hdk_intram - place code and data into internal SRAM
tms570ls3137_hdk_sdram - place code into external SDRAM and data to SRAM
tms570ls3137_hdk - variant prepared for stand-alone RTEMS aplication

stored and running directly from flash. Not working yet.

Chip initialization code not included in BSP.
External startup generated by TI's HalCoGen? was used for
testing and debugging.

More information about TMS570 BSP can be found at

http://www.rtems.org/wiki/index.php/Tms570

Patch version 2

  • most of the formatting suggestion applied.
  • BSP converted to use clock shell
  • console driver "set attributes" tested. Baudrate change working

Patch version 3

  • more formatting changes.
  • removed leftover defines and test functions

Todo:

refactor header files (name register fields)

  • Property mode set to 100644
File size: 2.3 KB
Line 
1/**
2 * @file tms570-vim.h
3 *
4 * @ingroup tms570
5 *
6 * @brief Vectored Interrupt Module (VIM) header file.
7 */
8
9/*
10 * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
11 *
12 * Google Summer of Code 2014 at
13 * Czech Technical University in Prague
14 * Zikova 1903/4
15 * 166 36 Praha 6
16 * Czech Republic
17 *
18 * Based on LPC24xx and LPC1768 BSP
19 * by embedded brains GmbH and others
20 *
21 * The license and distribution terms for this file may be
22 * found in the file LICENSE in this distribution or at
23 * http://www.rtems.org/license/LICENSE.
24 */
25
26#ifndef LIBBSP_ARM_TMS570_VIM_H
27#define LIBBSP_ARM_TMS570_VIM_H
28
29#ifndef ASM
30#include <rtems.h>
31#include <stdint.h>
32
33#ifdef __cplusplus
34extern "C" {
35#endif /* __cplusplus */
36
37typedef struct{
38    uint32_t PARFLG;            /* InterruptVectorTableParityFlagRegister */
39    uint32_t PARCTL;            /* InterruptVectorTableParityControlRegister */
40    uint32_t ADDERR;            /* AddressParityErrorRegister */
41    uint32_t FBPARERR;          /* Fall-BackAddressParityErrorRegister */
42    uint32_t reserved1 [0x4/4];
43    uint32_t IRQINDEX;          /* IRQIndexOffsetVectorRegister */
44    uint32_t FIQINDEX;          /* FIQIndexOffsetVectorRegister */
45    uint32_t reserved2 [0x8/4];
46    uint32_t FIRQPR[3];         /* FIQ/IRQProgramControlRegister0 */
47    uint32_t reserved3 [0x4/4];
48    uint32_t INTREQ[3];         /* PendingInterruptReadLocationRegister0 */
49    uint32_t reserved4 [0x4/4];
50    uint32_t REQENASET[3];      /* InterruptEnableSetRegister0 */
51    uint32_t reserved5 [0x4/4];
52    uint32_t REQENACLR[3];      /* InterruptEnableClearRegister0 */
53    uint32_t reserved6 [0x4/4];
54    uint32_t WAKEENASET[3];     /* Wake-upEnableSetRegister0 */
55    uint32_t reserved7 [0x4/4];
56    uint32_t WAKEENACLR[3];     /* Wake-upEnableClearRegister0 */
57    uint32_t reserved8 [0x4/4];
58    uint32_t IRQVECREG;         /* IRQInterruptVectorRegister */
59    uint32_t FIQVECREG;         /* FIQInterruptVectorRegister */
60    uint32_t CAPEVT;            /* CaptureEventRegister */
61    uint32_t reserved9 [0x4/4];
62    uint32_t CHANCTRL [0x5c/4]; /* VIM Interrupt Control Register (PARSER ERROR) */
63}tms570_vim_t;
64
65#define TMS570_VIM (*(volatile tms570_vim_t*)0xFFFFFDEC)
66
67#endif
68
69/** @} */
70
71#ifdef __cplusplus
72}
73#endif /* __cplusplus */
74
75#endif /* LIBBSP_ARM_TMS570_IRQ_H */
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