1 | /** |
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2 | * @file tms570-rti.h |
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3 | * |
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4 | * @ingroup tms570 |
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5 | * |
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6 | * @brief Real Time Interrupt module (RTI) header file. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com> |
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11 | * |
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12 | * Google Summer of Code 2014 at |
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13 | * Czech Technical University in Prague |
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14 | * Zikova 1903/4 |
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15 | * 166 36 Praha 6 |
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16 | * Czech Republic |
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17 | * |
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18 | * Based on LPC24xx and LPC1768 BSP |
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19 | * by embedded brains GmbH and others |
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20 | * |
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21 | * The license and distribution terms for this file may be |
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22 | * found in the file LICENSE in this distribution or at |
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23 | * http://www.rtems.org/license/LICENSE. |
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24 | */ |
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25 | |
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26 | #ifndef LIBBSP_ARM_TMS570_RTI_H |
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27 | #define LIBBSP_ARM_TMS570_RTI_H |
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28 | |
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29 | #ifndef ASM |
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30 | |
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31 | #include <stdint.h> |
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32 | |
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33 | #ifdef __cplusplus |
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34 | extern "C" { |
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35 | #endif /* __cplusplus */ |
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36 | |
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37 | typedef struct { |
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38 | uint32_t RTIGCTRL; /* RTIGlobalControlRegister */ |
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39 | uint32_t RTITBCTRL; /* RTITimebaseControlRegister */ |
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40 | uint32_t RTICAPCTRL; /* RTICaptureControlRegister */ |
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41 | uint32_t RTICOMPCTRL; /* RTICompareControlRegister */ |
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42 | uint32_t RTIFRC0; /* RTIFreeRunningCounter0Register */ |
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43 | uint32_t RTIUC0; /* RTIUpCounter0Register */ |
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44 | uint32_t RTICPUC0; /* RTICompareUpCounter0Register */ |
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45 | uint32_t reserved1 [0x4/4]; |
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46 | uint32_t RTICAFRC0; /* RTICaptureFreeRunningCounter0Register */ |
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47 | uint32_t RTICAUC0; /* RTICaptureUpCounter0Register */ |
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48 | uint32_t reserved2 [0x8/4]; |
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49 | uint32_t RTIFRC1; /* RTIFreeRunningCounter1Register */ |
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50 | uint32_t RTIUC1; /* RTIUpCounter1Register */ |
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51 | uint32_t RTICPUC1; /* RTICompareUpCounter1Register */ |
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52 | uint32_t reserved3 [0x4/4]; |
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53 | uint32_t RTICAFRC1; /* RTICaptureFreeRunningCounter1Register */ |
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54 | uint32_t RTICAUC1; /* RTICaptureUpCounter1Register */ |
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55 | uint32_t reserved4 [0x8/4]; |
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56 | uint32_t RTICOMP0; /* RTICompare0Register */ |
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57 | uint32_t RTIUDCP0; /* RTIUpdateCompare0Register */ |
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58 | uint32_t RTICOMP1; /* RTICompare1Register */ |
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59 | uint32_t RTIUDCP1; /* RTIUpdateCompare1Register */ |
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60 | uint32_t RTICOMP2; /* RTICompare2Register */ |
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61 | uint32_t RTIUDCP2; /* RTIUpdateCompare2Register */ |
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62 | uint32_t RTICOMP3; /* RTICompare3Register */ |
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63 | uint32_t RTIUDCP3; /* RTIUpdateCompare3Register */ |
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64 | uint32_t RTITBLCOMP; /* RTITimebaseLowCompareRegister */ |
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65 | uint32_t RTITBHCOMP; /* RTITimebaseHighCompareRegister */ |
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66 | uint32_t reserved5 [0x8/4]; |
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67 | uint32_t RTISETINTENA; /* RTISetInterruptEnableRegister */ |
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68 | uint32_t RTICLEARINTENA; /* RTIClearInterruptEnableRegister */ |
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69 | uint32_t RTIINTFLAG; /* RTIInterruptFlagRegister */ |
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70 | uint32_t reserved6 [0x4/4]; |
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71 | uint32_t RTIDWDCTRL; /* DigitalWatchdogControlRegister */ |
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72 | uint32_t RTIDWDPRLD; /* DigitalWatchdogPreloadRegister */ |
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73 | uint32_t RTIWDSTATUS; /* WatchdogStatusRegister */ |
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74 | uint32_t RTIWDKEY; /* RTIWatchdogKeyRegister */ |
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75 | uint32_t RTIDWDCNTR; /* RTIDigitalWatchdogDownCounterRegister */ |
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76 | uint32_t RTIWWDRXNCTRL; /* DigitalWindowedWatchdogReactionControlRegister */ |
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77 | uint32_t RTIWWDSIZECTRL; /* DigitalWindowedWatchdogWindowSizeControlRegister */ |
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78 | uint32_t RTIINTCLRENABLE;/* RTICompareInterruptClearEnableRegister */ |
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79 | uint32_t RTICOMP0CLR; /* RTICompare0ClearRegister */ |
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80 | uint32_t RTICOMP1CLR; /* RTICompare1ClearRegister */ |
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81 | uint32_t RTICOMP2CLR; /* RTICompare2ClearRegister */ |
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82 | uint32_t RTICOMP3CLR; /* RTICompare3ClearRegister */ |
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83 | }tms570_rti_t; |
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84 | |
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85 | #define TMS570_RTI (*(volatile tms570_rti_t*)0xFFFFFC00) |
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86 | |
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87 | /** @} */ |
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88 | |
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89 | #ifdef __cplusplus |
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90 | } |
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91 | #endif /* __cplusplus */ |
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92 | |
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93 | #endif /* ASM */ |
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94 | |
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95 | #endif /* LIBBSP_ARM_TMS570_IRQ_H */ |
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