source: rtems/c/src/lib/libbsp/arm/tms570/include/ti_herc/reg_rtp.h @ bea49c9

4.11
Last change on this file since bea49c9 was bea49c9, checked in by Premysl Houdek <kom541000@…>, on Jul 16, 2015 at 2:26:09 PM

bsp/tms570: New/generated header files for TMS570 SoC peripherals registers.

The header files are generated by script make_header.py.
Current script's version can be found at:

https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python

Registers offsets and fields have been extracted from reference manual.

Signed-off-by: Premysl Houdek <kom541000@…>

  • Property mode set to 100644
File size: 10.4 KB
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1/* The header file is generated by make_header.py from RTP.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 *    list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 *    this list of conditions and the following disclaimer in the documentation
22 *    and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_tms570_RTP
40#define LIBBSP_ARM_tms570_RTP
41
42#include <bsp/utility.h>
43
44typedef struct{
45  uint32_t GLBCTRL;           /*RTP Global Control Register*/
46  uint32_t TRENA;             /*RTP Trace Enable Register*/
47  uint32_t GSR;               /*RTP Global Status Register*/
48  uint32_t RAM1REG1;          /*RTP RAM 1 Trace Region 1 Register*/
49  uint32_t RAM1REG2;          /*RTP RAM 1 Trace Region 2 Register*/
50  uint32_t RAM2REG1;          /*RTP RAM 2 Trace Region 1 Register*/
51  uint32_t RAM2REG2;          /*RTP RAM 2 Trace Region 2 Register*/
52  uint8_t reserved1 [8];
53  uint32_t PERREG1;           /*RTP Peripheral Trace Region 1 Register*/
54  uint32_t PERREG2;           /*RTP Peripheral Trace Region 2 Register*/
55  uint32_t DDMW;              /*RTP Direct Data Mode Write Register*/
56  uint8_t reserved2 [4];
57  uint32_t PC0;               /*RTP Pin Control 0 Register*/
58  uint32_t PC1;               /*RTP Pin Control 1 Register*/
59  uint32_t PC2;               /*RTP Pin Control 2 Register*/
60  uint32_t PC3;               /*RTP Pin Control 3 Register*/
61  uint32_t PC4;               /*RTP Pin Control 4 Register*/
62  uint32_t PC5;               /*RTP Pin Control 5 Register*/
63  uint32_t PC6;               /*RTP Pin Control 6 Register*/
64  uint32_t PC7;               /*RTP Pin Control 7 Register*/
65  uint32_t PC8;               /*RTP Pin Control 8 Register*/
66} tms570_rtp_t;
67
68
69/*---------------------TMS570_RTPGLBCTRL---------------------*/
70/* field: TEST - By setting the bit, the FIFO RAM will be mapped into the SYSTEM Peripheral frame starting at */
71#define TMS570_RTP_GLBCTRL_TEST BSP_FLD32(24)
72
73/* field: PRESCALER - The prescaler divides HCLK down to the desired RTPCLK frequency. */
74#define TMS570_RTP_GLBCTRL_PRESCALER(val) BSP_FLD32(val,16, 18)
75#define TMS570_RTP_GLBCTRL_PRESCALER_GET(reg) BSP_FLD32GET(reg,16, 18)
76#define TMS570_RTP_GLBCTRL_PRESCALER_SET(reg,val) BSP_FLD32SET(reg, val,16, 18)
77
78/* field: DDM_WIDTH - Direct data mode word size width. */
79#define TMS570_RTP_GLBCTRL_DDM_WIDTH(val) BSP_FLD32(val,12, 13)
80#define TMS570_RTP_GLBCTRL_DDM_WIDTH_GET(reg) BSP_FLD32GET(reg,12, 13)
81#define TMS570_RTP_GLBCTRL_DDM_WIDTH_SET(reg,val) BSP_FLD32SET(reg, val,12, 13)
82
83/* field: DDM_RW -  */
84#define TMS570_RTP_GLBCTRL_DDM_RW BSP_FLD32(11)
85
86/* field: TM_DDM - Trace Mode or Direct Data Mode */
87#define TMS570_RTP_GLBCTRL_TM_DDM BSP_FLD32(10)
88
89/* field: PW - Port width. This bit field configures the RTP to the desired port width. */
90#define TMS570_RTP_GLBCTRL_PW(val) BSP_FLD32(val,8, 9)
91#define TMS570_RTP_GLBCTRL_PW_GET(reg) BSP_FLD32GET(reg,8, 9)
92#define TMS570_RTP_GLBCTRL_PW_SET(reg,val) BSP_FLD32SET(reg, val,8, 9)
93
94/* field: RESET - This bit resets the state machine and the registers to their reset value. */
95#define TMS570_RTP_GLBCTRL_RESET BSP_FLD32(7)
96
97/* field: CONTCLK - Continuous RTPCLK enable. */
98#define TMS570_RTP_GLBCTRL_CONTCLK BSP_FLD32(6)
99
100/* field: HOVF - Halt on overflow. */
101#define TMS570_RTP_GLBCTRL_HOVF BSP_FLD32(5)
102
103/* field: INV_RGN - Trace inside or outside of defined trace regions. */
104#define TMS570_RTP_GLBCTRL_INV_RGN BSP_FLD32(4)
105
106/* field: ON_OFF - ON/Off switch. */
107#define TMS570_RTP_GLBCTRL_ON_OFF(val) BSP_FLD32(val,0, 3)
108#define TMS570_RTP_GLBCTRL_ON_OFF_GET(reg) BSP_FLD32GET(reg,0, 3)
109#define TMS570_RTP_GLBCTRL_ON_OFF_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
110
111
112/*----------------------TMS570_RTPTRENA----------------------*/
113/* field: ENA4 - Enable tracing for peripherals. */
114#define TMS570_RTP_TRENA_ENA4 BSP_FLD32(24)
115
116/* field: ENA2 - Enable tracing for RAM block 2. */
117#define TMS570_RTP_TRENA_ENA2 BSP_FLD32(8)
118
119/* field: ENA1 -  */
120#define TMS570_RTP_TRENA_ENA1 BSP_FLD32(0)
121
122
123/*-----------------------TMS570_RTPGSR-----------------------*/
124/* field: EMPTYSER - Serializer empty. This bit determines if there is data left in the serializer. */
125#define TMS570_RTP_GSR_EMPTYSER BSP_FLD32(12)
126
127/* field: EMPTYPER - Peripheral FIFO empty. This bit determines if there are entries left in the FIFO. */
128#define TMS570_RTP_GSR_EMPTYPER BSP_FLD32(11)
129
130/* field: EMPTY2 - RAM block 2 FIFO empty. This bit determines if there are entries left in the FIFO. */
131#define TMS570_RTP_GSR_EMPTY2 BSP_FLD32(9)
132
133/* field: EMPTY1 - RAM block 1 FIFO empty. This bit determines if there are entries left in the FIFO. */
134#define TMS570_RTP_GSR_EMPTY1 BSP_FLD32(8)
135
136/* field: OVFPER - Overflow peripheral FIFO. */
137#define TMS570_RTP_GSR_OVFPER BSP_FLD32(3)
138
139/* field: OVF2 - Overflow RAM block 2 FIFO. */
140#define TMS570_RTP_GSR_OVF2 BSP_FLD32(1)
141
142/* field: OVF1 - Overflow RAM block 1 FIFO. */
143#define TMS570_RTP_GSR_OVF1 BSP_FLD32(0)
144
145
146/*---------------------TMS570_RTPRAM1REG1---------------------*/
147/* field: CPU_DMA - CPU and/or other master access. */
148#define TMS570_RTP_RAM1REG1_CPU_DMA(val) BSP_FLD32(val,29, 30)
149#define TMS570_RTP_RAM1REG1_CPU_DMA_GET(reg) BSP_FLD32GET(reg,29, 30)
150#define TMS570_RTP_RAM1REG1_CPU_DMA_SET(reg,val) BSP_FLD32SET(reg, val,29, 30)
151
152/* field: RW - Read/Write. */
153#define TMS570_RTP_RAM1REG1_RW BSP_FLD32(28)
154
155/* field: BLOCKSIZE - These bits define the length of the trace region. */
156#define TMS570_RTP_RAM1REG1_BLOCKSIZE(val) BSP_FLD32(val,24, 27)
157#define TMS570_RTP_RAM1REG1_BLOCKSIZE_GET(reg) BSP_FLD32GET(reg,24, 27)
158#define TMS570_RTP_RAM1REG1_BLOCKSIZE_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
159
160/* field: STARTADDR - These bits define the starting address of the address region that should be traced. */
161#define TMS570_RTP_RAM1REG1_STARTADDR(val) BSP_FLD32(val,0, 17)
162#define TMS570_RTP_RAM1REG1_STARTADDR_GET(reg) BSP_FLD32GET(reg,0, 17)
163#define TMS570_RTP_RAM1REG1_STARTADDR_SET(reg,val) BSP_FLD32SET(reg, val,0, 17)
164
165
166/*---------------------TMS570_RTPRAM2REG1---------------------*/
167/* field: CPU_DMA - CPU and/or other master access. */
168#define TMS570_RTP_RAM2REG1_CPU_DMA(val) BSP_FLD32(val,29, 30)
169#define TMS570_RTP_RAM2REG1_CPU_DMA_GET(reg) BSP_FLD32GET(reg,29, 30)
170#define TMS570_RTP_RAM2REG1_CPU_DMA_SET(reg,val) BSP_FLD32SET(reg, val,29, 30)
171
172/* field: RW - Read/Write. */
173#define TMS570_RTP_RAM2REG1_RW BSP_FLD32(28)
174
175/* field: BLOCKSIZE - These bits define the length of the trace region. */
176#define TMS570_RTP_RAM2REG1_BLOCKSIZE(val) BSP_FLD32(val,24, 27)
177#define TMS570_RTP_RAM2REG1_BLOCKSIZE_GET(reg) BSP_FLD32GET(reg,24, 27)
178#define TMS570_RTP_RAM2REG1_BLOCKSIZE_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
179
180/* field: STARTADDR - These bits define the starting address of the address region that should be traced. */
181#define TMS570_RTP_RAM2REG1_STARTADDR(val) BSP_FLD32(val,0, 23)
182#define TMS570_RTP_RAM2REG1_STARTADDR_GET(reg) BSP_FLD32GET(reg,0, 23)
183#define TMS570_RTP_RAM2REG1_STARTADDR_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
184
185
186/*---------------------TMS570_RTPPERREG1---------------------*/
187/* field: CPU_DMA - CPU and/or other master access. */
188#define TMS570_RTP_PERREG1_CPU_DMA(val) BSP_FLD32(val,29, 30)
189#define TMS570_RTP_PERREG1_CPU_DMA_GET(reg) BSP_FLD32GET(reg,29, 30)
190#define TMS570_RTP_PERREG1_CPU_DMA_SET(reg,val) BSP_FLD32SET(reg, val,29, 30)
191
192/* field: RW - Read/Write. */
193#define TMS570_RTP_PERREG1_RW BSP_FLD32(28)
194
195/* field: BLOCKSIZE - These bits define the length of the trace region. */
196#define TMS570_RTP_PERREG1_BLOCKSIZE(val) BSP_FLD32(val,24, 27)
197#define TMS570_RTP_PERREG1_BLOCKSIZE_GET(reg) BSP_FLD32GET(reg,24, 27)
198#define TMS570_RTP_PERREG1_BLOCKSIZE_SET(reg,val) BSP_FLD32SET(reg, val,24, 27)
199
200/* field: STARTADDR - These bits define the starting address of the address region that should be traced. */
201#define TMS570_RTP_PERREG1_STARTADDR(val) BSP_FLD32(val,0, 23)
202#define TMS570_RTP_PERREG1_STARTADDR_GET(reg) BSP_FLD32GET(reg,0, 23)
203#define TMS570_RTP_PERREG1_STARTADDR_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
204
205
206/*-----------------------TMS570_RTPDDMW-----------------------*/
207/* field: DATA - This register must be written to in a Direct Data Mode write operation to store the data into */
208#define TMS570_RTP_DDMW_DATA(val) BSP_FLD32(val,0, 31)
209#define TMS570_RTP_DDMW_DATA_GET(reg) BSP_FLD32GET(reg,0, 31)
210#define TMS570_RTP_DDMW_DATA_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
211
212
213/*-----------------------TMS570_RTPPC0-----------------------*/
214/* field: ENAFUNC - Functional mode of RTPENA pin. */
215#define TMS570_RTP_PC0_ENAFUNC BSP_FLD32(18)
216
217/* field: CLKFUNC - Functional mode of RTPCLK pin. */
218#define TMS570_RTP_PC0_CLKFUNC BSP_FLD32(17)
219
220/* field: SYNCFUNC - Functional mode of RTPSYNC pin. */
221#define TMS570_RTP_PC0_SYNCFUNC BSP_FLD32(16)
222
223/* field: DATAFUNC - Functional mode of RTPDATA[15:0] pins. */
224#define TMS570_RTP_PC0_DATAFUNC(val) BSP_FLD32(val,0, 15)
225#define TMS570_RTP_PC0_DATAFUNC_GET(reg) BSP_FLD32GET(reg,0, 15)
226#define TMS570_RTP_PC0_DATAFUNC_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
227
228
229
230#endif /* LIBBSP_ARM_tms570_RTP */
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