source: rtems/c/src/lib/libbsp/arm/tms570/include/ti_herc/reg_pcr.h @ bea49c9

4.11
Last change on this file since bea49c9 was bea49c9, checked in by Premysl Houdek <kom541000@…>, on Jul 16, 2015 at 2:26:09 PM

bsp/tms570: New/generated header files for TMS570 SoC peripherals registers.

The header files are generated by script make_header.py.
Current script's version can be found at:

https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python

Registers offsets and fields have been extracted from reference manual.

Signed-off-by: Premysl Houdek <kom541000@…>

  • Property mode set to 100644
File size: 7.4 KB
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1/* The header file is generated by make_header.py from PCR.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 *    list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 *    this list of conditions and the following disclaimer in the documentation
22 *    and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_tms570_PCR
40#define LIBBSP_ARM_tms570_PCR
41
42#include <bsp/utility.h>
43
44typedef struct{
45  uint32_t PMPROTSET0;        /*Peripheral Memory Protection Set Register 0*/
46  uint32_t PMPROTSET1;        /*Peripheral Memory Protection Set Register 1*/
47  uint8_t reserved1 [8];
48  uint32_t PMPROTCLR0;        /*Peripheral Memory Protection Clear Register 0*/
49  uint32_t PMPROTCLR1;        /*Peripheral Memory Protection Clear Register 1*/
50  uint8_t reserved2 [8];
51  uint32_t PPROTSET0;         /*Peripheral Protection Set Register 0*/
52  uint32_t PPROTSET1;         /*Peripheral Protection Set Register 1*/
53  uint32_t PPROTSET2;         /*Peripheral Protection Set Register 2*/
54  uint32_t PPROTSET3;         /*Peripheral Protection Set Register 3*/
55  uint8_t reserved3 [16];
56  uint32_t PPROTCLR0;         /*Peripheral Protection Clear Register 0*/
57  uint32_t PPROTCLR1;         /*Peripheral Protection Clear Register 1*/
58  uint32_t PPROTCLR2;         /*Peripheral Protection Clear Register 2*/
59  uint32_t PPROTCLR3;         /*Peripheral Protection Clear Register 3*/
60  uint8_t reserved4 [16];
61  uint32_t PCSPWRDWNSET0;     /*Peripheral Memory Power-Down Set Register 0*/
62  uint32_t PCSPWRDWNSET1;     /*Peripheral Memory Power-Down Set Register 1*/
63  uint8_t reserved5 [8];
64  uint32_t PCSPWRDWNCLR0;     /*Peripheral Memory Power-Down Clear Register 0*/
65  uint32_t PCSPWRDWNCLR1;     /*Peripheral Memory Power-Down Clear Register 1*/
66  uint8_t reserved6 [8];
67  uint32_t PSPWRDWNSET0;      /*Peripheral Power-Down Set Register 0*/
68  uint32_t PSPWRDWNSET1;      /*Peripheral Power-Down Set Register 1*/
69  uint32_t PSPWRDWNSET2;      /*Peripheral Power-Down Set Register 2*/
70  uint32_t PSPWRDWNSET3;      /*Peripheral Power-Down Set Register 3*/
71  uint8_t reserved7 [16];
72  uint32_t PSPWRDWNCLR0;      /*Peripheral Power-Down Clear Register 0*/
73  uint32_t PSPWRDWNCLR1;      /*Peripheral Power-Down Clear Register 1*/
74  uint32_t PSPWRDWNCLR2;      /*Peripheral Power-Down Clear Register 2*/
75  uint32_t PSPWRDWNCLR3;      /*Peripheral Power-Down Clear Register 3*/
76} tms570_pcr_t;
77
78
79/*--------------------TMS570_PCRPMPROTSET0--------------------*/
80/* field: PCSPROTSET - Peripheral memory frame protection set. */
81#define TMS570_PCR_PMPROTSET0_PCSPROTSET(val) BSP_FLD32(val,0, 31)
82#define TMS570_PCR_PMPROTSET0_PCSPROTSET_GET(reg) BSP_FLD32GET(reg,0, 31)
83#define TMS570_PCR_PMPROTSET0_PCSPROTSET_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
84
85
86/*--------------------TMS570_PCRPMPROTSET1--------------------*/
87/* field: PCSPROTSET - Peripheral memory frame protection set. */
88#define TMS570_PCR_PMPROTSET1_PCSPROTSET(val) BSP_FLD32(val,0, 31)
89#define TMS570_PCR_PMPROTSET1_PCSPROTSET_GET(reg) BSP_FLD32GET(reg,0, 31)
90#define TMS570_PCR_PMPROTSET1_PCSPROTSET_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
91
92
93/*--------------------TMS570_PCRPMPROTCLR0--------------------*/
94/* field: PCSPROTCLR - Peripheral memory frame protection clear. */
95#define TMS570_PCR_PMPROTCLR0_PCSPROTCLR(val) BSP_FLD32(val,0, 31)
96#define TMS570_PCR_PMPROTCLR0_PCSPROTCLR_GET(reg) BSP_FLD32GET(reg,0, 31)
97#define TMS570_PCR_PMPROTCLR0_PCSPROTCLR_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
98
99
100/*--------------------TMS570_PCRPMPROTCLR1--------------------*/
101/* field: PCSPROTCLR - Peripheral memory frame protection clear. */
102#define TMS570_PCR_PMPROTCLR1_PCSPROTCLR(val) BSP_FLD32(val,0, 31)
103#define TMS570_PCR_PMPROTCLR1_PCSPROTCLR_GET(reg) BSP_FLD32GET(reg,0, 31)
104#define TMS570_PCR_PMPROTCLR1_PCSPROTCLR_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
105
106
107/*--------------------TMS570_PCRPPROTSET0--------------------*/
108/* field: PROTSET - Peripheral select quadrant protection set. */
109#define TMS570_PCR_PPROTSET0_PROTSET(val) BSP_FLD32(val,0, 31)
110#define TMS570_PCR_PPROTSET0_PROTSET_GET(reg) BSP_FLD32GET(reg,0, 31)
111#define TMS570_PCR_PPROTSET0_PROTSET_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
112
113
114/*--------------------TMS570_PCRPPROTCLR0--------------------*/
115/* field: PROTCLR - Peripheral select quadrant protection clear. */
116#define TMS570_PCR_PPROTCLR0_PROTCLR(val) BSP_FLD32(val,0, 31)
117#define TMS570_PCR_PPROTCLR0_PROTCLR_GET(reg) BSP_FLD32GET(reg,0, 31)
118#define TMS570_PCR_PPROTCLR0_PROTCLR_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
119
120
121/*------------------TMS570_PCRPCSPWRDWNSET0------------------*/
122/* field: PWRDNSET - Peripheral memory clock power-down set. */
123#define TMS570_PCR_PCSPWRDWNSET0_PWRDNSET(val) BSP_FLD32(val,0, 31)
124#define TMS570_PCR_PCSPWRDWNSET0_PWRDNSET_GET(reg) BSP_FLD32GET(reg,0, 31)
125#define TMS570_PCR_PCSPWRDWNSET0_PWRDNSET_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
126
127
128/*------------------TMS570_PCRPCSPWRDWNCLR0------------------*/
129/* field: PWRDNCLR - Peripheral memory clock power-down clear. */
130#define TMS570_PCR_PCSPWRDWNCLR0_PWRDNCLR(val) BSP_FLD32(val,0, 31)
131#define TMS570_PCR_PCSPWRDWNCLR0_PWRDNCLR_GET(reg) BSP_FLD32GET(reg,0, 31)
132#define TMS570_PCR_PCSPWRDWNCLR0_PWRDNCLR_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
133
134
135/*-------------------TMS570_PCRPSPWRDWNSET0-------------------*/
136/* field: PWRDWNSET - Peripheral select quadrant clock power-down set. */
137#define TMS570_PCR_PSPWRDWNSET0_PWRDWNSET(val) BSP_FLD32(val,0, 31)
138#define TMS570_PCR_PSPWRDWNSET0_PWRDWNSET_GET(reg) BSP_FLD32GET(reg,0, 31)
139#define TMS570_PCR_PSPWRDWNSET0_PWRDWNSET_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
140
141
142/*-------------------TMS570_PCRPSPWRDWNCLR0-------------------*/
143/* field: PWRDWNCLR - Peripheral select quadrant clock power-down clear. */
144#define TMS570_PCR_PSPWRDWNCLR0_PWRDWNCLR(val) BSP_FLD32(val,0, 31)
145#define TMS570_PCR_PSPWRDWNCLR0_PWRDWNCLR_GET(reg) BSP_FLD32GET(reg,0, 31)
146#define TMS570_PCR_PSPWRDWNCLR0_PWRDWNCLR_SET(reg,val) BSP_FLD32SET(reg, val,0, 31)
147
148
149
150#endif /* LIBBSP_ARM_tms570_PCR */
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