source: rtems/c/src/lib/libbsp/arm/tms570/include/ti_herc/reg_lin.h @ e56090ef

5
Last change on this file since e56090ef was d6c67ad5, checked in by Premysl Houdek <kom541000@…>, on 07/17/15 at 15:04:05

bsp/tms570: skipped 32bit field definitions and corrected single bit fields

there is no need to define access macros for field covering
whole registers. In addition, BSP_FLD32 does not work right
for field 32bit length.

Signed-off-by: Premysl Houdek <kom541000@…>
  • Property mode set to 100644
File size: 25.8 KB
Line 
1/* The header file is generated by make_header.py from LIN.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 *    list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 *    this list of conditions and the following disclaimer in the documentation
22 *    and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_TMS570_LIN
40#define LIBBSP_ARM_TMS570_LIN
41
42#include <bsp/utility.h>
43
44typedef struct{
45  uint32_t GCR0;              /*SCI Global Control Register 0*/
46  uint32_t GCR1;              /*SCI Global Control Register 1*/
47  uint32_t GCR2;              /*SCI Global Control Register 2*/
48  uint32_t SETINT;            /*SCI Set Interrupt Register*/
49  uint32_t CLEARINT;          /*SCI Clear Interrupt Register*/
50  uint32_t SETINTLVL;         /*SCI Set Interrupt Level Register*/
51  uint32_t CLEARINTLVL;       /*SCI Clear Interrupt Level Register*/
52  uint32_t FLR;               /*SCI Flags Register*/
53  uint32_t INTVECT0;          /*SCI Interrupt Vector Offset 0*/
54  uint32_t INTVECT1;          /*SCI Interrupt Vector Offset 1*/
55  uint32_t FORMAT;            /*SCI Format Control Register*/
56  uint32_t BRS;               /*Baud Rate Selection Register*/
57  uint32_t ED;                /*Receiver Emulation Data Buffer*/
58  uint32_t RD;                /*Receiver Data Buffer*/
59  uint32_t TD;                /*Transmit Data Buffer*/
60  uint32_t PIO0;              /*SCI Pin I/O Control Register 0*/
61  uint32_t PIO1;              /*SCI Pin I/O Control Register 1*/
62  uint32_t PIO2;              /*SCI Pin I/O Control Register 2*/
63  uint32_t PIO3;              /*SCI Pin I/O Control Register 3*/
64  uint32_t PIO4;              /*SCI Pin I/O Control Register 4*/
65  uint32_t PIO5;              /*SCI Pin I/O Control Register 5*/
66  uint32_t PIO6;              /*SCI Pin I/O Control Register 6*/
67  uint32_t PIO7;              /*SCI Pin I/O Control Register 7*/
68  uint32_t PIO8;              /*SCI Pin I/O Control Register 8*/
69  uint32_t COMP;              /*LIN Compare Register*/
70  uint32_t RD0;               /*LIN Receive Buffer 0 Register*/
71  uint32_t RD1;               /*LIN Receive Buffer 1 Register*/
72  uint32_t MASK;              /*LIN Mask Register*/
73  uint32_t ID;                /*LIN Identification Register*/
74  uint32_t TD0;               /*LIN Transmit Buffer 0*/
75  uint32_t TD1;               /*LIN Transmit Buffer 1*/
76  uint32_t MBRSR;             /*Maximum Baud Rate Selection Register*/
77  uint8_t reserved1 [16];
78  uint32_t IODFTCTRL;         /*Input/Output Error Enable Register*/
79} tms570_lin_t;
80
81
82/*----------------------TMS570_LIN_GCR0----------------------*/
83/* field: Reserved - Read returns 0. Writes have no effect. */
84#define TMS570_LIN_GCR0_Reserved(val) BSP_FLD32(val,1, 31)
85#define TMS570_LIN_GCR0_Reserved_GET(reg) BSP_FLD32GET(reg,1, 31)
86#define TMS570_LIN_GCR0_Reserved_SET(reg,val) BSP_FLD32SET(reg, val,1, 31)
87
88/* field: RESET - This bit resets the SCI module. */
89#define TMS570_LIN_GCR0_RESET BSP_BIT32(0)
90
91
92/*----------------------TMS570_LIN_GCR1----------------------*/
93/* field: TXENA - Transmit enable. */
94#define TMS570_LIN_GCR1_TXENA BSP_BIT32(25)
95
96/* field: RXENA - Receive enable. RXENA allows or prevents the transfer of data from SCIRXSHF to SCIRD. */
97#define TMS570_LIN_GCR1_RXENA BSP_BIT32(24)
98
99/* field: CONT - Continue on suspend. */
100#define TMS570_LIN_GCR1_CONT BSP_BIT32(17)
101
102/* field: LOOP_BACK - Loopback bit. The self-checking option for the SCI can be selected with this bit. */
103#define TMS570_LIN_GCR1_LOOP_BACK BSP_BIT32(16)
104
105/* field: POWERDOWN - If the POWERDOWN bit is set while the receiver is actively receiving data and the wake-up */
106#define TMS570_LIN_GCR1_POWERDOWN BSP_BIT32(9)
107
108/* field: SLEEP - SCI sleep. In a multiprocessor configuration, this bit controls the receive sleep function. */
109#define TMS570_LIN_GCR1_SLEEP BSP_BIT32(8)
110
111/* field: SWnRST - Software reset (active low). This bit is effective in LIN and SCI modes. */
112#define TMS570_LIN_GCR1_SWnRST BSP_BIT32(7)
113
114/* field: CLOCK - CLOCK */
115#define TMS570_LIN_GCR1_CLOCK BSP_BIT32(5)
116
117/* field: STOP - SCI number of stop bits per frame. */
118#define TMS570_LIN_GCR1_STOP BSP_BIT32(4)
119
120/* field: PARITY - SCI parity odd/even selection. If the PARITY ENA bit is set, PARITY designates odd or even parity. */
121#define TMS570_LIN_GCR1_PARITY BSP_BIT32(3)
122
123/* field: PARITY_ENA - Parity enable. This bit enables or disables the parity function. */
124#define TMS570_LIN_GCR1_PARITY_ENA BSP_BIT32(2)
125
126/* field: TIMING_MODE - SCI timing mode bit. */
127#define TMS570_LIN_GCR1_TIMING_MODE BSP_BIT32(1)
128
129/* field: COMM_MODE - SCI communication mode bit. */
130#define TMS570_LIN_GCR1_COMM_MODE BSP_BIT32(0)
131
132
133/*----------------------TMS570_LIN_GCR2----------------------*/
134/* field: CC - Compare checksum. LIN mode only. */
135#define TMS570_LIN_GCR2_CC BSP_BIT32(17)
136
137/* field: SC - Send checksum byte. This bit is effective in LIN mode only. */
138#define TMS570_LIN_GCR2_SC BSP_BIT32(16)
139
140/* field: GEN_WU - Generate wakeup signal. This bit is effective in LIN mode only. */
141#define TMS570_LIN_GCR2_GEN_WU BSP_BIT32(8)
142
143/* field: POWERDOWN - Power down. This bit is effective in LIN or SCI mode. */
144#define TMS570_LIN_GCR2_POWERDOWN BSP_BIT32(0)
145
146
147/*---------------------TMS570_LIN_SETINT---------------------*/
148/* field: SET_FE_INT -  */
149#define TMS570_LIN_SETINT_SET_FE_INT BSP_BIT32(26)
150
151/* field: SET_OE_INT - SET OE INT */
152#define TMS570_LIN_SETINT_SET_OE_INT BSP_BIT32(25)
153
154/* field: SET_PE_INT - Set parity interrupt. */
155#define TMS570_LIN_SETINT_SET_PE_INT BSP_BIT32(24)
156
157/* field: SET_RX_DMA_ALL - SET RX DMA ALL */
158#define TMS570_LIN_SETINT_SET_RX_DMA_ALL BSP_BIT32(18)
159
160/* field: SET_RX_DMA - SET RX DMA */
161#define TMS570_LIN_SETINT_SET_RX_DMA BSP_BIT32(17)
162
163/* field: SET_TX_DMA - Set transmit DMA. To enable DMA requests for the transmitter, this bit must be set. */
164#define TMS570_LIN_SETINT_SET_TX_DMA BSP_BIT32(16)
165
166/* field: SET_RX_INT - SET RX INT */
167#define TMS570_LIN_SETINT_SET_RX_INT BSP_BIT32(9)
168
169/* field: SET_TX_INT - Set transmitter interrupt. */
170#define TMS570_LIN_SETINT_SET_TX_INT BSP_BIT32(8)
171
172/* field: SET_WAKEUP_INT - Set wakeup interrupt. */
173#define TMS570_LIN_SETINT_SET_WAKEUP_INT BSP_BIT32(1)
174
175/* field: SET_BRKDT_INT - Set breakdetect interrupt. */
176#define TMS570_LIN_SETINT_SET_BRKDT_INT BSP_BIT32(0)
177
178
179/*--------------------TMS570_LIN_CLEARINT--------------------*/
180/* field: CLR_FE_INT - Clear framing-error interrupt. This bit disables the framing-error interrupt when set. */
181#define TMS570_LIN_CLEARINT_CLR_FE_INT BSP_BIT32(26)
182
183/* field: CLR_CE_INT - Clear overrun-error interrupt. This bit disables the SCI overrun error interrupt when set. */
184#define TMS570_LIN_CLEARINT_CLR_CE_INT BSP_BIT32(25)
185
186/* field: CLR_PE_INT - Clear parity interrupt. This bit disables the parity error interrupt when set. */
187#define TMS570_LIN_CLEARINT_CLR_PE_INT BSP_BIT32(24)
188
189/* field: CLR_RX_DMA_ALL - Clear receive DMA all. This bit clears the receive DMA request for address frames when set. */
190#define TMS570_LIN_CLEARINT_CLR_RX_DMA_ALL BSP_BIT32(18)
191
192/* field: CLR_RX_DMA - Clear receive DMA request. This bit disables the receive DMA request when set. */
193#define TMS570_LIN_CLEARINT_CLR_RX_DMA BSP_BIT32(17)
194
195/* field: CLR_TX_DMA - CLR TX DMA */
196#define TMS570_LIN_CLEARINT_CLR_TX_DMA BSP_BIT32(16)
197
198/* field: CLR_RX_INT - Clear receiver interrupt. This bit disables the receiver interrupt when set. */
199#define TMS570_LIN_CLEARINT_CLR_RX_INT BSP_BIT32(9)
200
201/* field: CLR_TX_INT - Clear transmitter interrupt. This bit disables the transmitter interrupt when set. */
202#define TMS570_LIN_CLEARINT_CLR_TX_INT BSP_BIT32(8)
203
204/* field: CLR_WAKEUP_INT - Clear wakeup interrupt. This bit disables the wakeup interrupt when set. */
205#define TMS570_LIN_CLEARINT_CLR_WAKEUP_INT BSP_BIT32(1)
206
207/* field: CLR_BRKDT_INT - Clear breakdetect interrupt. This bit disables the break-detect interrupt when set. */
208#define TMS570_LIN_CLEARINT_CLR_BRKDT_INT BSP_BIT32(0)
209
210
211/*--------------------TMS570_LIN_SETINTLVL--------------------*/
212/* field: SET_FE_INT_LVL - Set framing-error interrupt level. */
213#define TMS570_LIN_SETINTLVL_SET_FE_INT_LVL BSP_BIT32(26)
214
215/* field: SET_CE_INT_LVL - Set overrun-error interrupt level. */
216#define TMS570_LIN_SETINTLVL_SET_CE_INT_LVL BSP_BIT32(25)
217
218/* field: SET_PE_INT_LVL - Set parity error interrupt level. */
219#define TMS570_LIN_SETINTLVL_SET_PE_INT_LVL BSP_BIT32(24)
220
221/* field: SET_RX_DMA_ALL_LVL - Set receive DMA all interrupt levels. */
222#define TMS570_LIN_SETINTLVL_SET_RX_DMA_ALL_LVL BSP_BIT32(18)
223
224/* field: SET_RX_INT_LVL - Set receiver interrupt level. */
225#define TMS570_LIN_SETINTLVL_SET_RX_INT_LVL BSP_BIT32(9)
226
227/* field: SET_TX_INT_LVL - Set transmitter interrupt level. */
228#define TMS570_LIN_SETINTLVL_SET_TX_INT_LVL BSP_BIT32(8)
229
230/* field: SET_WAKEUP_INT_LVL - Set wakeup interrupt level. */
231#define TMS570_LIN_SETINTLVL_SET_WAKEUP_INT_LVL BSP_BIT32(1)
232
233/* field: SET_BRKDT_INT_LVL - SET BRKDT INT LVL */
234#define TMS570_LIN_SETINTLVL_SET_BRKDT_INT_LVL BSP_BIT32(0)
235
236
237/*-------------------TMS570_LIN_CLEARINTLVL-------------------*/
238/* field: CLR_FE_INT_LVL - Clear framing-error interrupt. */
239#define TMS570_LIN_CLEARINTLVL_CLR_FE_INT_LVL BSP_BIT32(26)
240
241/* field: CLR_CE_INT_LVL - CLR CE INT LVL */
242#define TMS570_LIN_CLEARINTLVL_CLR_CE_INT_LVL BSP_BIT32(25)
243
244/* field: CLR_CE_INT_LVL - CLR CE INT LVL */
245#define TMS570_LIN_CLEARINTLVL_CLR_CE_INT_LVL BSP_BIT32(25)
246
247/* field: CLR_PE_INT_LVL -  */
248#define TMS570_LIN_CLEARINTLVL_CLR_PE_INT_LVL BSP_BIT32(24)
249
250/* field: CLR_RX_DMA_ALL_LVL - Clear receive DMA interrupt level. */
251#define TMS570_LIN_CLEARINTLVL_CLR_RX_DMA_ALL_LVL BSP_BIT32(18)
252
253/* field: CLR_RX_INT_LVL - Clear receiver interrupt. */
254#define TMS570_LIN_CLEARINTLVL_CLR_RX_INT_LVL BSP_BIT32(9)
255
256/* field: 8 - CLR TX INT LVL Clear transmitter interrupt. */
257#define TMS570_LIN_CLEARINTLVL_8 BSP_BIT32(8)
258
259/* field: CLR_WAKEUP_INT_LVL - Clear wakeup interrupt. */
260#define TMS570_LIN_CLEARINTLVL_CLR_WAKEUP_INT_LVL BSP_BIT32(1)
261
262/* field: CLR_BRKDT_INT_LVL - Clear breakdetect interrupt. */
263#define TMS570_LIN_CLEARINTLVL_CLR_BRKDT_INT_LVL BSP_BIT32(0)
264
265
266/*-----------------------TMS570_LIN_FLR-----------------------*/
267/* field: FE - Framing error flag. This bit is effective in LIN or SCI-compatible mode. */
268#define TMS570_LIN_FLR_FE BSP_BIT32(26)
269
270/* field: OE - Overrun error flag. */
271#define TMS570_LIN_FLR_OE BSP_BIT32(25)
272
273/* field: PE - Parity error flag. This bit is set when a parity error is detected in the received data. */
274#define TMS570_LIN_FLR_PE BSP_BIT32(24)
275
276/* field: RXWAKE - Receiver wakeup detect flag. */
277#define TMS570_LIN_FLR_RXWAKE BSP_BIT32(12)
278
279/* field: TX_EMPTY - Transmitter empty flag. */
280#define TMS570_LIN_FLR_TX_EMPTY BSP_BIT32(11)
281
282/* field: TXWAKE - Transmitter wakeup method select. */
283#define TMS570_LIN_FLR_TXWAKE BSP_BIT32(10)
284
285/* field: RXRDY - Receiver ready flag. */
286#define TMS570_LIN_FLR_RXRDY BSP_BIT32(9)
287
288/* field: TXRDY - Transmitter buffer register ready flag. */
289#define TMS570_LIN_FLR_TXRDY BSP_BIT32(8)
290
291/* field: BUSY - Bus busy flag. TThis bit indicates whether the receiver is in the process of receiving a frame. */
292#define TMS570_LIN_FLR_BUSY BSP_BIT32(3)
293
294/* field: IDLE - SCI receiver in idle state. */
295#define TMS570_LIN_FLR_IDLE BSP_BIT32(2)
296
297/* field: WAKEUP - Wakeup flag. */
298#define TMS570_LIN_FLR_WAKEUP BSP_BIT32(1)
299
300/* field: BRKDT - SCI break-detect flag. This bit is set when the SCI detects a break condition on the LINRX pin. */
301#define TMS570_LIN_FLR_BRKDT BSP_BIT32(0)
302
303
304/*--------------------TMS570_LIN_INTVECT0--------------------*/
305/* field: INVECT0 - Interrupt vector offset for INT0. This register indicates the offset for interrupt line INT0. */
306#define TMS570_LIN_INTVECT0_INVECT0(val) BSP_FLD32(val,0, 3)
307#define TMS570_LIN_INTVECT0_INVECT0_GET(reg) BSP_FLD32GET(reg,0, 3)
308#define TMS570_LIN_INTVECT0_INVECT0_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
309
310
311/*--------------------TMS570_LIN_INTVECT1--------------------*/
312/* field: INVECT1 - Interrupt vector offset for INT1. This register indicates the offset for interrupt line INT1. */
313#define TMS570_LIN_INTVECT1_INVECT1(val) BSP_FLD32(val,0, 3)
314#define TMS570_LIN_INTVECT1_INVECT1_GET(reg) BSP_FLD32GET(reg,0, 3)
315#define TMS570_LIN_INTVECT1_INVECT1_SET(reg,val) BSP_FLD32SET(reg, val,0, 3)
316
317
318/*---------------------TMS570_LIN_FORMAT---------------------*/
319/* field: CHAR - Character length control bits. These bits set the SCI character length from 1 to 8 bits. */
320#define TMS570_LIN_FORMAT_CHAR(val) BSP_FLD32(val,0, 2)
321#define TMS570_LIN_FORMAT_CHAR_GET(reg) BSP_FLD32GET(reg,0, 2)
322#define TMS570_LIN_FORMAT_CHAR_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
323
324
325/*-----------------------TMS570_LIN_BRS-----------------------*/
326/* field: BAUD - SCI 24-bit baud selection. */
327#define TMS570_LIN_BRS_BAUD(val) BSP_FLD32(val,0, 23)
328#define TMS570_LIN_BRS_BAUD_GET(reg) BSP_FLD32GET(reg,0, 23)
329#define TMS570_LIN_BRS_BAUD_SET(reg,val) BSP_FLD32SET(reg, val,0, 23)
330
331
332/*-----------------------TMS570_LIN_ED-----------------------*/
333/* field: ED - Emulator data. Reading SCIED[7:0] does not clear the RXRDY flag, unlike reading SCIRD. */
334#define TMS570_LIN_ED_ED(val) BSP_FLD32(val,0, 7)
335#define TMS570_LIN_ED_ED_GET(reg) BSP_FLD32GET(reg,0, 7)
336#define TMS570_LIN_ED_ED_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
337
338
339/*-----------------------TMS570_LIN_RD-----------------------*/
340/* field: RD - Receiver data. */
341#define TMS570_LIN_RD_RD(val) BSP_FLD32(val,0, 7)
342#define TMS570_LIN_RD_RD_GET(reg) BSP_FLD32GET(reg,0, 7)
343#define TMS570_LIN_RD_RD_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
344
345
346/*-----------------------TMS570_LIN_TD-----------------------*/
347/* field: TD - Transmit data. Data to be transmitted is written to the SCITD register. */
348#define TMS570_LIN_TD_TD(val) BSP_FLD32(val,0, 7)
349#define TMS570_LIN_TD_TD_GET(reg) BSP_FLD32GET(reg,0, 7)
350#define TMS570_LIN_TD_TD_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
351
352
353/*----------------------TMS570_LIN_PIO0----------------------*/
354/* field: TX_FUNC - Transfer function. This bit defines the function of pin SCITX. */
355#define TMS570_LIN_PIO0_TX_FUNC BSP_BIT32(2)
356
357/* field: RX_FUNC - Receive function.This bit defines the function of pin SCIRX. */
358#define TMS570_LIN_PIO0_RX_FUNC BSP_BIT32(1)
359
360
361/*----------------------TMS570_LIN_PIO1----------------------*/
362/* field: TX_DIR - Transmit pin direction. */
363#define TMS570_LIN_PIO1_TX_DIR BSP_BIT32(2)
364
365/* field: RX_DIR - Receive pin direction. */
366#define TMS570_LIN_PIO1_RX_DIR BSP_BIT32(1)
367
368
369/*----------------------TMS570_LIN_PIO2----------------------*/
370/* field: TX_IN - Transmit pin in. This bit contains the current value on the SCITX pin. */
371#define TMS570_LIN_PIO2_TX_IN BSP_BIT32(2)
372
373/* field: RX_IN - Receive pin in. This bit contains the current value on the SCIRX pin. */
374#define TMS570_LIN_PIO2_RX_IN BSP_BIT32(1)
375
376
377/*----------------------TMS570_LIN_PIO3----------------------*/
378/* field: TX_OUT - Transmit pin out. */
379#define TMS570_LIN_PIO3_TX_OUT BSP_BIT32(2)
380
381/* field: RX_OUT - Receive pin out. */
382#define TMS570_LIN_PIO3_RX_OUT BSP_BIT32(1)
383
384
385/*----------------------TMS570_LIN_PIO4----------------------*/
386/* field: TX_SET - Transmit pin set. */
387#define TMS570_LIN_PIO4_TX_SET BSP_BIT32(2)
388
389/* field: RX_SET - Receive pin set. */
390#define TMS570_LIN_PIO4_RX_SET BSP_BIT32(1)
391
392
393/*----------------------TMS570_LIN_PIO5----------------------*/
394/* field: TX_CLR - Transmit pin clear. */
395#define TMS570_LIN_PIO5_TX_CLR BSP_BIT32(2)
396
397/* field: RX_CLR - Receive pin clear. */
398#define TMS570_LIN_PIO5_RX_CLR BSP_BIT32(1)
399
400
401/*----------------------TMS570_LIN_PIO6----------------------*/
402/* field: TX_PDR - Transmit pin open drain enable. */
403#define TMS570_LIN_PIO6_TX_PDR BSP_BIT32(2)
404
405/* field: RX_PDR - Receive pin open drain enable. */
406#define TMS570_LIN_PIO6_RX_PDR BSP_BIT32(1)
407
408
409/*----------------------TMS570_LIN_PIO7----------------------*/
410/* field: TX_PD - Transmit pin pull control disable. This bit disables pull control capability on the input pin SCITX. */
411#define TMS570_LIN_PIO7_TX_PD BSP_BIT32(2)
412
413/* field: RX_PD - Receive pin pull control disable. This bit disables pull control capability on the input pin SCIRX. */
414#define TMS570_LIN_PIO7_RX_PD BSP_BIT32(1)
415
416
417/*----------------------TMS570_LIN_PIO8----------------------*/
418/* field: TX_PSL - TX pin pull select. This bit selects pull type in the input pin SCITX. */
419#define TMS570_LIN_PIO8_TX_PSL BSP_BIT32(2)
420
421/* field: RX_PSL - RX pin pull select. This bit selects pull type in the input pin SCIRX. */
422#define TMS570_LIN_PIO8_RX_PSL BSP_BIT32(1)
423
424
425/*----------------------TMS570_LIN_COMP----------------------*/
426/* field: SDEL - 2-bit synch delimiter compare. These bits are effective in LIN mode only. */
427#define TMS570_LIN_COMP_SDEL(val) BSP_FLD32(val,8, 9)
428#define TMS570_LIN_COMP_SDEL_GET(reg) BSP_FLD32GET(reg,8, 9)
429#define TMS570_LIN_COMP_SDEL_SET(reg,val) BSP_FLD32SET(reg, val,8, 9)
430
431/* field: SBREAK - Synch break extend. These bits are effective in LIN mode only. */
432#define TMS570_LIN_COMP_SBREAK(val) BSP_FLD32(val,0, 2)
433#define TMS570_LIN_COMP_SBREAK_GET(reg) BSP_FLD32GET(reg,0, 2)
434#define TMS570_LIN_COMP_SBREAK_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
435
436
437/*-----------------------TMS570_LIN_RD0-----------------------*/
438/* field: RD0 - Receive buffer 0. Byte 0 of the response data byte. */
439#define TMS570_LIN_RD0_RD0(val) BSP_FLD32(val,24, 31)
440#define TMS570_LIN_RD0_RD0_GET(reg) BSP_FLD32GET(reg,24, 31)
441#define TMS570_LIN_RD0_RD0_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
442
443/* field: RD1 - Receive buffer 1. Byte 1 of the response data byte. */
444#define TMS570_LIN_RD0_RD1(val) BSP_FLD32(val,16, 23)
445#define TMS570_LIN_RD0_RD1_GET(reg) BSP_FLD32GET(reg,16, 23)
446#define TMS570_LIN_RD0_RD1_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
447
448/* field: RD2 - Receive buffer 2. Byte 2 of the response data byte. */
449#define TMS570_LIN_RD0_RD2(val) BSP_FLD32(val,8, 15)
450#define TMS570_LIN_RD0_RD2_GET(reg) BSP_FLD32GET(reg,8, 15)
451#define TMS570_LIN_RD0_RD2_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
452
453/* field: RD3 - Receive buffer 3. Byte 3 of the response data byte. */
454#define TMS570_LIN_RD0_RD3(val) BSP_FLD32(val,0, 7)
455#define TMS570_LIN_RD0_RD3_GET(reg) BSP_FLD32GET(reg,0, 7)
456#define TMS570_LIN_RD0_RD3_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
457
458
459/*-----------------------TMS570_LIN_RD1-----------------------*/
460/* field: RD4 - Receive buffer 4. Byte 4 of the response data byte. */
461#define TMS570_LIN_RD1_RD4(val) BSP_FLD32(val,24, 31)
462#define TMS570_LIN_RD1_RD4_GET(reg) BSP_FLD32GET(reg,24, 31)
463#define TMS570_LIN_RD1_RD4_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
464
465/* field: RD5 - Receive buffer 5. Byte 5 of the response data byte. */
466#define TMS570_LIN_RD1_RD5(val) BSP_FLD32(val,16, 23)
467#define TMS570_LIN_RD1_RD5_GET(reg) BSP_FLD32GET(reg,16, 23)
468#define TMS570_LIN_RD1_RD5_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
469
470/* field: RD6 - Receive buffer 6. Byte 6 of the response data byte. */
471#define TMS570_LIN_RD1_RD6(val) BSP_FLD32(val,8, 15)
472#define TMS570_LIN_RD1_RD6_GET(reg) BSP_FLD32GET(reg,8, 15)
473#define TMS570_LIN_RD1_RD6_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
474
475/* field: RD7 - Receive buffer 7. Byte 7 of the response data byte. */
476#define TMS570_LIN_RD1_RD7(val) BSP_FLD32(val,0, 7)
477#define TMS570_LIN_RD1_RD7_GET(reg) BSP_FLD32GET(reg,0, 7)
478#define TMS570_LIN_RD1_RD7_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
479
480
481/*----------------------TMS570_LIN_MASK----------------------*/
482/* field: RX_ID_MASK - Receive ID mask. These bits are effective in LIN mode only. */
483#define TMS570_LIN_MASK_RX_ID_MASK(val) BSP_FLD32(val,16, 23)
484#define TMS570_LIN_MASK_RX_ID_MASK_GET(reg) BSP_FLD32GET(reg,16, 23)
485#define TMS570_LIN_MASK_RX_ID_MASK_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
486
487/* field: TX_ID_MASK - Transmit ID mask. These bits are effective in LIN mode only. */
488#define TMS570_LIN_MASK_TX_ID_MASK(val) BSP_FLD32(val,0, 7)
489#define TMS570_LIN_MASK_TX_ID_MASK_GET(reg) BSP_FLD32GET(reg,0, 7)
490#define TMS570_LIN_MASK_TX_ID_MASK_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
491
492
493/*-----------------------TMS570_LIN_ID-----------------------*/
494/* field: RECEIVED_ID - Received identification. These bits are effective in LIN mode only. */
495#define TMS570_LIN_ID_RECEIVED_ID(val) BSP_FLD32(val,16, 23)
496#define TMS570_LIN_ID_RECEIVED_ID_GET(reg) BSP_FLD32GET(reg,16, 23)
497#define TMS570_LIN_ID_RECEIVED_ID_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
498
499/* field: ID_SLAVETASK_BYTE - ID-SlaveTask Byte. These bits are effective in LIN mode only. */
500#define TMS570_LIN_ID_ID_SLAVETASK_BYTE(val) BSP_FLD32(val,8, 15)
501#define TMS570_LIN_ID_ID_SLAVETASK_BYTE_GET(reg) BSP_FLD32GET(reg,8, 15)
502#define TMS570_LIN_ID_ID_SLAVETASK_BYTE_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
503
504/* field: ID_BYTE - ID byte. This field is effective in LIN mode only. This byte is the LIN mode message ID. */
505#define TMS570_LIN_ID_ID_BYTE(val) BSP_FLD32(val,0, 7)
506#define TMS570_LIN_ID_ID_BYTE_GET(reg) BSP_FLD32GET(reg,0, 7)
507#define TMS570_LIN_ID_ID_BYTE_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
508
509
510/*-----------------------TMS570_LIN_TD0-----------------------*/
511/* field: TD0 - 8-Bit transmit buffer 0. */
512#define TMS570_LIN_TD0_TD0(val) BSP_FLD32(val,24, 31)
513#define TMS570_LIN_TD0_TD0_GET(reg) BSP_FLD32GET(reg,24, 31)
514#define TMS570_LIN_TD0_TD0_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
515
516/* field: TD1 - 8-Bit transmit buffer 1. */
517#define TMS570_LIN_TD0_TD1(val) BSP_FLD32(val,16, 23)
518#define TMS570_LIN_TD0_TD1_GET(reg) BSP_FLD32GET(reg,16, 23)
519#define TMS570_LIN_TD0_TD1_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
520
521/* field: TD2 - 8-Bit transmit buffer 2. */
522#define TMS570_LIN_TD0_TD2(val) BSP_FLD32(val,8, 15)
523#define TMS570_LIN_TD0_TD2_GET(reg) BSP_FLD32GET(reg,8, 15)
524#define TMS570_LIN_TD0_TD2_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
525
526/* field: TD3 - 8-Bit transmit buffer 3. */
527#define TMS570_LIN_TD0_TD3(val) BSP_FLD32(val,0, 7)
528#define TMS570_LIN_TD0_TD3_GET(reg) BSP_FLD32GET(reg,0, 7)
529#define TMS570_LIN_TD0_TD3_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
530
531
532/*-----------------------TMS570_LIN_TD1-----------------------*/
533/* field: TD4 - 8-Bit transmit buffer 4. */
534#define TMS570_LIN_TD1_TD4(val) BSP_FLD32(val,24, 31)
535#define TMS570_LIN_TD1_TD4_GET(reg) BSP_FLD32GET(reg,24, 31)
536#define TMS570_LIN_TD1_TD4_SET(reg,val) BSP_FLD32SET(reg, val,24, 31)
537
538/* field: TD5 - 8-Bit transmit buffer 5. */
539#define TMS570_LIN_TD1_TD5(val) BSP_FLD32(val,16, 23)
540#define TMS570_LIN_TD1_TD5_GET(reg) BSP_FLD32GET(reg,16, 23)
541#define TMS570_LIN_TD1_TD5_SET(reg,val) BSP_FLD32SET(reg, val,16, 23)
542
543/* field: TD6 - 8-Bit transmit buffer 6. */
544#define TMS570_LIN_TD1_TD6(val) BSP_FLD32(val,8, 15)
545#define TMS570_LIN_TD1_TD6_GET(reg) BSP_FLD32GET(reg,8, 15)
546#define TMS570_LIN_TD1_TD6_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
547
548/* field: TD7 - 8-Bit transmit buffer 7. */
549#define TMS570_LIN_TD1_TD7(val) BSP_FLD32(val,0, 7)
550#define TMS570_LIN_TD1_TD7_GET(reg) BSP_FLD32GET(reg,0, 7)
551#define TMS570_LIN_TD1_TD7_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
552
553
554/*----------------------TMS570_LIN_MBRSR----------------------*/
555/* field: MBR - Maximum baud rate prescaler. This bit is effective in LIN mode only. */
556#define TMS570_LIN_MBRSR_MBR(val) BSP_FLD32(val,0, 12)
557#define TMS570_LIN_MBRSR_MBR_GET(reg) BSP_FLD32GET(reg,0, 12)
558#define TMS570_LIN_MBRSR_MBR_SET(reg,val) BSP_FLD32SET(reg, val,0, 12)
559
560
561/*--------------------TMS570_LIN_IODFTCTRL--------------------*/
562/* field: FEN - Frame error enable. This bit is used to create a frame error. */
563#define TMS570_LIN_IODFTCTRL_FEN BSP_BIT32(26)
564
565/* field: PEN - Parity error enable. This bit is used to create a parity error. */
566#define TMS570_LIN_IODFTCTRL_PEN BSP_BIT32(25)
567
568/* field: BRKD_TENA - Break detect error enable. This bit is used to create a BRKDT error. */
569#define TMS570_LIN_IODFTCTRL_BRKD_TENA BSP_BIT32(24)
570
571/* field: PIN_SAMPLE_MASK - Pin sample mask. */
572#define TMS570_LIN_IODFTCTRL_PIN_SAMPLE_MASK(val) BSP_FLD32(val,19, 20)
573#define TMS570_LIN_IODFTCTRL_PIN_SAMPLE_MASK_GET(reg) BSP_FLD32GET(reg,19, 20)
574#define TMS570_LIN_IODFTCTRL_PIN_SAMPLE_MASK_SET(reg,val) BSP_FLD32SET(reg, val,19, 20)
575
576/* field: TX_SHIFT - Transmit shift. */
577#define TMS570_LIN_IODFTCTRL_TX_SHIFT(val) BSP_FLD32(val,16, 18)
578#define TMS570_LIN_IODFTCTRL_TX_SHIFT_GET(reg) BSP_FLD32GET(reg,16, 18)
579#define TMS570_LIN_IODFTCTRL_TX_SHIFT_SET(reg,val) BSP_FLD32SET(reg, val,16, 18)
580
581/* field: IODFTENA - IODFT enable key. Write access permitted in Privilege mode only. */
582#define TMS570_LIN_IODFTCTRL_IODFTENA(val) BSP_FLD32(val,8, 11)
583#define TMS570_LIN_IODFTCTRL_IODFTENA_GET(reg) BSP_FLD32GET(reg,8, 11)
584#define TMS570_LIN_IODFTCTRL_IODFTENA_SET(reg,val) BSP_FLD32SET(reg, val,8, 11)
585
586/* field: LPBENA - Module loopback enable. Write access permitted in Privilege mode only. */
587#define TMS570_LIN_IODFTCTRL_LPBENA BSP_BIT32(1)
588
589/* field: RXPENA - Module analog loopback through receive pin enable. */
590#define TMS570_LIN_IODFTCTRL_RXPENA BSP_BIT32(0)
591
592
593
594#endif /* LIBBSP_ARM_TMS570_LIN */
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