source: rtems/c/src/lib/libbsp/arm/tms570/include/ti_herc/reg_i2c.h @ bea49c9

4.11
Last change on this file since bea49c9 was bea49c9, checked in by Premysl Houdek <kom541000@…>, on Jul 16, 2015 at 2:26:09 PM

bsp/tms570: New/generated header files for TMS570 SoC peripherals registers.

The header files are generated by script make_header.py.
Current script's version can be found at:

https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python

Registers offsets and fields have been extracted from reference manual.

Signed-off-by: Premysl Houdek <kom541000@…>

  • Property mode set to 100644
File size: 13.0 KB
Line 
1/* The header file is generated by make_header.py from I2C.json */
2/* Current script's version can be found at: */
3/* https://github.com/AoLaD/rtems-tms570-utils/tree/headers/headers/python */
4
5/*
6 * Copyright (c) 2014-2015, Premysl Houdek <kom541000@gmail.com>
7 *
8 * Czech Technical University in Prague
9 * Zikova 1903/4
10 * 166 36 Praha 6
11 * Czech Republic
12 *
13 * All rights reserved.
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright notice, this
19 *    list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright notice,
21 *    this list of conditions and the following disclaimer in the documentation
22 *    and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
28 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
31 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
33 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 * The views and conclusions contained in the software and documentation are those
36 * of the authors and should not be interpreted as representing official policies,
37 * either expressed or implied, of the FreeBSD Project.
38*/
39#ifndef LIBBSP_ARM_tms570_I2C
40#define LIBBSP_ARM_tms570_I2C
41
42#include <bsp/utility.h>
43
44typedef struct{
45  uint32_t OAR;               /*I2C Own Address Manager*/
46  uint32_t IMR;               /*I2C Interupt Mask Register*/
47  uint32_t STR;               /*I2C Status Register*/
48  uint32_t CKL;               /*I2C Clock Divider Low Register*/
49  uint32_t CKH;               /*I2C Clock Control High Register*/
50  uint32_t CNT;               /*I2C Data Count Register*/
51  uint32_t DRR;               /*I2C Data Receive Register*/
52  uint32_t SAR;               /*I2C Slave Address Register*/
53  uint32_t DXR;               /*I2C Data Transmit Register*/
54  uint32_t MDR;               /*I2C Mode Register*/
55  uint32_t IVR;               /*I2C Interrupt Vector Register*/
56  uint32_t EMDR;              /*I2C Extended Mode Register*/
57  uint32_t PSC;               /*I2C Prescale Register*/
58  uint32_t PID11;             /*I2C Peripheral ID Register 1*/
59  uint32_t PID12;             /*I2C Peripheral ID Register 2*/
60  uint32_t DMACR;             /*I2C DMA Control Register*/
61  uint8_t reserved1 [8];
62  uint32_t PFNC;              /*I2C Pin Function Register*/
63  uint32_t DIR;               /*I2C Pin Direction Register*/
64  uint32_t DIN;               /*I2C Data Input Register*/
65  uint32_t DOUT;              /*I2C Data Output Register*/
66  uint32_t SET;               /*I2C Data Set Register*/
67  uint32_t CLR;               /*I2C Data Clear Register*/
68  uint32_t PDR;               /*I2C Pin Open Drain Register*/
69  uint32_t PDIS;              /*I2C Pull Disable Register*/
70  uint32_t PSEL;              /*I2C Pull Select Register*/
71  uint32_t pSRS;              /*I2C Pins Slew Rate Select Register*/
72} tms570_i2c_t;
73
74
75/*-----------------------TMS570_I2COAR-----------------------*/
76/* field: OA - Own address */
77#define TMS570_I2C_OAR_OA(val) BSP_FLD32(val,0, 9)
78#define TMS570_I2C_OAR_OA_GET(reg) BSP_FLD32GET(reg,0, 9)
79#define TMS570_I2C_OAR_OA_SET(reg,val) BSP_FLD32SET(reg, val,0, 9)
80
81
82/*-----------------------TMS570_I2CIMR-----------------------*/
83/* field: AASEN - Address As Slave Interrupt Enable */
84#define TMS570_I2C_IMR_AASEN BSP_FLD32(6)
85
86/* field: SCDEN - Stop Condition Interrupt Enable */
87#define TMS570_I2C_IMR_SCDEN BSP_FLD32(5)
88
89/* field: TXRDYEN - Transmit Data Ready Interrupt Enable */
90#define TMS570_I2C_IMR_TXRDYEN BSP_FLD32(4)
91
92/* field: RXRDYEN - Receive Data Ready Interrupt Enable */
93#define TMS570_I2C_IMR_RXRDYEN BSP_FLD32(3)
94
95/* field: ARDYEN - Register Access Ready Interrupt Enable */
96#define TMS570_I2C_IMR_ARDYEN BSP_FLD32(2)
97
98/* field: NACKEN - No Acknowledgement Interrupt Enable */
99#define TMS570_I2C_IMR_NACKEN BSP_FLD32(1)
100
101/* field: ALEN - Arbitration Lost Interrupt Enable */
102#define TMS570_I2C_IMR_ALEN BSP_FLD32(0)
103
104
105/*-----------------------TMS570_I2CSTR-----------------------*/
106/* field: SDIR - Slave direction */
107#define TMS570_I2C_STR_SDIR BSP_FLD32(14)
108
109/* field: NACKSNT - No acknowledge sent */
110#define TMS570_I2C_STR_NACKSNT BSP_FLD32(13)
111
112/* field: BB - Bus busy */
113#define TMS570_I2C_STR_BB BSP_FLD32(12)
114
115/* field: RSFULL - Receiver shift full */
116#define TMS570_I2C_STR_RSFULL BSP_FLD32(11)
117
118/* field: XSMT - XSMT */
119#define TMS570_I2C_STR_XSMT BSP_FLD32(10)
120
121/* field: AAS - Address as slave */
122#define TMS570_I2C_STR_AAS BSP_FLD32(9)
123
124/* field: AD0 - Address zero status */
125#define TMS570_I2C_STR_AD0 BSP_FLD32(8)
126
127/* field: SCD - SCD */
128#define TMS570_I2C_STR_SCD BSP_FLD32(5)
129
130/* field: TXRDY - Transmit data ready interrupt flag */
131#define TMS570_I2C_STR_TXRDY BSP_FLD32(4)
132
133/* field: RXRDY - Receive data ready interrupt flag */
134#define TMS570_I2C_STR_RXRDY BSP_FLD32(3)
135
136/* field: ARDY - Register access ready interrupt flag */
137#define TMS570_I2C_STR_ARDY BSP_FLD32(2)
138
139/* field: NACK - No acknowledgement interrupt */
140#define TMS570_I2C_STR_NACK BSP_FLD32(1)
141
142/* field: AL - Arbitration lost interrupt flag */
143#define TMS570_I2C_STR_AL BSP_FLD32(0)
144
145
146/*-----------------------TMS570_I2CCKL-----------------------*/
147/* field: CLKL - Low time clock division factor */
148#define TMS570_I2C_CKL_CLKL(val) BSP_FLD32(val,0, 15)
149#define TMS570_I2C_CKL_CLKL_GET(reg) BSP_FLD32GET(reg,0, 15)
150#define TMS570_I2C_CKL_CLKL_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
151
152
153/*-----------------------TMS570_I2CCKH-----------------------*/
154/* field: CLKH - High time clock division factor */
155#define TMS570_I2C_CKH_CLKH(val) BSP_FLD32(val,0, 15)
156#define TMS570_I2C_CKH_CLKH_GET(reg) BSP_FLD32GET(reg,0, 15)
157#define TMS570_I2C_CKH_CLKH_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
158
159
160/*-----------------------TMS570_I2CCNT-----------------------*/
161/* field: CNT - Data counter */
162#define TMS570_I2C_CNT_CNT(val) BSP_FLD32(val,0, 15)
163#define TMS570_I2C_CNT_CNT_GET(reg) BSP_FLD32GET(reg,0, 15)
164#define TMS570_I2C_CNT_CNT_SET(reg,val) BSP_FLD32SET(reg, val,0, 15)
165
166
167/*-----------------------TMS570_I2CDRR-----------------------*/
168/* field: DATARX - Receive data */
169#define TMS570_I2C_DRR_DATARX(val) BSP_FLD32(val,0, 7)
170#define TMS570_I2C_DRR_DATARX_GET(reg) BSP_FLD32GET(reg,0, 7)
171#define TMS570_I2C_DRR_DATARX_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
172
173
174/*-----------------------TMS570_I2CSAR-----------------------*/
175/* field: SA - 7- or 10-bit programmable slave address */
176#define TMS570_I2C_SAR_SA(val) BSP_FLD32(val,0, 9)
177#define TMS570_I2C_SAR_SA_GET(reg) BSP_FLD32GET(reg,0, 9)
178#define TMS570_I2C_SAR_SA_SET(reg,val) BSP_FLD32SET(reg, val,0, 9)
179
180
181/*-----------------------TMS570_I2CDXR-----------------------*/
182/* field: DATATX - Transmit data */
183#define TMS570_I2C_DXR_DATATX(val) BSP_FLD32(val,0, 7)
184#define TMS570_I2C_DXR_DATATX_GET(reg) BSP_FLD32GET(reg,0, 7)
185#define TMS570_I2C_DXR_DATATX_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
186
187
188/*-----------------------TMS570_I2CMDR-----------------------*/
189/* field: NACKMOD - No-acknowledge (NACK) mode */
190#define TMS570_I2C_MDR_NACKMOD BSP_FLD32(15)
191
192/* field: FREE - Free running bit */
193#define TMS570_I2C_MDR_FREE BSP_FLD32(14)
194
195/* field: STT - Start condition */
196#define TMS570_I2C_MDR_STT BSP_FLD32(13)
197
198/* field: STP - Stop condition */
199#define TMS570_I2C_MDR_STP BSP_FLD32(11)
200
201/* field: MST - Master/slave mode bit */
202#define TMS570_I2C_MDR_MST BSP_FLD32(10)
203
204/* field: TRX - Transmit/receive bit */
205#define TMS570_I2C_MDR_TRX BSP_FLD32(9)
206
207/* field: XA - Expand address enable bit */
208#define TMS570_I2C_MDR_XA BSP_FLD32(8)
209
210/* field: RM - RM */
211#define TMS570_I2C_MDR_RM BSP_FLD32(7)
212
213/* field: DLB - Digital loop back enable bit */
214#define TMS570_I2C_MDR_DLB BSP_FLD32(6)
215
216/* field: nIRS - I2C reset enable bit */
217#define TMS570_I2C_MDR_nIRS BSP_FLD32(5)
218
219/* field: STB - Start byte mode enable bit (Master mode only) */
220#define TMS570_I2C_MDR_STB BSP_FLD32(4)
221
222/* field: FDF - Free data format enable bit */
223#define TMS570_I2C_MDR_FDF BSP_FLD32(3)
224
225/* field: BC - Bit count */
226#define TMS570_I2C_MDR_BC(val) BSP_FLD32(val,0, 2)
227#define TMS570_I2C_MDR_BC_GET(reg) BSP_FLD32GET(reg,0, 2)
228#define TMS570_I2C_MDR_BC_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
229
230
231/*-----------------------TMS570_I2CIVR-----------------------*/
232/* field: TESTMD - Reserved for internal testing. */
233#define TMS570_I2C_IVR_TESTMD(val) BSP_FLD32(val,8, 11)
234#define TMS570_I2C_IVR_TESTMD_GET(reg) BSP_FLD32GET(reg,8, 11)
235#define TMS570_I2C_IVR_TESTMD_SET(reg,val) BSP_FLD32SET(reg, val,8, 11)
236
237/* field: INTCODE - Interrupt Code Bits */
238#define TMS570_I2C_IVR_INTCODE(val) BSP_FLD32(val,0, 2)
239#define TMS570_I2C_IVR_INTCODE_GET(reg) BSP_FLD32GET(reg,0, 2)
240#define TMS570_I2C_IVR_INTCODE_SET(reg,val) BSP_FLD32SET(reg, val,0, 2)
241
242
243/*-----------------------TMS570_I2CEMDR-----------------------*/
244/* field: IGNACK - Ignore NACK mode */
245#define TMS570_I2C_EMDR_IGNACK BSP_FLD32(1)
246
247/* field: BCM - Backwards compatibility mode */
248#define TMS570_I2C_EMDR_BCM BSP_FLD32(0)
249
250
251/*-----------------------TMS570_I2CPSC-----------------------*/
252/* field: PSC - Prescale */
253#define TMS570_I2C_PSC_PSC(val) BSP_FLD32(val,0, 7)
254#define TMS570_I2C_PSC_PSC_GET(reg) BSP_FLD32GET(reg,0, 7)
255#define TMS570_I2C_PSC_PSC_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
256
257
258/*----------------------TMS570_I2CPID11----------------------*/
259/* field: CLASS - Peripheral class */
260#define TMS570_I2C_PID11_CLASS(val) BSP_FLD32(val,8, 15)
261#define TMS570_I2C_PID11_CLASS_GET(reg) BSP_FLD32GET(reg,8, 15)
262#define TMS570_I2C_PID11_CLASS_SET(reg,val) BSP_FLD32SET(reg, val,8, 15)
263
264/* field: REVISION - Revision level of the I2C */
265#define TMS570_I2C_PID11_REVISION(val) BSP_FLD32(val,0, 7)
266#define TMS570_I2C_PID11_REVISION_GET(reg) BSP_FLD32GET(reg,0, 7)
267#define TMS570_I2C_PID11_REVISION_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
268
269
270/*----------------------TMS570_I2CPID12----------------------*/
271/* field: TYPE - Peripheral type */
272#define TMS570_I2C_PID12_TYPE(val) BSP_FLD32(val,0, 7)
273#define TMS570_I2C_PID12_TYPE_GET(reg) BSP_FLD32GET(reg,0, 7)
274#define TMS570_I2C_PID12_TYPE_SET(reg,val) BSP_FLD32SET(reg, val,0, 7)
275
276
277/*----------------------TMS570_I2CDMACR----------------------*/
278/* field: TXDMAEN - Transmitter DMA enable */
279#define TMS570_I2C_DMACR_TXDMAEN BSP_FLD32(1)
280
281/* field: RXDMAEN - Receive DMA enable */
282#define TMS570_I2C_DMACR_RXDMAEN BSP_FLD32(0)
283
284
285/*-----------------------TMS570_I2CPFNC-----------------------*/
286/* field: PINFUNC - SDA and SCL Pin Function */
287#define TMS570_I2C_PFNC_PINFUNC BSP_FLD32(0)
288
289
290/*-----------------------TMS570_I2CDIR-----------------------*/
291/* field: SDADIR - SDA direction */
292#define TMS570_I2C_DIR_SDADIR BSP_FLD32(1)
293
294/* field: SCLDIR - SCL direction */
295#define TMS570_I2C_DIR_SCLDIR BSP_FLD32(0)
296
297
298/*-----------------------TMS570_I2CDIN-----------------------*/
299/* field: SDAIN - Serial data in */
300#define TMS570_I2C_DIN_SDAIN BSP_FLD32(1)
301
302/* field: SCLIN - Serial clock data in */
303#define TMS570_I2C_DIN_SCLIN BSP_FLD32(0)
304
305
306/*-----------------------TMS570_I2CDOUT-----------------------*/
307/* field: SDAOUT - SDA Data Output */
308#define TMS570_I2C_DOUT_SDAOUT BSP_FLD32(1)
309
310/* field: SCLOUT - SCL Data Output */
311#define TMS570_I2C_DOUT_SCLOUT BSP_FLD32(0)
312
313
314/*-----------------------TMS570_I2CSET-----------------------*/
315/* field: SDASET - Serial Data Set */
316#define TMS570_I2C_SET_SDASET BSP_FLD32(1)
317
318/* field: SCLSET - Serial Clock Set */
319#define TMS570_I2C_SET_SCLSET BSP_FLD32(0)
320
321
322/*-----------------------TMS570_I2CCLR-----------------------*/
323/* field: SDACLR - Serial Data Clear */
324#define TMS570_I2C_CLR_SDACLR BSP_FLD32(1)
325
326/* field: SCLCLR - Serial Clock Clear */
327#define TMS570_I2C_CLR_SCLCLR BSP_FLD32(0)
328
329
330/*-----------------------TMS570_I2CPDR-----------------------*/
331/* field: SDAPDR - SDA pin open drain enable */
332#define TMS570_I2C_PDR_SDAPDR BSP_FLD32(1)
333
334/* field: SCLPDR - SCL pin open drain enable */
335#define TMS570_I2C_PDR_SCLPDR BSP_FLD32(0)
336
337
338/*-----------------------TMS570_I2CPDIS-----------------------*/
339/* field: SDAPDIS - SDA pull disable */
340#define TMS570_I2C_PDIS_SDAPDIS BSP_FLD32(1)
341
342/* field: SCLPDIS - SCL pull disable */
343#define TMS570_I2C_PDIS_SCLPDIS BSP_FLD32(0)
344
345
346/*-----------------------TMS570_I2CPSEL-----------------------*/
347/* field: SDAPSEL - SDA pull select */
348#define TMS570_I2C_PSEL_SDAPSEL BSP_FLD32(1)
349
350/* field: SCLPSEL - SCL pull select */
351#define TMS570_I2C_PSEL_SCLPSEL BSP_FLD32(0)
352
353
354/*-----------------------TMS570_I2CpSRS-----------------------*/
355/* field: SDASRS - SDA Slew Rate select */
356#define TMS570_I2C_pSRS_SDASRS BSP_FLD32(1)
357
358/* field: SCLSRS - SCL Slew Rate select */
359#define TMS570_I2C_pSRS_SCLSRS BSP_FLD32(0)
360
361
362
363#endif /* LIBBSP_ARM_tms570_I2C */
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