1 | /** |
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2 | * @file tms570_selftest_par_can.c |
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3 | * |
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4 | * @ingroup tms570 |
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5 | * |
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6 | * @brief Test MibSPI module parity based protection logic to work. |
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7 | */ |
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8 | /* |
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9 | * Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz> |
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10 | * |
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11 | * Czech Technical University in Prague |
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12 | * Zikova 1903/4 |
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13 | * 166 36 Praha 6 |
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14 | * Czech Republic |
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15 | * |
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16 | * The license and distribution terms for this file may be |
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17 | * found in the file LICENSE in this distribution or at |
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18 | * http://www.rtems.org/license/LICENSE. |
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19 | * |
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20 | * Algorithms are based on Ti manuals and Ti HalCoGen generated |
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21 | * code. |
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22 | */ |
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23 | |
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24 | #include <stdint.h> |
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25 | #include <stddef.h> |
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26 | #include <bsp/tms570.h> |
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27 | #include "tms570_selftest.h" |
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28 | #include "tms570_selftest_parity.h" |
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29 | |
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30 | /** |
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31 | * @brief run test to check that parity protection works for MibSPI modules RAM |
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32 | * |
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33 | * @param[in] desc module registers addresses end ESM channels descriptor |
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34 | * |
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35 | * @return Void, in the case of error invokes bsp_selftest_fail_notification() |
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36 | * |
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37 | * The descriptor provides address of the module registers and address |
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38 | * of internal RAM memory and corresponding parity area test access window. |
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39 | */ |
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40 | void tms570_selftest_par_check_mibspi( const tms570_selftest_par_desc_t *desc ) |
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41 | { |
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42 | volatile uint32_t test_read_data; |
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43 | volatile tms570_spi_t *spi_regs = (volatile tms570_spi_t *) desc->fnc_data; |
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44 | uint32_t mibspie_bak; |
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45 | uint32_t uerrctl_bak; |
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46 | int perr; |
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47 | int wait_timeout = 10000; |
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48 | |
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49 | /* wait for MibSPI RAM to complete initialization */ |
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50 | while ( ( spi_regs->FLG & TMS570_SPI_FLG_BUFINITACTIVE ) == |
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51 | TMS570_SPI_FLG_BUFINITACTIVE ) { |
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52 | if ( !wait_timeout-- ) { |
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53 | bsp_selftest_fail_notification( desc->fail_code ); |
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54 | } |
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55 | } |
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56 | |
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57 | /* Store previous configuration of MibSPI */ |
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58 | mibspie_bak = spi_regs->MIBSPIE; |
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59 | uerrctl_bak = spi_regs->UERRCTRL; |
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60 | |
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61 | /* enable multi-buffered mode */ |
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62 | spi_regs->MIBSPIE = TMS570_SPI_MIBSPIE_MSPIENA; |
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63 | |
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64 | /* enable parity error detection */ |
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65 | spi_regs->UERRCTRL = TMS570_SPI_UERRCTRL_EDEN_SET( spi_regs->UERRCTRL, |
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66 | TMS570_SELFTEST_PAR_CR_KEY ); |
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67 | |
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68 | /* enable parity test mode */ |
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69 | spi_regs->UERRCTRL |= TMS570_SPI_UERRCTRL_PTESTEN; |
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70 | |
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71 | /* flip parity bit */ |
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72 | *desc->par_loc ^= desc->par_xor; |
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73 | |
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74 | /* disable parity TEST mode */ |
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75 | spi_regs->UERRCTRL &= ~TMS570_SPI_UERRCTRL_PTESTEN; |
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76 | |
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77 | /* read to cause parity error */ |
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78 | test_read_data = *desc->ram_loc; |
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79 | (void) test_read_data; |
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80 | |
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81 | /* check if ESM channel is flagged */ |
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82 | perr = tms570_esm_channel_sr_get( desc->esm_prim_grp, desc->esm_prim_chan ); |
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83 | |
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84 | if ( !perr ) { |
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85 | /* RAM parity error was not flagged to ESM. */ |
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86 | bsp_selftest_fail_notification( desc->fail_code ); |
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87 | } else { |
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88 | /* clear parity error flags */ |
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89 | spi_regs->UERRSTAT = TMS570_SPI_UERRSTAT_EDFLG1 | |
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90 | TMS570_SPI_UERRSTAT_EDFLG0; |
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91 | |
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92 | /* clear ESM flag */ |
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93 | tms570_esm_channel_sr_clear( desc->esm_prim_grp, desc->esm_prim_chan ); |
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94 | |
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95 | /* enable parity test mode */ |
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96 | spi_regs->UERRCTRL |= TMS570_SPI_UERRCTRL_PTESTEN; |
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97 | |
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98 | /* Revert back to correct data by flipping parity location */ |
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99 | *desc->par_loc ^= desc->par_xor; |
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100 | } |
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101 | |
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102 | /* Restore MIBSPI control registers */ |
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103 | spi_regs->UERRCTRL = uerrctl_bak; |
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104 | spi_regs->MIBSPIE = mibspie_bak; |
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105 | } |
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