1 | /** |
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2 | * @file tms570_selftest.h |
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3 | * |
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4 | * @ingroup tms570 |
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5 | * |
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6 | * @brief Definition of TMS570 selftest error codes, addresses and functions. |
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7 | */ |
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8 | /* |
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9 | * Copyright (c) 2016 Pavel Pisa <pisa@cmp.felk.cvut.cz> |
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10 | * |
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11 | * Czech Technical University in Prague |
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12 | * Zikova 1903/4 |
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13 | * 166 36 Praha 6 |
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14 | * Czech Republic |
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15 | * |
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16 | * The license and distribution terms for this file may be |
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17 | * found in the file LICENSE in this distribution or at |
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18 | * http://www.rtems.org/license/LICENSE. |
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19 | * |
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20 | * Algorithms are based on Ti manuals and Ti HalCoGen generated |
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21 | * code available under following copyright. |
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22 | */ |
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23 | /* |
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24 | * Copyright (C) 2009-2015 Texas Instruments Incorporated - www.ti.com |
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25 | * |
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26 | * |
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27 | * Redistribution and use in source and binary forms, with or without |
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28 | * modification, are permitted provided that the following conditions |
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29 | * are met: |
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30 | * |
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31 | * Redistributions of source code must retain the above copyright |
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32 | * notice, this list of conditions and the following disclaimer. |
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33 | * |
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34 | * Redistributions in binary form must reproduce the above copyright |
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35 | * notice, this list of conditions and the following disclaimer in the |
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36 | * documentation and/or other materials provided with the |
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37 | * distribution. |
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38 | * |
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39 | * Neither the name of Texas Instruments Incorporated nor the names of |
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40 | * its contributors may be used to endorse or promote products derived |
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41 | * from this software without specific prior written permission. |
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42 | * |
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43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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44 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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45 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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46 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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47 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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48 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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49 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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50 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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51 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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52 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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53 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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54 | * |
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55 | */ |
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56 | |
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57 | #ifndef LIBBSP_ARM_TMS570_SELFTEST_H |
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58 | #define LIBBSP_ARM_TMS570_SELFTEST_H |
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59 | |
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60 | #include <stdint.h> |
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61 | #include <stdbool.h> |
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62 | |
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63 | #define CCMSELFCHECK_FAIL1 1U |
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64 | #define CCMSELFCHECK_FAIL2 2U |
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65 | #define CCMSELFCHECK_FAIL3 3U |
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66 | #define CCMSELFCHECK_FAIL4 4U |
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67 | #define PBISTSELFCHECK_FAIL1 5U |
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68 | #define EFCCHECK_FAIL1 6U |
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69 | #define EFCCHECK_FAIL2 7U |
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70 | #define FMCECCCHECK_FAIL1 8U |
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71 | #define CHECKB0RAMECC_FAIL1 9U |
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72 | #define CHECKB1RAMECC_FAIL1 10U |
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73 | #define CHECKFLASHECC_FAIL1 11U |
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74 | #define VIMPARITYCHECK_FAIL1 12U |
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75 | #define DMAPARITYCHECK_FAIL1 13U |
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76 | #define HET1PARITYCHECK_FAIL1 14U |
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77 | #define HTU1PARITYCHECK_FAIL1 15U |
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78 | #define HET2PARITYCHECK_FAIL1 16U |
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79 | #define HTU2PARITYCHECK_FAIL1 17U |
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80 | #define ADC1PARITYCHECK_FAIL1 18U |
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81 | #define ADC2PARITYCHECK_FAIL1 19U |
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82 | #define CAN1PARITYCHECK_FAIL1 20U |
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83 | #define CAN2PARITYCHECK_FAIL1 21U |
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84 | #define CAN3PARITYCHECK_FAIL1 22U |
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85 | #define MIBSPI1PARITYCHECK_FAIL1 23U |
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86 | #define MIBSPI3PARITYCHECK_FAIL1 24U |
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87 | #define MIBSPI5PARITYCHECK_FAIL1 25U |
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88 | #define CHECKRAMECC_FAIL1 26U |
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89 | #define CHECKRAMECC_FAIL2 27U |
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90 | #define CHECKCLOCKMONITOR_FAIL1 28U |
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91 | #define CHECKFLASHEEPROMECC_FAIL1 29U |
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92 | #define CHECKFLASHEEPROMECC_FAIL2 31U |
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93 | #define CHECKFLASHEEPROMECC_FAIL3 32U |
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94 | #define CHECKFLASHEEPROMECC_FAIL4 33U |
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95 | #define CHECKPLL1SLIP_FAIL1 34U |
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96 | #define CHECKRAMADDRPARITY_FAIL1 35U |
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97 | #define CHECKRAMADDRPARITY_FAIL2 36U |
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98 | #define CHECKRAMUERRTEST_FAIL1 37U |
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99 | #define CHECKRAMUERRTEST_FAIL2 38U |
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100 | #define FMCBUS1PARITYCHECK_FAIL1 39U |
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101 | #define FMCBUS1PARITYCHECK_FAIL2 40U |
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102 | #define PBISTSELFCHECK_FAIL2 41U |
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103 | #define PBISTSELFCHECK_FAIL3 42U |
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104 | |
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105 | /* PBIST and STC ROM - PBIST RAM GROUPING */ |
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106 | #define PBIST_ROM_PBIST_RAM_GROUP 1U |
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107 | #define STC_ROM_PBIST_RAM_GROUP 2U |
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108 | |
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109 | #define VIMRAMLOC (*(volatile uint32_t *)0xFFF82000U) |
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110 | #define VIMRAMPARLOC (*(volatile uint32_t *)0xFFF82400U) |
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111 | |
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112 | #define NHET1RAMPARLOC (*(volatile uint32_t *)0xFF462000U) |
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113 | #define NHET2RAMPARLOC (*(volatile uint32_t *)0xFF442000U) |
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114 | #define adcPARRAM1 (*(volatile uint32_t *)(0xFF3E0000U + 0x1000U)) |
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115 | #define adcPARRAM2 (*(volatile uint32_t *)(0xFF3A0000U + 0x1000U)) |
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116 | #define canPARRAM1 (*(volatile uint32_t *)(0xFF1E0000U + 0x10U)) |
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117 | #define canPARRAM2 (*(volatile uint32_t *)(0xFF1C0000U + 0x10U)) |
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118 | #define canPARRAM3 (*(volatile uint32_t *)(0xFF1A0000U + 0x10U)) |
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119 | #define HTU1PARLOC (*(volatile uint32_t *)0xFF4E0200U) |
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120 | #define HTU2PARLOC (*(volatile uint32_t *)0xFF4C0200U) |
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121 | |
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122 | #define NHET1RAMLOC (*(volatile uint32_t *)0xFF460000U) |
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123 | #define NHET2RAMLOC (*(volatile uint32_t *)0xFF440000U) |
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124 | #define HTU1RAMLOC (*(volatile uint32_t *)0xFF4E0000U) |
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125 | #define HTU2RAMLOC (*(volatile uint32_t *)0xFF4C0000U) |
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126 | |
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127 | #define adcRAM1 (*(volatile uint32_t *)0xFF3E0000U) |
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128 | #define adcRAM2 (*(volatile uint32_t *)0xFF3A0000U) |
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129 | #define canRAM1 (*(volatile uint32_t *)0xFF1E0000U) |
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130 | #define canRAM2 (*(volatile uint32_t *)0xFF1C0000U) |
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131 | #define canRAM3 (*(volatile uint32_t *)0xFF1A0000U) |
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132 | |
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133 | #define DMARAMPARLOC (*(volatile uint32_t *)(0xFFF80A00U)) |
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134 | #define DMARAMLOC (*(volatile uint32_t *)(0xFFF80000U)) |
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135 | |
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136 | #define MIBSPI1RAMLOC (*(volatile uint32_t *)(0xFF0E0000U)) |
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137 | #define MIBSPI3RAMLOC (*(volatile uint32_t *)(0xFF0C0000U)) |
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138 | #define MIBSPI5RAMLOC (*(volatile uint32_t *)(0xFF0A0000U)) |
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139 | |
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140 | #define mibspiPARRAM1 (*(volatile uint32_t *)(0xFF0E0000U + 0x00000400U)) |
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141 | #define mibspiPARRAM3 (*(volatile uint32_t *)(0xFF0C0000U + 0x00000400U)) |
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142 | #define mibspiPARRAM5 (*(volatile uint32_t *)(0xFF0A0000U + 0x00000400U)) |
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143 | |
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144 | /** @enum pbistPort |
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145 | * @brief Alias names for pbist Port number |
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146 | * |
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147 | * This enumeration is used to provide alias names for the pbist Port number |
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148 | * - PBIST_PORT0 |
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149 | * - PBIST_PORT1 |
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150 | * |
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151 | * @Note Check the datasheet for the port avaiability |
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152 | */ |
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153 | enum pbistPort { |
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154 | PBIST_PORT0 = 0U, /**< Alias for PBIST Port 0 */ |
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155 | PBIST_PORT1 = 1U /**< Alias for PBIST Port 1 < Check datasheet for Port 1 availability > */ |
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156 | }; |
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157 | |
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158 | enum { |
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159 | PBIST_TripleReadSlow = 0x00000001U, /**<TRIPLE_READ_SLOW_READ for PBIST and STC ROM*/ |
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160 | PBIST_TripleReadFast = 0x00000002U, /**<TRIPLE_READ_SLOW_READ for PBIST and STC ROM*/ |
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161 | PBIST_March13N_DP = 0x00000004U, /**< March13 N Algo for 2 Port mem */ |
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162 | }; |
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163 | |
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164 | uint32_t tms570_efc_check( void ); |
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165 | |
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166 | bool tms570_efc_check_self_test( void ); |
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167 | |
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168 | void bsp_selftest_fail_notification( uint32_t flag ); |
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169 | |
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170 | void tms570_memory_port0_fail_notification( |
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171 | uint32_t groupSelect, |
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172 | uint32_t dataSelect, |
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173 | uint32_t address, |
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174 | uint32_t data |
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175 | ); |
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176 | |
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177 | void tms570_esm_channel_sr_clear( |
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178 | unsigned grp, |
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179 | unsigned chan |
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180 | ); |
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181 | |
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182 | int tms570_esm_channel_sr_get( |
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183 | unsigned grp, |
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184 | unsigned chan |
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185 | ); |
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186 | |
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187 | void tms570_pbist_self_check( void ); |
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188 | |
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189 | void tms570_pbist_run( |
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190 | uint32_t raminfoL, |
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191 | uint32_t algomask |
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192 | ); |
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193 | |
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194 | bool tms570_pbist_is_test_completed( void ); |
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195 | |
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196 | bool tms570_pbist_is_test_passed( void ); |
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197 | |
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198 | void tms570_pbist_fail( void ); |
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199 | |
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200 | void tms570_pbist_stop( void ); |
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201 | |
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202 | void tms570_enable_parity( void ); |
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203 | |
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204 | void tms570_disable_parity( void ); |
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205 | |
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206 | bool tms570_efc_stuck_zero( void ); |
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207 | |
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208 | void tms570_efc_self_test( void ); |
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209 | |
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210 | bool tms570_pbist_port_test_status( uint32_t port ); |
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211 | |
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212 | void tms570_check_tcram_ecc( void ); |
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213 | |
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214 | #endif /*LIBBSP_ARM_TMS570_SELFTEST_H*/ |
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