1 | /** |
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2 | ****************************************************************************** |
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3 | * @file stm32f7xx_hal_pwr_ex.c |
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4 | * @author MCD Application Team |
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5 | * @version V1.0.1 |
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6 | * @date 25-June-2015 |
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7 | * @brief Extended PWR HAL module driver. |
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8 | * This file provides firmware functions to manage the following |
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9 | * functionalities of PWR extension peripheral: |
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10 | * + Peripheral Extended features functions |
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11 | * |
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12 | ****************************************************************************** |
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13 | * @attention |
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14 | * |
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15 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
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16 | * |
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17 | * Redistribution and use in source and binary forms, with or without modification, |
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18 | * are permitted provided that the following conditions are met: |
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19 | * 1. Redistributions of source code must retain the above copyright notice, |
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20 | * this list of conditions and the following disclaimer. |
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21 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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22 | * this list of conditions and the following disclaimer in the documentation |
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23 | * and/or other materials provided with the distribution. |
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24 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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25 | * may be used to endorse or promote products derived from this software |
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26 | * without specific prior written permission. |
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27 | * |
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28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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29 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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30 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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31 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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32 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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38 | * |
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39 | ****************************************************************************** |
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40 | */ |
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41 | |
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42 | /* Includes ------------------------------------------------------------------*/ |
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43 | #include "stm32f7xx_hal.h" |
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44 | |
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45 | /** @addtogroup STM32F7xx_HAL_Driver |
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46 | * @{ |
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47 | */ |
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48 | |
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49 | /** @defgroup PWREx PWREx |
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50 | * @brief PWR HAL module driver |
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51 | * @{ |
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52 | */ |
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53 | |
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54 | #ifdef HAL_PWR_MODULE_ENABLED |
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55 | |
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56 | /* Private typedef -----------------------------------------------------------*/ |
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57 | /* Private define ------------------------------------------------------------*/ |
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58 | /** @addtogroup PWREx_Private_Constants |
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59 | * @{ |
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60 | */ |
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61 | #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000 |
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62 | #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000 |
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63 | #define PWR_BKPREG_TIMEOUT_VALUE 1000 |
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64 | #define PWR_VOSRDY_TIMEOUT_VALUE 1000 |
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65 | /** |
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66 | * @} |
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67 | */ |
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68 | |
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69 | /* Private macro -------------------------------------------------------------*/ |
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70 | /* Private variables ---------------------------------------------------------*/ |
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71 | /* Private function prototypes -----------------------------------------------*/ |
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72 | /* Private functions ---------------------------------------------------------*/ |
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73 | /** @defgroup PWREx_Exported_Functions PWREx Exported Functions |
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74 | * @{ |
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75 | */ |
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76 | |
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77 | /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions |
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78 | * @brief Peripheral Extended features functions |
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79 | * |
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80 | @verbatim |
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81 | |
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82 | =============================================================================== |
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83 | ##### Peripheral extended features functions ##### |
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84 | =============================================================================== |
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85 | |
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86 | *** Main and Backup Regulators configuration *** |
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87 | ================================================ |
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88 | [..] |
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89 | (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from |
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90 | the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is |
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91 | retained even in Standby or VBAT mode when the low power backup regulator |
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92 | is enabled. It can be considered as an internal EEPROM when VBAT is |
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93 | always present. You can use the HAL_PWREx_EnableBkUpReg() function to |
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94 | enable the low power backup regulator. |
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95 | |
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96 | (+) When the backup domain is supplied by VDD (analog switch connected to VDD) |
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97 | the backup SRAM is powered from VDD which replaces the VBAT power supply to |
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98 | save battery life. |
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99 | |
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100 | (+) The backup SRAM is not mass erased by a tamper event. It is read |
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101 | protected to prevent confidential data, such as cryptographic private |
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102 | key, from being accessed. The backup SRAM can be erased only through |
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103 | the Flash interface when a protection level change from level 1 to |
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104 | level 0 is requested. |
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105 | -@- Refer to the description of Read protection (RDP) in the Flash |
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106 | programming manual. |
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107 | |
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108 | (+) The main internal regulator can be configured to have a tradeoff between |
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109 | performance and power consumption when the device does not operate at |
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110 | the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG() |
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111 | macro which configure VOS bit in PWR_CR register |
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112 | |
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113 | Refer to the product datasheets for more details. |
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114 | |
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115 | *** FLASH Power Down configuration **** |
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116 | ======================================= |
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117 | [..] |
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118 | (+) By setting the FPDS bit in the PWR_CR register by using the |
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119 | HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power |
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120 | down mode when the device enters Stop mode. When the Flash memory |
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121 | is in power down mode, an additional startup delay is incurred when |
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122 | waking up from Stop mode. |
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123 | |
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124 | *** Over-Drive and Under-Drive configuration **** |
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125 | ================================================= |
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126 | [..] |
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127 | (+) In Run mode: the main regulator has 2 operating modes available: |
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128 | (++) Normal mode: The CPU and core logic operate at maximum frequency at a given |
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129 | voltage scaling (scale 1, scale 2 or scale 3) |
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130 | (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a |
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131 | higher frequency than the normal mode for a given voltage scaling (scale 1, |
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132 | scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and |
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133 | disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow |
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134 | the sequence described in Reference manual. |
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135 | |
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136 | (+) In Stop mode: the main regulator or low power regulator supplies a low power |
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137 | voltage to the 1.2V domain, thus preserving the content of registers |
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138 | and internal SRAM. 2 operating modes are available: |
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139 | (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only |
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140 | available when the main regulator or the low power regulator is used in Scale 3 or |
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141 | low voltage mode. |
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142 | (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only |
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143 | available when the main regulator or the low power regulator is in low voltage mode. |
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144 | |
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145 | @endverbatim |
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146 | * @{ |
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147 | */ |
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148 | |
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149 | /** |
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150 | * @brief Enables the Backup Regulator. |
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151 | * @retval HAL status |
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152 | */ |
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153 | HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void) |
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154 | { |
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155 | uint32_t tickstart = 0; |
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156 | |
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157 | /* Enable Backup regulator */ |
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158 | PWR->CSR1 |= PWR_CSR1_BRE; |
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159 | |
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160 | /* Get tick */ |
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161 | tickstart = HAL_GetTick(); |
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162 | |
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163 | /* Wait till Backup regulator ready flag is set */ |
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164 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET) |
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165 | { |
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166 | if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) |
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167 | { |
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168 | return HAL_TIMEOUT; |
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169 | } |
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170 | } |
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171 | return HAL_OK; |
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172 | } |
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173 | |
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174 | /** |
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175 | * @brief Disables the Backup Regulator. |
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176 | * @retval HAL status |
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177 | */ |
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178 | HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void) |
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179 | { |
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180 | uint32_t tickstart = 0; |
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181 | |
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182 | /* Disable Backup regulator */ |
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183 | PWR->CSR1 &= (uint32_t)~((uint32_t)PWR_CSR1_BRE); |
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184 | |
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185 | /* Get tick */ |
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186 | tickstart = HAL_GetTick(); |
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187 | |
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188 | /* Wait till Backup regulator ready flag is set */ |
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189 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET) |
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190 | { |
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191 | if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) |
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192 | { |
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193 | return HAL_TIMEOUT; |
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194 | } |
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195 | } |
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196 | return HAL_OK; |
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197 | } |
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198 | |
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199 | /** |
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200 | * @brief Enables the Flash Power Down in Stop mode. |
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201 | * @retval None |
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202 | */ |
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203 | void HAL_PWREx_EnableFlashPowerDown(void) |
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204 | { |
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205 | /* Enable the Flash Power Down */ |
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206 | PWR->CR1 |= PWR_CR1_FPDS; |
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207 | } |
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208 | |
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209 | /** |
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210 | * @brief Disables the Flash Power Down in Stop mode. |
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211 | * @retval None |
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212 | */ |
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213 | void HAL_PWREx_DisableFlashPowerDown(void) |
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214 | { |
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215 | /* Disable the Flash Power Down */ |
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216 | PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_FPDS); |
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217 | } |
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218 | |
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219 | /** |
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220 | * @brief Enables Main Regulator low voltage mode. |
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221 | * @retval None |
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222 | */ |
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223 | void HAL_PWREx_EnableMainRegulatorLowVoltage(void) |
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224 | { |
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225 | /* Enable Main regulator low voltage */ |
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226 | PWR->CR1 |= PWR_CR1_MRUDS; |
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227 | } |
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228 | |
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229 | /** |
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230 | * @brief Disables Main Regulator low voltage mode. |
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231 | * @retval None |
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232 | */ |
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233 | void HAL_PWREx_DisableMainRegulatorLowVoltage(void) |
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234 | { |
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235 | /* Disable Main regulator low voltage */ |
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236 | PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_MRUDS); |
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237 | } |
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238 | |
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239 | /** |
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240 | * @brief Enables Low Power Regulator low voltage mode. |
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241 | * @retval None |
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242 | */ |
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243 | void HAL_PWREx_EnableLowRegulatorLowVoltage(void) |
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244 | { |
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245 | /* Enable low power regulator */ |
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246 | PWR->CR1 |= PWR_CR1_LPUDS; |
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247 | } |
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248 | |
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249 | /** |
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250 | * @brief Disables Low Power Regulator low voltage mode. |
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251 | * @retval None |
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252 | */ |
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253 | void HAL_PWREx_DisableLowRegulatorLowVoltage(void) |
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254 | { |
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255 | /* Disable low power regulator */ |
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256 | PWR->CR1 &= (uint32_t)~((uint32_t)PWR_CR1_LPUDS); |
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257 | } |
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258 | |
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259 | /** |
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260 | * @brief Activates the Over-Drive mode. |
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261 | * @note This mode allows the CPU and the core logic to operate at a higher frequency |
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262 | * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). |
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263 | * @note It is recommended to enter or exit Over-drive mode when the application is not running |
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264 | * critical tasks and when the system clock source is either HSI or HSE. |
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265 | * During the Over-drive switch activation, no peripheral clocks should be enabled. |
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266 | * The peripheral clocks must be enabled once the Over-drive mode is activated. |
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267 | * @retval HAL status |
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268 | */ |
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269 | HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void) |
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270 | { |
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271 | uint32_t tickstart = 0; |
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272 | |
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273 | __HAL_RCC_PWR_CLK_ENABLE(); |
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274 | |
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275 | /* Enable the Over-drive to extend the clock frequency to 216 MHz */ |
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276 | __HAL_PWR_OVERDRIVE_ENABLE(); |
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277 | |
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278 | /* Get tick */ |
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279 | tickstart = HAL_GetTick(); |
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280 | |
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281 | while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) |
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282 | { |
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283 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
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284 | { |
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285 | return HAL_TIMEOUT; |
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286 | } |
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287 | } |
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288 | |
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289 | /* Enable the Over-drive switch */ |
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290 | __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); |
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291 | |
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292 | /* Get tick */ |
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293 | tickstart = HAL_GetTick(); |
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294 | |
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295 | while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) |
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296 | { |
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297 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
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298 | { |
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299 | return HAL_TIMEOUT; |
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300 | } |
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301 | } |
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302 | return HAL_OK; |
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303 | } |
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304 | |
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305 | /** |
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306 | * @brief Deactivates the Over-Drive mode. |
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307 | * @note This mode allows the CPU and the core logic to operate at a higher frequency |
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308 | * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). |
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309 | * @note It is recommended to enter or exit Over-drive mode when the application is not running |
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310 | * critical tasks and when the system clock source is either HSI or HSE. |
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311 | * During the Over-drive switch activation, no peripheral clocks should be enabled. |
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312 | * The peripheral clocks must be enabled once the Over-drive mode is activated. |
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313 | * @retval HAL status |
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314 | */ |
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315 | HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void) |
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316 | { |
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317 | uint32_t tickstart = 0; |
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318 | |
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319 | __HAL_RCC_PWR_CLK_ENABLE(); |
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320 | |
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321 | /* Disable the Over-drive switch */ |
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322 | __HAL_PWR_OVERDRIVESWITCHING_DISABLE(); |
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323 | |
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324 | /* Get tick */ |
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325 | tickstart = HAL_GetTick(); |
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326 | |
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327 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) |
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328 | { |
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329 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
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330 | { |
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331 | return HAL_TIMEOUT; |
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332 | } |
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333 | } |
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334 | |
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335 | /* Disable the Over-drive */ |
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336 | __HAL_PWR_OVERDRIVE_DISABLE(); |
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337 | |
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338 | /* Get tick */ |
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339 | tickstart = HAL_GetTick(); |
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340 | |
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341 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) |
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342 | { |
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343 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
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344 | { |
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345 | return HAL_TIMEOUT; |
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346 | } |
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347 | } |
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348 | |
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349 | return HAL_OK; |
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350 | } |
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351 | |
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352 | /** |
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353 | * @brief Enters in Under-Drive STOP mode. |
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354 | * |
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355 | * @note This mode can be selected only when the Under-Drive is already active |
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356 | * |
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357 | * @note This mode is enabled only with STOP low power mode. |
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358 | * In this mode, the 1.2V domain is preserved in reduced leakage mode. This |
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359 | * mode is only available when the main regulator or the low power regulator |
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360 | * is in low voltage mode |
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361 | * |
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362 | * @note If the Under-drive mode was enabled, it is automatically disabled after |
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363 | * exiting Stop mode. |
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364 | * When the voltage regulator operates in Under-drive mode, an additional |
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365 | * startup delay is induced when waking up from Stop mode. |
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366 | * |
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367 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
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368 | * |
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369 | * @note When exiting Stop mode by issuing an interrupt or a wakeup event, |
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370 | * the HSI RC oscillator is selected as system clock. |
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371 | * |
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372 | * @note When the voltage regulator operates in low power mode, an additional |
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373 | * startup delay is incurred when waking up from Stop mode. |
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374 | * By keeping the internal regulator ON during Stop mode, the consumption |
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375 | * is higher although the startup time is reduced. |
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376 | * |
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377 | * @param Regulator: specifies the regulator state in STOP mode. |
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378 | * This parameter can be one of the following values: |
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379 | * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode |
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380 | * and Flash memory in power-down when the device is in Stop under-drive mode |
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381 | * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode |
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382 | * and Flash memory in power-down when the device is in Stop under-drive mode |
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383 | * @param STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. |
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384 | * This parameter can be one of the following values: |
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385 | * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction |
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386 | * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction |
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387 | * @retval None |
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388 | */ |
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389 | HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry) |
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390 | { |
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391 | uint32_t tempreg = 0; |
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392 | uint32_t tickstart = 0; |
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393 | |
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394 | /* Check the parameters */ |
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395 | assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator)); |
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396 | assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); |
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397 | |
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398 | /* Enable Power ctrl clock */ |
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399 | __HAL_RCC_PWR_CLK_ENABLE(); |
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400 | /* Enable the Under-drive Mode ---------------------------------------------*/ |
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401 | /* Clear Under-drive flag */ |
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402 | __HAL_PWR_CLEAR_ODRUDR_FLAG(); |
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403 | |
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404 | /* Enable the Under-drive */ |
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405 | __HAL_PWR_UNDERDRIVE_ENABLE(); |
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406 | |
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407 | /* Get tick */ |
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408 | tickstart = HAL_GetTick(); |
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409 | |
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410 | /* Wait for UnderDrive mode is ready */ |
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411 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_UDRDY)) |
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412 | { |
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413 | if((HAL_GetTick() - tickstart ) > PWR_UDERDRIVE_TIMEOUT_VALUE) |
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414 | { |
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415 | return HAL_TIMEOUT; |
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416 | } |
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417 | } |
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418 | |
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419 | /* Select the regulator state in STOP mode ---------------------------------*/ |
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420 | tempreg = PWR->CR1; |
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421 | /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */ |
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422 | tempreg &= (uint32_t)~(PWR_CR1_PDDS | PWR_CR1_LPDS | PWR_CR1_LPUDS | PWR_CR1_MRUDS); |
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423 | |
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424 | /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */ |
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425 | tempreg |= Regulator; |
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426 | |
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427 | /* Store the new value */ |
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428 | PWR->CR1 = tempreg; |
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429 | |
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430 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
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431 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
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432 | |
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433 | /* Select STOP mode entry --------------------------------------------------*/ |
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434 | if(STOPEntry == PWR_SLEEPENTRY_WFI) |
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435 | { |
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436 | /* Request Wait For Interrupt */ |
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437 | __WFI(); |
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438 | } |
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439 | else |
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440 | { |
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441 | /* Request Wait For Event */ |
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442 | __WFE(); |
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443 | } |
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444 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
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445 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
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446 | |
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447 | return HAL_OK; |
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448 | } |
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449 | |
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450 | /** |
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451 | * @brief Returns Voltage Scaling Range. |
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452 | * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1, PWR_REGULATOR_VOLTAGE_SCALE2 or |
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453 | * PWR_REGULATOR_VOLTAGE_SCALE3)PWR_REGULATOR_VOLTAGE_SCALE1 |
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454 | */ |
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455 | uint32_t HAL_PWREx_GetVoltageRange(void) |
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456 | { |
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457 | return (PWR->CR1 & PWR_CR1_VOS); |
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458 | } |
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459 | |
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460 | /** |
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461 | * @brief Configures the main internal regulator output voltage. |
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462 | * @param VoltageScaling: specifies the regulator output voltage to achieve |
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463 | * a tradeoff between performance and power consumption. |
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464 | * This parameter can be one of the following values: |
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465 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, |
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466 | * typical output voltage at 1.4 V, |
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467 | * system frequency up to 216 MHz. |
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468 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, |
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469 | * typical output voltage at 1.2 V, |
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470 | * system frequency up to 180 MHz. |
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471 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 2 mode, |
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472 | * typical output voltage at 1.00 V, |
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473 | * system frequency up to 151 MHz. |
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474 | * @note To update the system clock frequency(SYSCLK): |
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475 | * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig(). |
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476 | * - Call the HAL_RCC_OscConfig() to configure the PLL. |
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477 | * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale. |
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478 | * - Set the new system clock frequency using the HAL_RCC_ClockConfig(). |
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479 | * @note The scale can be modified only when the HSI or HSE clock source is selected |
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480 | * as system clock source, otherwise the API returns HAL_ERROR. |
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481 | * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits |
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482 | * value in the PWR_CR1 register are not taken in account. |
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483 | * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2. |
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484 | * @note The new voltage scale is active only when the PLL is ON. |
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485 | * @retval HAL Status |
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486 | */ |
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487 | HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) |
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488 | { |
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489 | uint32_t tickstart = 0; |
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490 | |
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491 | assert_param(IS_PWR_REGULATOR_VOLTAGE(VoltageScaling)); |
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492 | |
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493 | /* Enable Power ctrl clock */ |
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494 | __HAL_RCC_PWR_CLK_ENABLE(); |
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495 | |
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496 | /* Check if the PLL is used as system clock or not */ |
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497 | if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) |
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498 | { |
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499 | /* Disable the main PLL */ |
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500 | __HAL_RCC_PLL_DISABLE(); |
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501 | |
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502 | /* Get Start Tick */ |
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503 | tickstart = HAL_GetTick(); |
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504 | /* Wait till PLL is disabled */ |
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505 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
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506 | { |
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507 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
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508 | { |
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509 | return HAL_TIMEOUT; |
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510 | } |
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511 | } |
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512 | |
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513 | /* Set Range */ |
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514 | __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling); |
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515 | |
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516 | /* Enable the main PLL */ |
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517 | __HAL_RCC_PLL_ENABLE(); |
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518 | |
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519 | /* Get Start Tick */ |
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520 | tickstart = HAL_GetTick(); |
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521 | /* Wait till PLL is ready */ |
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522 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
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523 | { |
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524 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
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525 | { |
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526 | return HAL_TIMEOUT; |
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527 | } |
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528 | } |
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529 | |
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530 | /* Get Start Tick */ |
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531 | tickstart = HAL_GetTick(); |
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532 | while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET)) |
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533 | { |
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534 | if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE) |
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535 | { |
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536 | return HAL_TIMEOUT; |
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537 | } |
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538 | } |
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539 | } |
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540 | else |
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541 | { |
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542 | return HAL_ERROR; |
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543 | } |
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544 | return HAL_OK; |
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545 | } |
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546 | |
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547 | /** |
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548 | * @} |
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549 | */ |
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550 | |
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551 | /** |
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552 | * @} |
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553 | */ |
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554 | |
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555 | #endif /* HAL_PWR_MODULE_ENABLED */ |
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556 | /** |
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557 | * @} |
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558 | */ |
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559 | |
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560 | /** |
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561 | * @} |
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562 | */ |
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563 | |
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564 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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