Context Navigation

source: rtems/c/src/lib/libbsp/arm/stm32f7x/hal/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h @ c20847a5

5

Last change on this file since c20847a5 was c20847a5, checked in by Isaac Gutekunst <isaac.gutekunst@…>, on 09/16/15 at 13:16:02

Add STM32F7 HAL Files

These files originated as:

+ STC32CubeF7 V1.1.0 from http://www.st.com/web/en/catalog/tools/PF261909

Property mode set to 100644

File size: 15.4 KB

Line
1	/**
2	******************************************************************************
3	* @file stm32f7xx_hal_pwr.h
4	* @author MCD Application Team
5	* @version V1.0.1
6	* @date 25-June-2015
7	* @brief Header file of PWR HAL module.
8	******************************************************************************
9	* @attention
10	*
11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12	*
13	* Redistribution and use in source and binary forms, with or without modification,
14	* are permitted provided that the following conditions are met:
15	* 1. Redistributions of source code must retain the above copyright notice,
16	* this list of conditions and the following disclaimer.
17	* 2. Redistributions in binary form must reproduce the above copyright notice,
18	* this list of conditions and the following disclaimer in the documentation
19	* and/or other materials provided with the distribution.
20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
21	* may be used to endorse or promote products derived from this software
22	* without specific prior written permission.
23	*
24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34	*
35	******************************************************************************
36	*/
37
38	/* Define to prevent recursive inclusion -------------------------------------*/
39	#ifndef __STM32F7xx_HAL_PWR_H
40	#define __STM32F7xx_HAL_PWR_H
41
42	#ifdef __cplusplus
43	extern "C" {
44	#endif
45
46	/* Includes ------------------------------------------------------------------*/
47	#include "stm32f7xx_hal_def.h"
48
49	/** @addtogroup STM32F7xx_HAL_Driver
50	* @{
51	*/
52
53	/** @addtogroup PWR
54	* @{
55	*/
56
57	/* Exported types ------------------------------------------------------------*/
58
59	/** @defgroup PWR_Exported_Types PWR Exported Types
60	* @{
61	*/
62
63	/**
64	* @brief PWR PVD configuration structure definition
65	*/
66	typedef struct
67	{
68	uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
69	This parameter can be a value of @ref PWR_PVD_detection_level */
70
71	uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
72	This parameter can be a value of @ref PWR_PVD_Mode */
73	}PWR_PVDTypeDef;
74
75	/**
76	* @}
77	*/
78
79	/* Exported constants --------------------------------------------------------*/
80	/** @defgroup PWR_Exported_Constants PWR Exported Constants
81	* @{
82	*/
83
84	/** @defgroup PWR_PVD_detection_level PWR PVD detection level
85	* @{
86	*/
87	#define PWR_PVDLEVEL_0 PWR_CR1_PLS_LEV0
88	#define PWR_PVDLEVEL_1 PWR_CR1_PLS_LEV1
89	#define PWR_PVDLEVEL_2 PWR_CR1_PLS_LEV2
90	#define PWR_PVDLEVEL_3 PWR_CR1_PLS_LEV3
91	#define PWR_PVDLEVEL_4 PWR_CR1_PLS_LEV4
92	#define PWR_PVDLEVEL_5 PWR_CR1_PLS_LEV5
93	#define PWR_PVDLEVEL_6 PWR_CR1_PLS_LEV6
94	#define PWR_PVDLEVEL_7 PWR_CR1_PLS_LEV7/* External input analog voltage
95	(Compare internally to VREFINT) */
96
97	/**
98	* @}
99	*/
100
101	/** @defgroup PWR_PVD_Mode PWR PVD Mode
102	* @{
103	*/
104	#define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /!< basic mode is used /
105	#define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /!< External Interrupt Mode with Rising edge trigger detection /
106	#define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /!< External Interrupt Mode with Falling edge trigger detection /
107	#define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /!< External Interrupt Mode with Rising/Falling edge trigger detection /
108	#define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /!< Event Mode with Rising edge trigger detection /
109	#define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /!< Event Mode with Falling edge trigger detection /
110	#define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /!< Event Mode with Rising/Falling edge trigger detection /
111	/**
112	* @}
113	*/
114
115	/** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
116	* @{
117	*/
118	#define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000)
119	#define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPDS
120	/**
121	* @}
122	*/
123
124	/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
125	* @{
126	*/
127	#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
128	#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
129	/**
130	* @}
131	*/
132
133	/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
134	* @{
135	*/
136	#define PWR_STOPENTRY_WFI ((uint8_t)0x01)
137	#define PWR_STOPENTRY_WFE ((uint8_t)0x02)
138	/**
139	* @}
140	*/
141
142	/** @defgroup PWR_Regulator_Voltage_Scale PWR Regulator Voltage Scale
143	* @{
144	*/
145	#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS
146	#define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1
147	#define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR1_VOS_0
148	/**
149	* @}
150	*/
151
152	/** @defgroup PWR_Flag PWR Flag
153	* @{
154	*/
155	#define PWR_FLAG_WU PWR_CSR1_WUIF
156	#define PWR_FLAG_SB PWR_CSR1_SBF
157	#define PWR_FLAG_PVDO PWR_CSR1_PVDO
158	#define PWR_FLAG_BRR PWR_CSR1_BRR
159	#define PWR_FLAG_VOSRDY PWR_CSR1_VOSRDY
160	/**
161	* @}
162	*/
163
164	/**
165	* @}
166	*/
167
168	/* Exported macro ------------------------------------------------------------*/
169	/** @defgroup PWR_Exported_Macro PWR Exported Macro
170	* @{
171	*/
172
173	/** @brief macros configure the main internal regulator output voltage.
174	* @param __REGULATOR__: specifies the regulator output voltage to achieve
175	* a tradeoff between performance and power consumption when the device does
176	* not operate at the maximum frequency (refer to the datasheets for more details).
177	* This parameter can be one of the following values:
178	* @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
179	* @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
180	* @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
181	* @retval None
182	*/
183	#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
184	__IO uint32_t tmpreg; \
185	MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \
186	/* Delay after an RCC peripheral clock enabling */ \
187	tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \
188	UNUSED(tmpreg); \
189	} while(0)
190
191	/** @brief Check PWR flag is set or not.
192	* @param __FLAG__: specifies the flag to check.
193	* This parameter can be one of the following values:
194	* @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
195	* was received on the internal wakeup line in standby mode (RTC alarm (Alarm A or Alarm B),
196	* RTC Tamper event, RTC TimeStamp event or RTC Wakeup)).
197	* @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
198	* resumed from StandBy mode.
199	* @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
200	* by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
201	* For this reason, this bit is equal to 0 after Standby or reset
202	* until the PVDE bit is set.
203	* @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
204	* when the device wakes up from Standby mode or by a system reset
205	* or power reset.
206	* @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
207	* scaling output selection is ready.
208	* @retval The new state of __FLAG__ (TRUE or FALSE).
209	*/
210	#define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR1 & (__FLAG__)) == (__FLAG__))
211
212	/** @brief Clear the PWR's pending flags.
213	* @param __FLAG__: specifies the flag to clear.
214	* This parameter can be one of the following values:
215	* @arg PWR_FLAG_SB: StandBy flag
216	*/
217	#define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR1 \|= (__FLAG__) << 2)
218
219	/**
220	* @brief Enable the PVD Exti Line 16.
221	* @retval None.
222	*/
223	#define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR \|= (PWR_EXTI_LINE_PVD))
224
225	/**
226	* @brief Disable the PVD EXTI Line 16.
227	* @retval None.
228	*/
229	#define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
230
231	/**
232	* @brief Enable event on PVD Exti Line 16.
233	* @retval None.
234	*/
235	#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR \|= (PWR_EXTI_LINE_PVD))
236
237	/**
238	* @brief Disable event on PVD Exti Line 16.
239	* @retval None.
240	*/
241	#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
242
243	/**
244	* @brief Enable the PVD Extended Interrupt Rising Trigger.
245	* @retval None.
246	*/
247	#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
248
249	/**
250	* @brief Disable the PVD Extended Interrupt Rising Trigger.
251	* @retval None.
252	*/
253	#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
254
255	/**
256	* @brief Enable the PVD Extended Interrupt Falling Trigger.
257	* @retval None.
258	*/
259	#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
260
261
262	/**
263	* @brief Disable the PVD Extended Interrupt Falling Trigger.
264	* @retval None.
265	*/
266	#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
267
268
269	/**
270	* @brief PVD EXTI line configuration: set rising & falling edge trigger.
271	* @retval None.
272	*/
273	#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
274
275	/**
276	* @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
277	* @retval None.
278	*/
279	#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
280
281	/**
282	* @brief checks whether the specified PVD Exti interrupt flag is set or not.
283	* @retval EXTI PVD Line Status.
284	*/
285	#define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
286
287	/**
288	* @brief Clear the PVD Exti flag.
289	* @retval None.
290	*/
291	#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
292
293	/**
294	* @brief Generates a Software interrupt on PVD EXTI line.
295	* @retval None
296	*/
297	#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER \|= (PWR_EXTI_LINE_PVD))
298
299	/**
300	* @}
301	*/
302
303	/* Include PWR HAL Extension module */
304	#include "stm32f7xx_hal_pwr_ex.h"
305
306	/* Exported functions --------------------------------------------------------*/
307	/** @addtogroup PWR_Exported_Functions PWR Exported Functions
308	* @{
309	*/
310
311	/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
312	* @{
313	*/
314	/* Initialization and de-initialization functions *****************************/
315	void HAL_PWR_DeInit(void);
316	void HAL_PWR_EnableBkUpAccess(void);
317	void HAL_PWR_DisableBkUpAccess(void);
318	/**
319	* @}
320	*/
321
322	/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
323	* @{
324	*/
325	/* Peripheral Control functions **********************************************/
326	/* PVD configuration */
327	void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
328	void HAL_PWR_EnablePVD(void);
329	void HAL_PWR_DisablePVD(void);
330
331	/* WakeUp pins configuration */
332	void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity);
333	void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
334
335	/* Low Power modes entry */
336	void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
337	void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
338	void HAL_PWR_EnterSTANDBYMode(void);
339
340	/* Power PVD IRQ Handler */
341	void HAL_PWR_PVD_IRQHandler(void);
342	void HAL_PWR_PVDCallback(void);
343
344	/* Cortex System Control functions *******************************************/
345	void HAL_PWR_EnableSleepOnExit(void);
346	void HAL_PWR_DisableSleepOnExit(void);
347	void HAL_PWR_EnableSEVOnPend(void);
348	void HAL_PWR_DisableSEVOnPend(void);
349	/**
350	* @}
351	*/
352
353	/**
354	* @}
355	*/
356
357	/* Private types -------------------------------------------------------------*/
358	/* Private variables ---------------------------------------------------------*/
359	/* Private constants ---------------------------------------------------------*/
360	/** @defgroup PWR_Private_Constants PWR Private Constants
361	* @{
362	*/
363
364	/** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
365	* @{
366	*/
367	#define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /!< External interrupt line 16 Connected to the PVD EXTI Line /
368	/**
369	* @}
370	*/
371
372	/**
373	* @}
374	*/
375	/* Private macros ------------------------------------------------------------*/
376	/** @defgroup PWR_Private_Macros PWR Private Macros
377	* @{
378	*/
379
380	/** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
381	* @{
382	*/
383	#define IS_PWR_WAKEUP_POLARITY(POLARITY) (((POLARITY) == PWR_POLARITY_RISINGEDGE) \|\| \
384	((POLARITY) == PWR_POLARITY_FALLINGEDGE))
385	#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) \|\| ((LEVEL) == PWR_PVDLEVEL_1)\|\| \
386	((LEVEL) == PWR_PVDLEVEL_2) \|\| ((LEVEL) == PWR_PVDLEVEL_3)\|\| \
387	((LEVEL) == PWR_PVDLEVEL_4) \|\| ((LEVEL) == PWR_PVDLEVEL_5)\|\| \
388	((LEVEL) == PWR_PVDLEVEL_6) \|\| ((LEVEL) == PWR_PVDLEVEL_7))
389	#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)\|\| ((MODE) == PWR_PVD_MODE_IT_FALLING) \|\| \
390	((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) \|\| ((MODE) == PWR_PVD_MODE_EVENT_RISING) \|\| \
391	((MODE) == PWR_PVD_MODE_EVENT_FALLING) \|\| ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) \|\| \
392	((MODE) == PWR_PVD_MODE_NORMAL))
393	#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) \|\| \
394	((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
395	#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) \|\| ((ENTRY) == PWR_SLEEPENTRY_WFE))
396	#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) \|\| ((ENTRY) == PWR_STOPENTRY_WFE))
397	#define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) \|\| \
398	((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) \|\| \
399	((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
400
401	/**
402	* @}
403	*/
404
405	/**
406	* @}
407	*/
408
409	/**
410	* @}
411	*/
412
413	/**
414	* @}
415	*/
416
417	#ifdef __cplusplus
418	}
419	#endif
420
421
422	#endif /* __STM32F7xx_HAL_PWR_H */
423
424	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

Note: See TracBrowser for help on using the repository browser.

Download in other formats: