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source: rtems/c/src/lib/libbsp/arm/stm32f7x/hal/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma2d.h @ c20847a5

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Last change on this file since c20847a5 was c20847a5, checked in by Isaac Gutekunst <isaac.gutekunst@…>, on 09/16/15 at 13:16:02

Add STM32F7 HAL Files

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+ STC32CubeF7 V1.1.0 from http://www.st.com/web/en/catalog/tools/PF261909

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1	/**
2	******************************************************************************
3	* @file stm32f7xx_hal_dma2d.h
4	* @author MCD Application Team
5	* @version V1.0.1
6	* @date 25-June-2015
7	* @brief Header file of DMA2D HAL module.
8	******************************************************************************
9	* @attention
10	*
11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12	*
13	* Redistribution and use in source and binary forms, with or without modification,
14	* are permitted provided that the following conditions are met:
15	* 1. Redistributions of source code must retain the above copyright notice,
16	* this list of conditions and the following disclaimer.
17	* 2. Redistributions in binary form must reproduce the above copyright notice,
18	* this list of conditions and the following disclaimer in the documentation
19	* and/or other materials provided with the distribution.
20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
21	* may be used to endorse or promote products derived from this software
22	* without specific prior written permission.
23	*
24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34	*
35	******************************************************************************
36	*/
37
38	/* Define to prevent recursive inclusion -------------------------------------*/
39	#ifndef __STM32F7xx_HAL_DMA2D_H
40	#define __STM32F7xx_HAL_DMA2D_H
41
42	#ifdef __cplusplus
43	extern "C" {
44	#endif
45
46	/* Includes ------------------------------------------------------------------*/
47	#include "stm32f7xx_hal_def.h"
48
49	/** @addtogroup STM32F7xx_HAL_Driver
50	* @{
51	*/
52
53	/** @defgroup DMA2D DMA2D
54	* @brief DMA2D HAL module driver
55	* @{
56	*/
57
58	/* Exported types ------------------------------------------------------------*/
59	/** @defgroup DMA2D_Exported_Types DMA2D Exported Types
60	* @{
61	*/
62	#define MAX_DMA2D_LAYER 2
63
64	/**
65	* @brief DMA2D color Structure definition
66	*/
67	typedef struct
68	{
69	uint32_t Blue; /*!< Configures the blue value.
70	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
71
72	uint32_t Green; /*!< Configures the green value.
73	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
74
75	uint32_t Red; /*!< Configures the red value.
76	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
77	} DMA2D_ColorTypeDef;
78
79	/**
80	* @brief DMA2D CLUT Structure definition
81	*/
82	typedef struct
83	{
84	uint32_t pCLUT; /!< Configures the DMA2D CLUT memory address.*/
85
86	uint32_t CLUTColorMode; /*!< configures the DMA2D CLUT color mode.
87	This parameter can be one value of @ref DMA2D_CLUT_CM */
88
89	uint32_t Size; /*!< configures the DMA2D CLUT size.
90	This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
91	} DMA2D_CLUTCfgTypeDef;
92
93	/**
94	* @brief DMA2D Init structure definition
95	*/
96	typedef struct
97	{
98	uint32_t Mode; /*!< configures the DMA2D transfer mode.
99	This parameter can be one value of @ref DMA2D_Mode */
100
101	uint32_t ColorMode; /*!< configures the color format of the output image.
102	This parameter can be one value of @ref DMA2D_Color_Mode */
103
104	uint32_t OutputOffset; /*!< Specifies the Offset value.
105	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
106	} DMA2D_InitTypeDef;
107
108	/**
109	* @brief DMA2D Layer structure definition
110	*/
111	typedef struct
112	{
113	uint32_t InputOffset; /*!< configures the DMA2D foreground offset.
114	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
115
116	uint32_t InputColorMode; /*!< configures the DMA2D foreground color mode .
117	This parameter can be one value of @ref DMA2D_Input_Color_Mode */
118
119	uint32_t AlphaMode; /*!< configures the DMA2D foreground alpha mode.
120	This parameter can be one value of @ref DMA2D_ALPHA_MODE */
121
122	uint32_t InputAlpha; /*!< Specifies the DMA2D foreground alpha value and color value in case of A8 or A4 color mode.
123	This parameter must be a number between Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF
124	in case of A8 or A4 color mode (ARGB).
125	Otherwise, This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
126
127	} DMA2D_LayerCfgTypeDef;
128
129	/**
130	* @brief HAL DMA2D State structures definition
131	*/
132	typedef enum
133	{
134	HAL_DMA2D_STATE_RESET = 0x00, /!< DMA2D not yet initialized or disabled /
135	HAL_DMA2D_STATE_READY = 0x01, /!< Peripheral Initialized and ready for use /
136	HAL_DMA2D_STATE_BUSY = 0x02, /!< an internal process is ongoing /
137	HAL_DMA2D_STATE_TIMEOUT = 0x03, /!< Timeout state /
138	HAL_DMA2D_STATE_ERROR = 0x04, /!< DMA2D state error /
139	HAL_DMA2D_STATE_SUSPEND = 0x05 /!< DMA2D process is suspended /
140	}HAL_DMA2D_StateTypeDef;
141
142	/**
143	* @brief DMA2D handle Structure definition
144	*/
145	typedef struct __DMA2D_HandleTypeDef
146	{
147	DMA2D_TypeDef Instance; /!< DMA2D Register base address */
148
149	DMA2D_InitTypeDef Init; /!< DMA2D communication parameters /
150
151	void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /!< DMA2D transfer complete callback /
152
153	void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /!< DMA2D transfer error callback /
154
155	DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /!< DMA2D Layers parameters /
156
157	HAL_LockTypeDef Lock; /!< DMA2D Lock /
158
159	__IO HAL_DMA2D_StateTypeDef State; /!< DMA2D transfer state /
160
161	__IO uint32_t ErrorCode; /!< DMA2D Error code /
162	} DMA2D_HandleTypeDef;
163	/**
164	* @}
165	*/
166
167	/* Exported constants --------------------------------------------------------*/
168	/** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
169	* @{
170	*/
171
172	/** @defgroup DMA2D_Error_Code DMA2D Error Code
173	* @{
174	*/
175	#define HAL_DMA2D_ERROR_NONE ((uint32_t)0x00000000) /!< No error /
176	#define HAL_DMA2D_ERROR_TE ((uint32_t)0x00000001) /!< Transfer error /
177	#define HAL_DMA2D_ERROR_CE ((uint32_t)0x00000002) /!< Configuration error /
178	#define HAL_DMA2D_ERROR_TIMEOUT ((uint32_t)0x00000020) /!< Timeout error /
179	/**
180	* @}
181	*/
182
183	/** @defgroup DMA2D_Mode DMA2D Mode
184	* @{
185	*/
186	#define DMA2D_M2M ((uint32_t)0x00000000) /!< DMA2D memory to memory transfer mode /
187	#define DMA2D_M2M_PFC ((uint32_t)0x00010000) /!< DMA2D memory to memory with pixel format conversion transfer mode /
188	#define DMA2D_M2M_BLEND ((uint32_t)0x00020000) /!< DMA2D memory to memory with blending transfer mode /
189	#define DMA2D_R2M ((uint32_t)0x00030000) /!< DMA2D register to memory transfer mode /
190	/**
191	* @}
192	*/
193
194	/** @defgroup DMA2D_Color_Mode DMA2D Color Mode
195	* @{
196	*/
197	#define DMA2D_ARGB8888 ((uint32_t)0x00000000) /!< ARGB8888 DMA2D color mode /
198	#define DMA2D_RGB888 ((uint32_t)0x00000001) /!< RGB888 DMA2D color mode /
199	#define DMA2D_RGB565 ((uint32_t)0x00000002) /!< RGB565 DMA2D color mode /
200	#define DMA2D_ARGB1555 ((uint32_t)0x00000003) /!< ARGB1555 DMA2D color mode /
201	#define DMA2D_ARGB4444 ((uint32_t)0x00000004) /!< ARGB4444 DMA2D color mode /
202	/**
203	* @}
204	*/
205
206	/** @defgroup DMA2D_COLOR_VALUE DMA2D COLOR VALUE
207	* @{
208	*/
209	#define COLOR_VALUE ((uint32_t)0x000000FF) /!< color value mask /
210	/**
211	* @}
212	*/
213
214	/** @defgroup DMA2D_SIZE DMA2D SIZE
215	* @{
216	*/
217	#define DMA2D_PIXEL (DMA2D_NLR_PL >> 16) /!< DMA2D pixel per line /
218	#define DMA2D_LINE DMA2D_NLR_NL /!< DMA2D number of line /
219	/**
220	* @}
221	*/
222
223	/** @defgroup DMA2D_Offset DMA2D Offset
224	* @{
225	*/
226	#define DMA2D_OFFSET DMA2D_FGOR_LO /!< Line Offset /
227	/**
228	* @}
229	*/
230
231	/** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
232	* @{
233	*/
234	#define CM_ARGB8888 ((uint32_t)0x00000000) /!< ARGB8888 color mode /
235	#define CM_RGB888 ((uint32_t)0x00000001) /!< RGB888 color mode /
236	#define CM_RGB565 ((uint32_t)0x00000002) /!< RGB565 color mode /
237	#define CM_ARGB1555 ((uint32_t)0x00000003) /!< ARGB1555 color mode /
238	#define CM_ARGB4444 ((uint32_t)0x00000004) /!< ARGB4444 color mode /
239	#define CM_L8 ((uint32_t)0x00000005) /!< L8 color mode /
240	#define CM_AL44 ((uint32_t)0x00000006) /!< AL44 color mode /
241	#define CM_AL88 ((uint32_t)0x00000007) /!< AL88 color mode /
242	#define CM_L4 ((uint32_t)0x00000008) /!< L4 color mode /
243	#define CM_A8 ((uint32_t)0x00000009) /!< A8 color mode /
244	#define CM_A4 ((uint32_t)0x0000000A) /!< A4 color mode /
245	/**
246	* @}
247	*/
248
249	/** @defgroup DMA2D_ALPHA_MODE DMA2D ALPHA MODE
250	* @{
251	*/
252	#define DMA2D_NO_MODIF_ALPHA ((uint32_t)0x00000000) /!< No modification of the alpha channel value /
253	#define DMA2D_REPLACE_ALPHA ((uint32_t)0x00000001) /!< Replace original alpha channel value by programmed alpha value /
254	#define DMA2D_COMBINE_ALPHA ((uint32_t)0x00000002) /*!< Replace original alpha channel value by programmed alpha value
255	with original alpha channel value */
256	/**
257	* @}
258	*/
259
260	/** @defgroup DMA2D_CLUT_CM DMA2D CLUT CM
261	* @{
262	*/
263	#define DMA2D_CCM_ARGB8888 ((uint32_t)0x00000000) /!< ARGB8888 DMA2D C-LUT color mode /
264	#define DMA2D_CCM_RGB888 ((uint32_t)0x00000001) /!< RGB888 DMA2D C-LUT color mode /
265	/**
266	* @}
267	*/
268
269	/** @defgroup DMA2D_Size_Clut DMA2D Size Clut
270	* @{
271	*/
272	#define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8) /!< DMA2D C-LUT size /
273	/**
274	* @}
275	*/
276
277	/** @defgroup DMA2D_DeadTime DMA2D DeadTime
278	* @{
279	*/
280	#define LINE_WATERMARK DMA2D_LWR_LW
281	/**
282	* @}
283	*/
284
285	/** @defgroup DMA2D_Interrupts DMA2D Interrupts
286	* @{
287	*/
288	#define DMA2D_IT_CE DMA2D_CR_CEIE /!< Configuration Error Interrupt /
289	#define DMA2D_IT_CTC DMA2D_CR_CTCIE /!< C-LUT Transfer Complete Interrupt /
290	#define DMA2D_IT_CAE DMA2D_CR_CAEIE /!< C-LUT Access Error Interrupt /
291	#define DMA2D_IT_TW DMA2D_CR_TWIE /!< Transfer Watermark Interrupt /
292	#define DMA2D_IT_TC DMA2D_CR_TCIE /!< Transfer Complete Interrupt /
293	#define DMA2D_IT_TE DMA2D_CR_TEIE /!< Transfer Error Interrupt /
294	/**
295	* @}
296	*/
297
298	/** @defgroup DMA2D_Flag DMA2D Flag
299	* @{
300	*/
301	#define DMA2D_FLAG_CE DMA2D_ISR_CEIF /!< Configuration Error Interrupt Flag /
302	#define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /!< C-LUT Transfer Complete Interrupt Flag /
303	#define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /!< C-LUT Access Error Interrupt Flag /
304	#define DMA2D_FLAG_TW DMA2D_ISR_TWIF /!< Transfer Watermark Interrupt Flag /
305	#define DMA2D_FLAG_TC DMA2D_ISR_TCIF /!< Transfer Complete Interrupt Flag /
306	#define DMA2D_FLAG_TE DMA2D_ISR_TEIF /!< Transfer Error Interrupt Flag /
307	/**
308	* @}
309	*/
310
311	/**
312	* @}
313	*/
314	/* Exported macro ------------------------------------------------------------*/
315	/** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
316	* @{
317	*/
318
319	/** @brief Reset DMA2D handle state
320	* @param __HANDLE__: specifies the DMA2D handle.
321	* @retval None
322	*/
323	#define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
324
325	/**
326	* @brief Enable the DMA2D.
327	* @param __HANDLE__: DMA2D handle
328	* @retval None.
329	*/
330	#define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR \|= DMA2D_CR_START)
331
332	/**
333	* @brief Disable the DMA2D.
334	* @param __HANDLE__: DMA2D handle
335	* @retval None.
336	*/
337	#define __HAL_DMA2D_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~DMA2D_CR_START)
338
339	/* Interrupt & Flag management */
340	/**
341	* @brief Get the DMA2D pending flags.
342	* @param __HANDLE__: DMA2D handle
343	* @param __FLAG__: Get the specified flag.
344	* This parameter can be any combination of the following values:
345	* @arg DMA2D_FLAG_CE: Configuration error flag
346	* @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
347	* @arg DMA2D_FLAG_CAE: C-LUT access error flag
348	* @arg DMA2D_FLAG_TW: Transfer Watermark flag
349	* @arg DMA2D_FLAG_TC: Transfer complete flag
350	* @arg DMA2D_FLAG_TE: Transfer error flag
351	* @retval The state of FLAG.
352	*/
353	#define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
354
355	/**
356	* @brief Clears the DMA2D pending flags.
357	* @param __HANDLE__: DMA2D handle
358	* @param __FLAG__: specifies the flag to clear.
359	* This parameter can be any combination of the following values:
360	* @arg DMA2D_FLAG_CE: Configuration error flag
361	* @arg DMA2D_FLAG_CTC: C-LUT transfer complete flag
362	* @arg DMA2D_FLAG_CAE: C-LUT access error flag
363	* @arg DMA2D_FLAG_TW: Transfer Watermark flag
364	* @arg DMA2D_FLAG_TC: Transfer complete flag
365	* @arg DMA2D_FLAG_TE: Transfer error flag
366	* @retval None
367	*/
368	#define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
369
370	/**
371	* @brief Enables the specified DMA2D interrupts.
372	* @param __HANDLE__: DMA2D handle
373	* @param __INTERRUPT__: specifies the DMA2D interrupt sources to be enabled.
374	* This parameter can be any combination of the following values:
375	* @arg DMA2D_IT_CE: Configuration error interrupt mask
376	* @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
377	* @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
378	* @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
379	* @arg DMA2D_IT_TC: Transfer complete interrupt mask
380	* @arg DMA2D_IT_TE: Transfer error interrupt mask
381	* @retval None
382	*/
383	#define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR \|= (__INTERRUPT__))
384
385	/**
386	* @brief Disables the specified DMA2D interrupts.
387	* @param __HANDLE__: DMA2D handle
388	* @param __INTERRUPT__: specifies the DMA2D interrupt sources to be disabled.
389	* This parameter can be any combination of the following values:
390	* @arg DMA2D_IT_CE: Configuration error interrupt mask
391	* @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
392	* @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
393	* @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
394	* @arg DMA2D_IT_TC: Transfer complete interrupt mask
395	* @arg DMA2D_IT_TE: Transfer error interrupt mask
396	* @retval None
397	*/
398	#define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
399
400	/**
401	* @brief Checks whether the specified DMA2D interrupt has occurred or not.
402	* @param __HANDLE__: DMA2D handle
403	* @param __INTERRUPT__: specifies the DMA2D interrupt source to check.
404	* This parameter can be one of the following values:
405	* @arg DMA2D_IT_CE: Configuration error interrupt mask
406	* @arg DMA2D_IT_CTC: C-LUT transfer complete interrupt mask
407	* @arg DMA2D_IT_CAE: C-LUT access error interrupt mask
408	* @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
409	* @arg DMA2D_IT_TC: Transfer complete interrupt mask
410	* @arg DMA2D_IT_TE: Transfer error interrupt mask
411	* @retval The state of INTERRUPT.
412	*/
413	#define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
414	/**
415	* @}
416	*/
417
418	/* Exported functions --------------------------------------------------------*/
419	/** @defgroup DMA2D_Exported_Functions DMA2D Exported Functions
420	* @{
421	*/
422	/* Initialization and de-initialization functions *******************************/
423	HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
424	HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
425	void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
426	void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
427
428	/* IO operation functions *******************************************************/
429	HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
430	HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
431	HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
432	HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
433	HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
434	HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
435	HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
436	HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
437	void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
438
439	/* Peripheral Control functions *************************************************/
440	HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
441	HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
442	HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
443	HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
444	HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
445
446	/* Peripheral State functions ***************************************************/
447	HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
448	uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
449	/**
450	* @}
451	*/
452
453	/* Private types -------------------------------------------------------------*/
454	/** @defgroup DMA2D_Private_Types DMA2D Private Types
455	* @{
456	*/
457
458	/**
459	* @}
460	*/
461
462	/* Private defines -------------------------------------------------------------*/
463	/** @defgroup DMA2D_Private_Defines DMA2D Private Defines
464	* @{
465	*/
466
467	/**
468	* @}
469	*/
470
471	/* Private variables ---------------------------------------------------------*/
472	/** @defgroup DMA2D_Private_Variables DMA2D Private Variables
473	* @{
474	*/
475
476	/**
477	* @}
478	*/
479
480	/* Private constants ---------------------------------------------------------*/
481	/** @defgroup DMA2D_Private_Constants DMA2D Private Constants
482	* @{
483	*/
484
485	/**
486	* @}
487	*/
488
489	/* Private macros ------------------------------------------------------------*/
490	/** @defgroup DMA2D_Private_Macros DMA2D Private Macros
491	* @{
492	*/
493	#define IS_DMA2D_LAYER(LAYER) ((LAYER) <= MAX_DMA2D_LAYER)
494	#define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) \|\| ((MODE) == DMA2D_M2M_PFC) \|\| \
495	((MODE) == DMA2D_M2M_BLEND) \|\| ((MODE) == DMA2D_R2M))
496	#define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) \|\| ((MODE_ARGB) == DMA2D_RGB888) \|\| \
497	((MODE_ARGB) == DMA2D_RGB565) \|\| ((MODE_ARGB) == DMA2D_ARGB1555) \|\| \
498	((MODE_ARGB) == DMA2D_ARGB4444))
499	#define IS_DMA2D_COLOR(COLOR) ((COLOR) <= COLOR_VALUE)
500	#define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
501	#define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
502	#define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
503	#define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == CM_ARGB8888) \|\| ((INPUT_CM) == CM_RGB888) \|\| \
504	((INPUT_CM) == CM_RGB565) \|\| ((INPUT_CM) == CM_ARGB1555) \|\| \
505	((INPUT_CM) == CM_ARGB4444) \|\| ((INPUT_CM) == CM_L8) \|\| \
506	((INPUT_CM) == CM_AL44) \|\| ((INPUT_CM) == CM_AL88) \|\| \
507	((INPUT_CM) == CM_L4) \|\| ((INPUT_CM) == CM_A8) \|\| \
508	((INPUT_CM) == CM_A4))
509	#define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) \|\| \
510	((AlphaMode) == DMA2D_REPLACE_ALPHA) \|\| \
511	((AlphaMode) == DMA2D_COMBINE_ALPHA))
512	#define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) \|\| ((CLUT_CM) == DMA2D_CCM_RGB888))
513	#define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
514	#define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
515	#define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) \|\| ((IT) == DMA2D_IT_CAE) \|\| \
516	((IT) == DMA2D_IT_TW) \|\| ((IT) == DMA2D_IT_TC) \|\| \
517	((IT) == DMA2D_IT_TE) \|\| ((IT) == DMA2D_IT_CE))
518	#define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) \|\| ((FLAG) == DMA2D_FLAG_CAE) \|\| \
519	((FLAG) == DMA2D_FLAG_TW) \|\| ((FLAG) == DMA2D_FLAG_TC) \|\| \
520	((FLAG) == DMA2D_FLAG_TE) \|\| ((FLAG) == DMA2D_FLAG_CE))
521	/**
522	* @}
523	*/
524
525	/* Private functions prototypes ---------------------------------------------------------*/
526	/** @defgroup DMA2D_Private_Functions_Prototypes DMA2D Private Functions Prototypes
527	* @{
528	*/
529
530	/**
531	* @}
532	*/
533
534	/* Private functions ---------------------------------------------------------*/
535	/** @defgroup DMA2D_Private_Functions DMA2D Private Functions
536	* @{
537	*/
538
539	/**
540	* @}
541	*/
542
543	/**
544	* @}
545	*/
546
547	/**
548	* @}
549	*/
550
551
552	#ifdef __cplusplus
553	}
554	#endif
555
556	#endif /* __STM32F7xx_HAL_DMA2D_H */
557
558
559	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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