| 1 | /** |
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| 2 | ****************************************************************************** |
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| 3 | * @file startup_stm32f746xx.s |
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| 4 | * @author MCD Application Team |
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| 5 | * @Version V1.0.1 |
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| 6 | * @Date 25-June-2015 |
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| 7 | * @brief STM32F746xx Devices vector table for GCC based toolchain. |
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| 8 | * This module performs: |
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| 9 | * - Set the initial SP |
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| 10 | * - Set the initial PC == Reset_Handler, |
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| 11 | * - Set the vector table entries with the exceptions ISR address |
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| 12 | * - Branches to main in the C library (which eventually |
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| 13 | * calls main()). |
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| 14 | * After Reset the Cortex-M7 processor is in Thread mode, |
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| 15 | * priority is Privileged, and the Stack is set to Main. |
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| 16 | ****************************************************************************** |
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| 17 | * @attention |
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| 18 | * |
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| 19 | * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> |
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| 20 | * |
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| 21 | * Redistribution and use in source and binary forms, with or without modification, |
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| 22 | * are permitted provided that the following conditions are met: |
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| 23 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 24 | * this list of conditions and the following disclaimer. |
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| 25 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 26 | * this list of conditions and the following disclaimer in the documentation |
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| 27 | * and/or other materials provided with the distribution. |
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| 28 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 29 | * may be used to endorse or promote products derived from this software |
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| 30 | * without specific prior written permission. |
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| 31 | * |
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| 32 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 33 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 34 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 35 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 36 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 37 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 38 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 39 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 40 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 41 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 42 | * |
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| 43 | ****************************************************************************** |
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| 44 | */ |
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| 45 | |
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| 46 | .syntax unified |
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| 47 | .cpu cortex-m7 |
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| 48 | .fpu softvfp |
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| 49 | .thumb |
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| 50 | |
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| 51 | .global g_pfnVectors |
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| 52 | .global Default_Handler |
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| 53 | |
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| 54 | /* start address for the initialization values of the .data section. |
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| 55 | defined in linker script */ |
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| 56 | .word _sidata |
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| 57 | /* start address for the .data section. defined in linker script */ |
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| 58 | .word _sdata |
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| 59 | /* end address for the .data section. defined in linker script */ |
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| 60 | .word _edata |
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| 61 | /* start address for the .bss section. defined in linker script */ |
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| 62 | .word _sbss |
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| 63 | /* end address for the .bss section. defined in linker script */ |
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| 64 | .word _ebss |
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| 65 | /* stack used for SystemInit_ExtMemCtl; always internal RAM used */ |
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| 66 | |
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| 67 | /** |
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| 68 | * @brief This is the code that gets called when the processor first |
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| 69 | * starts execution following a reset event. Only the absolutely |
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| 70 | * necessary set is performed, after which the application |
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| 71 | * supplied main() routine is called. |
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| 72 | * @param None |
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| 73 | * @retval : None |
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| 74 | */ |
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| 75 | |
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| 76 | .section .text.Reset_Handler |
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| 77 | .weak Reset_Handler |
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| 78 | .type Reset_Handler, %function |
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| 79 | Reset_Handler: |
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| 80 | ldr sp, =_estack /* set stack pointer */ |
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| 81 | |
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| 82 | /* Copy the data segment initializers from flash to SRAM */ |
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| 83 | movs r1, #0 |
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| 84 | b LoopCopyDataInit |
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| 85 | |
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| 86 | CopyDataInit: |
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| 87 | ldr r3, =_sidata |
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| 88 | ldr r3, [r3, r1] |
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| 89 | str r3, [r0, r1] |
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| 90 | adds r1, r1, #4 |
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| 91 | |
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| 92 | LoopCopyDataInit: |
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| 93 | ldr r0, =_sdata |
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| 94 | ldr r3, =_edata |
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| 95 | adds r2, r0, r1 |
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| 96 | cmp r2, r3 |
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| 97 | bcc CopyDataInit |
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| 98 | ldr r2, =_sbss |
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| 99 | b LoopFillZerobss |
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| 100 | /* Zero fill the bss segment. */ |
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| 101 | FillZerobss: |
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| 102 | movs r3, #0 |
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| 103 | str r3, [r2], #4 |
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| 104 | |
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| 105 | LoopFillZerobss: |
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| 106 | ldr r3, = _ebss |
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| 107 | cmp r2, r3 |
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| 108 | bcc FillZerobss |
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| 109 | |
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| 110 | /* Call the clock system initialization function.*/ |
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| 111 | bl SystemInit |
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| 112 | /* Call static constructors */ |
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| 113 | bl __libc_init_array |
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| 114 | /* Call the application's entry point.*/ |
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| 115 | bl main |
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| 116 | bx lr |
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| 117 | .size Reset_Handler, .-Reset_Handler |
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| 118 | |
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| 119 | /** |
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| 120 | * @brief This is the code that gets called when the processor receives an |
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| 121 | * unexpected interrupt. This simply enters an infinite loop, preserving |
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| 122 | * the system state for examination by a debugger. |
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| 123 | * @param None |
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| 124 | * @retval None |
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| 125 | */ |
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| 126 | .section .text.Default_Handler,"ax",%progbits |
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| 127 | Default_Handler: |
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| 128 | Infinite_Loop: |
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| 129 | b Infinite_Loop |
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| 130 | .size Default_Handler, .-Default_Handler |
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| 131 | /****************************************************************************** |
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| 132 | * |
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| 133 | * The minimal vector table for a Cortex M7. Note that the proper constructs |
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| 134 | * must be placed on this to ensure that it ends up at physical address |
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| 135 | * 0x0000.0000. |
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| 136 | * |
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| 137 | *******************************************************************************/ |
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| 138 | .section .isr_vector,"a",%progbits |
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| 139 | .type g_pfnVectors, %object |
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| 140 | .size g_pfnVectors, .-g_pfnVectors |
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| 141 | |
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| 142 | |
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| 143 | g_pfnVectors: |
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| 144 | .word _estack |
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| 145 | .word Reset_Handler |
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| 146 | |
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| 147 | .word NMI_Handler |
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| 148 | .word HardFault_Handler |
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| 149 | .word MemManage_Handler |
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| 150 | .word BusFault_Handler |
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| 151 | .word UsageFault_Handler |
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| 152 | .word 0 |
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| 153 | .word 0 |
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| 154 | .word 0 |
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| 155 | .word 0 |
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| 156 | .word SVC_Handler |
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| 157 | .word DebugMon_Handler |
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| 158 | .word 0 |
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| 159 | .word PendSV_Handler |
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| 160 | .word SysTick_Handler |
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| 161 | |
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| 162 | /* External Interrupts */ |
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| 163 | .word WWDG_IRQHandler /* Window WatchDog */ |
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| 164 | .word PVD_IRQHandler /* PVD through EXTI Line detection */ |
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| 165 | .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ |
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| 166 | .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ |
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| 167 | .word FLASH_IRQHandler /* FLASH */ |
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| 168 | .word RCC_IRQHandler /* RCC */ |
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| 169 | .word EXTI0_IRQHandler /* EXTI Line0 */ |
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| 170 | .word EXTI1_IRQHandler /* EXTI Line1 */ |
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| 171 | .word EXTI2_IRQHandler /* EXTI Line2 */ |
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| 172 | .word EXTI3_IRQHandler /* EXTI Line3 */ |
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| 173 | .word EXTI4_IRQHandler /* EXTI Line4 */ |
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| 174 | .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ |
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| 175 | .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ |
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| 176 | .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ |
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| 177 | .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ |
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| 178 | .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ |
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| 179 | .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ |
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| 180 | .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ |
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| 181 | .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ |
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| 182 | .word CAN1_TX_IRQHandler /* CAN1 TX */ |
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| 183 | .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ |
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| 184 | .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ |
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| 185 | .word CAN1_SCE_IRQHandler /* CAN1 SCE */ |
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| 186 | .word EXTI9_5_IRQHandler /* External Line[9:5]s */ |
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| 187 | .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ |
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| 188 | .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ |
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| 189 | .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ |
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| 190 | .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ |
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| 191 | .word TIM2_IRQHandler /* TIM2 */ |
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| 192 | .word TIM3_IRQHandler /* TIM3 */ |
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| 193 | .word TIM4_IRQHandler /* TIM4 */ |
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| 194 | .word I2C1_EV_IRQHandler /* I2C1 Event */ |
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| 195 | .word I2C1_ER_IRQHandler /* I2C1 Error */ |
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| 196 | .word I2C2_EV_IRQHandler /* I2C2 Event */ |
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| 197 | .word I2C2_ER_IRQHandler /* I2C2 Error */ |
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| 198 | .word SPI1_IRQHandler /* SPI1 */ |
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| 199 | .word SPI2_IRQHandler /* SPI2 */ |
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| 200 | .word USART1_IRQHandler /* USART1 */ |
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| 201 | .word USART2_IRQHandler /* USART2 */ |
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| 202 | .word USART3_IRQHandler /* USART3 */ |
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| 203 | .word EXTI15_10_IRQHandler /* External Line[15:10]s */ |
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| 204 | .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ |
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| 205 | .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ |
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| 206 | .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ |
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| 207 | .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ |
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| 208 | .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ |
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| 209 | .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ |
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| 210 | .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ |
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| 211 | .word FMC_IRQHandler /* FMC */ |
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| 212 | .word SDMMC1_IRQHandler /* SDMMC1 */ |
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| 213 | .word TIM5_IRQHandler /* TIM5 */ |
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| 214 | .word SPI3_IRQHandler /* SPI3 */ |
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| 215 | .word UART4_IRQHandler /* UART4 */ |
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| 216 | .word UART5_IRQHandler /* UART5 */ |
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| 217 | .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ |
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| 218 | .word TIM7_IRQHandler /* TIM7 */ |
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| 219 | .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ |
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| 220 | .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ |
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| 221 | .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ |
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| 222 | .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ |
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| 223 | .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ |
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| 224 | .word ETH_IRQHandler /* Ethernet */ |
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| 225 | .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ |
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| 226 | .word CAN2_TX_IRQHandler /* CAN2 TX */ |
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| 227 | .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ |
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| 228 | .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ |
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| 229 | .word CAN2_SCE_IRQHandler /* CAN2 SCE */ |
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| 230 | .word OTG_FS_IRQHandler /* USB OTG FS */ |
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| 231 | .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ |
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| 232 | .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ |
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| 233 | .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ |
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| 234 | .word USART6_IRQHandler /* USART6 */ |
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| 235 | .word I2C3_EV_IRQHandler /* I2C3 event */ |
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| 236 | .word I2C3_ER_IRQHandler /* I2C3 error */ |
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| 237 | .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ |
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| 238 | .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ |
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| 239 | .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ |
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| 240 | .word OTG_HS_IRQHandler /* USB OTG HS */ |
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| 241 | .word DCMI_IRQHandler /* DCMI */ |
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| 242 | .word 0 /* Reserved */ |
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| 243 | .word RNG_IRQHandler /* Rng */ |
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| 244 | .word FPU_IRQHandler /* FPU */ |
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| 245 | .word UART7_IRQHandler /* UART7 */ |
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| 246 | .word UART8_IRQHandler /* UART8 */ |
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| 247 | .word SPI4_IRQHandler /* SPI4 */ |
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| 248 | .word SPI5_IRQHandler /* SPI5 */ |
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| 249 | .word SPI6_IRQHandler /* SPI6 */ |
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| 250 | .word SAI1_IRQHandler /* SAI1 */ |
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| 251 | .word LTDC_IRQHandler /* LTDC */ |
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| 252 | .word LTDC_ER_IRQHandler /* LTDC error */ |
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| 253 | .word DMA2D_IRQHandler /* DMA2D */ |
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| 254 | .word SAI2_IRQHandler /* SAI2 */ |
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| 255 | .word QUADSPI_IRQHandler /* QUADSPI */ |
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| 256 | .word LPTIM1_IRQHandler /* LPTIM1 */ |
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| 257 | .word CEC_IRQHandler /* HDMI_CEC */ |
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| 258 | .word I2C4_EV_IRQHandler /* I2C4 Event */ |
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| 259 | .word I2C4_ER_IRQHandler /* I2C4 Error */ |
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| 260 | .word SPDIF_RX_IRQHandler /* SPDIF_RX */ |
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| 261 | |
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| 262 | /******************************************************************************* |
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| 263 | * |
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| 264 | * Provide weak aliases for each Exception handler to the Default_Handler. |
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| 265 | * As they are weak aliases, any function with the same name will override |
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| 266 | * this definition. |
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| 267 | * |
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| 268 | *******************************************************************************/ |
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| 269 | .weak NMI_Handler |
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| 270 | .thumb_set NMI_Handler,Default_Handler |
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| 271 | |
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| 272 | .weak HardFault_Handler |
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| 273 | .thumb_set HardFault_Handler,Default_Handler |
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| 274 | |
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| 275 | .weak MemManage_Handler |
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| 276 | .thumb_set MemManage_Handler,Default_Handler |
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| 277 | |
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| 278 | .weak BusFault_Handler |
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| 279 | .thumb_set BusFault_Handler,Default_Handler |
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| 280 | |
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| 281 | .weak UsageFault_Handler |
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| 282 | .thumb_set UsageFault_Handler,Default_Handler |
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| 283 | |
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| 284 | .weak SVC_Handler |
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| 285 | .thumb_set SVC_Handler,Default_Handler |
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| 286 | |
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| 287 | .weak DebugMon_Handler |
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| 288 | .thumb_set DebugMon_Handler,Default_Handler |
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| 289 | |
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| 290 | .weak PendSV_Handler |
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| 291 | .thumb_set PendSV_Handler,Default_Handler |
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| 292 | |
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| 293 | .weak SysTick_Handler |
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| 294 | .thumb_set SysTick_Handler,Default_Handler |
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| 295 | |
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| 296 | .weak WWDG_IRQHandler |
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| 297 | .thumb_set WWDG_IRQHandler,Default_Handler |
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| 298 | |
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| 299 | .weak PVD_IRQHandler |
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| 300 | .thumb_set PVD_IRQHandler,Default_Handler |
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| 301 | |
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| 302 | .weak TAMP_STAMP_IRQHandler |
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| 303 | .thumb_set TAMP_STAMP_IRQHandler,Default_Handler |
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| 304 | |
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| 305 | .weak RTC_WKUP_IRQHandler |
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| 306 | .thumb_set RTC_WKUP_IRQHandler,Default_Handler |
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| 307 | |
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| 308 | .weak FLASH_IRQHandler |
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| 309 | .thumb_set FLASH_IRQHandler,Default_Handler |
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| 310 | |
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| 311 | .weak RCC_IRQHandler |
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| 312 | .thumb_set RCC_IRQHandler,Default_Handler |
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| 313 | |
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| 314 | .weak EXTI0_IRQHandler |
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| 315 | .thumb_set EXTI0_IRQHandler,Default_Handler |
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| 316 | |
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| 317 | .weak EXTI1_IRQHandler |
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| 318 | .thumb_set EXTI1_IRQHandler,Default_Handler |
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| 319 | |
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| 320 | .weak EXTI2_IRQHandler |
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| 321 | .thumb_set EXTI2_IRQHandler,Default_Handler |
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| 322 | |
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| 323 | .weak EXTI3_IRQHandler |
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| 324 | .thumb_set EXTI3_IRQHandler,Default_Handler |
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| 325 | |
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| 326 | .weak EXTI4_IRQHandler |
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| 327 | .thumb_set EXTI4_IRQHandler,Default_Handler |
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| 328 | |
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| 329 | .weak DMA1_Stream0_IRQHandler |
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| 330 | .thumb_set DMA1_Stream0_IRQHandler,Default_Handler |
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| 331 | |
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| 332 | .weak DMA1_Stream1_IRQHandler |
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| 333 | .thumb_set DMA1_Stream1_IRQHandler,Default_Handler |
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| 334 | |
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| 335 | .weak DMA1_Stream2_IRQHandler |
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| 336 | .thumb_set DMA1_Stream2_IRQHandler,Default_Handler |
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| 337 | |
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| 338 | .weak DMA1_Stream3_IRQHandler |
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| 339 | .thumb_set DMA1_Stream3_IRQHandler,Default_Handler |
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| 340 | |
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| 341 | .weak DMA1_Stream4_IRQHandler |
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| 342 | .thumb_set DMA1_Stream4_IRQHandler,Default_Handler |
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| 343 | |
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| 344 | .weak DMA1_Stream5_IRQHandler |
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| 345 | .thumb_set DMA1_Stream5_IRQHandler,Default_Handler |
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| 346 | |
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| 347 | .weak DMA1_Stream6_IRQHandler |
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| 348 | .thumb_set DMA1_Stream6_IRQHandler,Default_Handler |
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| 349 | |
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| 350 | .weak ADC_IRQHandler |
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| 351 | .thumb_set ADC_IRQHandler,Default_Handler |
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| 352 | |
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| 353 | .weak CAN1_TX_IRQHandler |
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| 354 | .thumb_set CAN1_TX_IRQHandler,Default_Handler |
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| 355 | |
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| 356 | .weak CAN1_RX0_IRQHandler |
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| 357 | .thumb_set CAN1_RX0_IRQHandler,Default_Handler |
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| 358 | |
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| 359 | .weak CAN1_RX1_IRQHandler |
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| 360 | .thumb_set CAN1_RX1_IRQHandler,Default_Handler |
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| 361 | |
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| 362 | .weak CAN1_SCE_IRQHandler |
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| 363 | .thumb_set CAN1_SCE_IRQHandler,Default_Handler |
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| 364 | |
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| 365 | .weak EXTI9_5_IRQHandler |
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| 366 | .thumb_set EXTI9_5_IRQHandler,Default_Handler |
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| 367 | |
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| 368 | .weak TIM1_BRK_TIM9_IRQHandler |
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| 369 | .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler |
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| 370 | |
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| 371 | .weak TIM1_UP_TIM10_IRQHandler |
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| 372 | .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler |
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| 373 | |
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| 374 | .weak TIM1_TRG_COM_TIM11_IRQHandler |
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| 375 | .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler |
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| 376 | |
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| 377 | .weak TIM1_CC_IRQHandler |
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| 378 | .thumb_set TIM1_CC_IRQHandler,Default_Handler |
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| 379 | |
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| 380 | .weak TIM2_IRQHandler |
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| 381 | .thumb_set TIM2_IRQHandler,Default_Handler |
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| 382 | |
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| 383 | .weak TIM3_IRQHandler |
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| 384 | .thumb_set TIM3_IRQHandler,Default_Handler |
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| 385 | |
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| 386 | .weak TIM4_IRQHandler |
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| 387 | .thumb_set TIM4_IRQHandler,Default_Handler |
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| 388 | |
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| 389 | .weak I2C1_EV_IRQHandler |
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| 390 | .thumb_set I2C1_EV_IRQHandler,Default_Handler |
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| 391 | |
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| 392 | .weak I2C1_ER_IRQHandler |
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| 393 | .thumb_set I2C1_ER_IRQHandler,Default_Handler |
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| 394 | |
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| 395 | .weak I2C2_EV_IRQHandler |
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| 396 | .thumb_set I2C2_EV_IRQHandler,Default_Handler |
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| 397 | |
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| 398 | .weak I2C2_ER_IRQHandler |
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| 399 | .thumb_set I2C2_ER_IRQHandler,Default_Handler |
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| 400 | |
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| 401 | .weak SPI1_IRQHandler |
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| 402 | .thumb_set SPI1_IRQHandler,Default_Handler |
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| 403 | |
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| 404 | .weak SPI2_IRQHandler |
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| 405 | .thumb_set SPI2_IRQHandler,Default_Handler |
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| 406 | |
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| 407 | .weak USART1_IRQHandler |
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| 408 | .thumb_set USART1_IRQHandler,Default_Handler |
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| 409 | |
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| 410 | .weak USART2_IRQHandler |
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| 411 | .thumb_set USART2_IRQHandler,Default_Handler |
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| 412 | |
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| 413 | .weak USART3_IRQHandler |
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| 414 | .thumb_set USART3_IRQHandler,Default_Handler |
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| 415 | |
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| 416 | .weak EXTI15_10_IRQHandler |
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| 417 | .thumb_set EXTI15_10_IRQHandler,Default_Handler |
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| 418 | |
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| 419 | .weak RTC_Alarm_IRQHandler |
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| 420 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler |
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| 421 | |
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| 422 | .weak OTG_FS_WKUP_IRQHandler |
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| 423 | .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler |
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| 424 | |
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| 425 | .weak TIM8_BRK_TIM12_IRQHandler |
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| 426 | .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler |
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| 427 | |
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| 428 | .weak TIM8_UP_TIM13_IRQHandler |
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| 429 | .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler |
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| 430 | |
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| 431 | .weak TIM8_TRG_COM_TIM14_IRQHandler |
|---|
| 432 | .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler |
|---|
| 433 | |
|---|
| 434 | .weak TIM8_CC_IRQHandler |
|---|
| 435 | .thumb_set TIM8_CC_IRQHandler,Default_Handler |
|---|
| 436 | |
|---|
| 437 | .weak DMA1_Stream7_IRQHandler |
|---|
| 438 | .thumb_set DMA1_Stream7_IRQHandler,Default_Handler |
|---|
| 439 | |
|---|
| 440 | .weak FMC_IRQHandler |
|---|
| 441 | .thumb_set FMC_IRQHandler,Default_Handler |
|---|
| 442 | |
|---|
| 443 | .weak SDMMC1_IRQHandler |
|---|
| 444 | .thumb_set SDMMC1_IRQHandler,Default_Handler |
|---|
| 445 | |
|---|
| 446 | .weak TIM5_IRQHandler |
|---|
| 447 | .thumb_set TIM5_IRQHandler,Default_Handler |
|---|
| 448 | |
|---|
| 449 | .weak SPI3_IRQHandler |
|---|
| 450 | .thumb_set SPI3_IRQHandler,Default_Handler |
|---|
| 451 | |
|---|
| 452 | .weak UART4_IRQHandler |
|---|
| 453 | .thumb_set UART4_IRQHandler,Default_Handler |
|---|
| 454 | |
|---|
| 455 | .weak UART5_IRQHandler |
|---|
| 456 | .thumb_set UART5_IRQHandler,Default_Handler |
|---|
| 457 | |
|---|
| 458 | .weak TIM6_DAC_IRQHandler |
|---|
| 459 | .thumb_set TIM6_DAC_IRQHandler,Default_Handler |
|---|
| 460 | |
|---|
| 461 | .weak TIM7_IRQHandler |
|---|
| 462 | .thumb_set TIM7_IRQHandler,Default_Handler |
|---|
| 463 | |
|---|
| 464 | .weak DMA2_Stream0_IRQHandler |
|---|
| 465 | .thumb_set DMA2_Stream0_IRQHandler,Default_Handler |
|---|
| 466 | |
|---|
| 467 | .weak DMA2_Stream1_IRQHandler |
|---|
| 468 | .thumb_set DMA2_Stream1_IRQHandler,Default_Handler |
|---|
| 469 | |
|---|
| 470 | .weak DMA2_Stream2_IRQHandler |
|---|
| 471 | .thumb_set DMA2_Stream2_IRQHandler,Default_Handler |
|---|
| 472 | |
|---|
| 473 | .weak DMA2_Stream3_IRQHandler |
|---|
| 474 | .thumb_set DMA2_Stream3_IRQHandler,Default_Handler |
|---|
| 475 | |
|---|
| 476 | .weak DMA2_Stream4_IRQHandler |
|---|
| 477 | .thumb_set DMA2_Stream4_IRQHandler,Default_Handler |
|---|
| 478 | |
|---|
| 479 | .weak DMA2_Stream4_IRQHandler |
|---|
| 480 | .thumb_set DMA2_Stream4_IRQHandler,Default_Handler |
|---|
| 481 | |
|---|
| 482 | .weak ETH_IRQHandler |
|---|
| 483 | .thumb_set ETH_IRQHandler,Default_Handler |
|---|
| 484 | |
|---|
| 485 | .weak ETH_WKUP_IRQHandler |
|---|
| 486 | .thumb_set ETH_WKUP_IRQHandler,Default_Handler |
|---|
| 487 | |
|---|
| 488 | .weak CAN2_TX_IRQHandler |
|---|
| 489 | .thumb_set CAN2_TX_IRQHandler,Default_Handler |
|---|
| 490 | |
|---|
| 491 | .weak CAN2_RX0_IRQHandler |
|---|
| 492 | .thumb_set CAN2_RX0_IRQHandler,Default_Handler |
|---|
| 493 | |
|---|
| 494 | .weak CAN2_RX1_IRQHandler |
|---|
| 495 | .thumb_set CAN2_RX1_IRQHandler,Default_Handler |
|---|
| 496 | |
|---|
| 497 | .weak CAN2_SCE_IRQHandler |
|---|
| 498 | .thumb_set CAN2_SCE_IRQHandler,Default_Handler |
|---|
| 499 | |
|---|
| 500 | .weak OTG_FS_IRQHandler |
|---|
| 501 | .thumb_set OTG_FS_IRQHandler,Default_Handler |
|---|
| 502 | |
|---|
| 503 | .weak DMA2_Stream5_IRQHandler |
|---|
| 504 | .thumb_set DMA2_Stream5_IRQHandler,Default_Handler |
|---|
| 505 | |
|---|
| 506 | .weak DMA2_Stream6_IRQHandler |
|---|
| 507 | .thumb_set DMA2_Stream6_IRQHandler,Default_Handler |
|---|
| 508 | |
|---|
| 509 | .weak DMA2_Stream7_IRQHandler |
|---|
| 510 | .thumb_set DMA2_Stream7_IRQHandler,Default_Handler |
|---|
| 511 | |
|---|
| 512 | .weak USART6_IRQHandler |
|---|
| 513 | .thumb_set USART6_IRQHandler,Default_Handler |
|---|
| 514 | |
|---|
| 515 | .weak I2C3_EV_IRQHandler |
|---|
| 516 | .thumb_set I2C3_EV_IRQHandler,Default_Handler |
|---|
| 517 | |
|---|
| 518 | .weak I2C3_ER_IRQHandler |
|---|
| 519 | .thumb_set I2C3_ER_IRQHandler,Default_Handler |
|---|
| 520 | |
|---|
| 521 | .weak OTG_HS_EP1_OUT_IRQHandler |
|---|
| 522 | .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler |
|---|
| 523 | |
|---|
| 524 | .weak OTG_HS_EP1_IN_IRQHandler |
|---|
| 525 | .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler |
|---|
| 526 | |
|---|
| 527 | .weak OTG_HS_WKUP_IRQHandler |
|---|
| 528 | .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler |
|---|
| 529 | |
|---|
| 530 | .weak OTG_HS_IRQHandler |
|---|
| 531 | .thumb_set OTG_HS_IRQHandler,Default_Handler |
|---|
| 532 | |
|---|
| 533 | .weak DCMI_IRQHandler |
|---|
| 534 | .thumb_set DCMI_IRQHandler,Default_Handler |
|---|
| 535 | |
|---|
| 536 | .weak RNG_IRQHandler |
|---|
| 537 | .thumb_set RNG_IRQHandler,Default_Handler |
|---|
| 538 | |
|---|
| 539 | .weak FPU_IRQHandler |
|---|
| 540 | .thumb_set FPU_IRQHandler,Default_Handler |
|---|
| 541 | |
|---|
| 542 | .weak UART7_IRQHandler |
|---|
| 543 | .thumb_set UART7_IRQHandler,Default_Handler |
|---|
| 544 | |
|---|
| 545 | .weak UART8_IRQHandler |
|---|
| 546 | .thumb_set UART8_IRQHandler,Default_Handler |
|---|
| 547 | |
|---|
| 548 | .weak SPI4_IRQHandler |
|---|
| 549 | .thumb_set SPI4_IRQHandler,Default_Handler |
|---|
| 550 | |
|---|
| 551 | .weak SPI5_IRQHandler |
|---|
| 552 | .thumb_set SPI5_IRQHandler,Default_Handler |
|---|
| 553 | |
|---|
| 554 | .weak SPI6_IRQHandler |
|---|
| 555 | .thumb_set SPI6_IRQHandler,Default_Handler |
|---|
| 556 | |
|---|
| 557 | .weak SAI1_IRQHandler |
|---|
| 558 | .thumb_set SAI1_IRQHandler,Default_Handler |
|---|
| 559 | |
|---|
| 560 | .weak LTDC_IRQHandler |
|---|
| 561 | .thumb_set LTDC_IRQHandler,Default_Handler |
|---|
| 562 | |
|---|
| 563 | .weak LTDC_ER_IRQHandler |
|---|
| 564 | .thumb_set LTDC_ER_IRQHandler,Default_Handler |
|---|
| 565 | |
|---|
| 566 | .weak DMA2D_IRQHandler |
|---|
| 567 | .thumb_set DMA2D_IRQHandler,Default_Handler |
|---|
| 568 | |
|---|
| 569 | .weak SAI2_IRQHandler |
|---|
| 570 | .thumb_set SAI2_IRQHandler,Default_Handler |
|---|
| 571 | |
|---|
| 572 | .weak QUADSPI_IRQHandler |
|---|
| 573 | .thumb_set QUADSPI_IRQHandler,Default_Handler |
|---|
| 574 | |
|---|
| 575 | .weak LPTIM1_IRQHandler |
|---|
| 576 | .thumb_set LPTIM1_IRQHandler,Default_Handler |
|---|
| 577 | |
|---|
| 578 | .weak CEC_IRQHandler |
|---|
| 579 | .thumb_set CEC_IRQHandler,Default_Handler |
|---|
| 580 | |
|---|
| 581 | .weak I2C4_EV_IRQHandler |
|---|
| 582 | .thumb_set I2C4_EV_IRQHandler,Default_Handler |
|---|
| 583 | |
|---|
| 584 | .weak I2C4_ER_IRQHandler |
|---|
| 585 | .thumb_set I2C4_ER_IRQHandler,Default_Handler |
|---|
| 586 | |
|---|
| 587 | .weak SPDIF_RX_IRQHandler |
|---|
| 588 | .thumb_set SPDIF_RX_IRQHandler,Default_Handler |
|---|
| 589 | |
|---|
| 590 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
|---|
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