[228ece9] | 1 | /* |
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| 2 | * Copyright (c) 2012 Sebastian Huber. All rights reserved. |
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| 3 | * |
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| 4 | * embedded brains GmbH |
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| 5 | * Obere Lagerstr. 30 |
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| 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <rtems@embedded-brains.de> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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| 12 | * http://www.rtems.com/license/LICENSE. |
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| 13 | */ |
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| 14 | |
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| 15 | #include <bsp/io.h> |
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[7be19f8] | 16 | #include <bsp/rcc.h> |
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[1485a58] | 17 | #include <bsp/stm32f4.h> |
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[228ece9] | 18 | |
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| 19 | #include <rtems.h> |
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| 20 | |
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[7be19f8] | 21 | RTEMS_STATIC_ASSERT(sizeof(stm32f4_gpio_config) == 4, size_of_config); |
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| 22 | |
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| 23 | void stm32f4_gpio_set_clock(int pin, bool set) |
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| 24 | { |
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| 25 | int port = STM32F4_GPIO_PORT_OF_PIN(pin); |
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| 26 | stm32f4_rcc_index index = STM32F4_RCC_GPIOA + port; |
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| 27 | |
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| 28 | stm32f4_rcc_set_clock(index, set); |
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| 29 | } |
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| 30 | |
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[228ece9] | 31 | static void clear_and_set( |
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| 32 | volatile uint32_t *reg, |
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| 33 | unsigned index, |
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| 34 | unsigned width, |
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| 35 | uint32_t set |
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| 36 | ) |
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| 37 | { |
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[7be19f8] | 38 | uint32_t mask = (1U << width) - 1U; |
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[228ece9] | 39 | unsigned shift = width * index; |
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| 40 | uint32_t val = *reg; |
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| 41 | |
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| 42 | val &= ~(mask << shift); |
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| 43 | val |= set << shift; |
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| 44 | |
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| 45 | *reg = val; |
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| 46 | } |
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| 47 | |
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[1485a58] | 48 | #ifdef STM32F4_FAMILY_F10XXX |
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| 49 | #define STM32F4_AFIO_REMAP_ENTRY(mod, afio_reg_v, start_v, width_v, value_v) \ |
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| 50 | [mod] = { \ |
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| 51 | .afio_reg = afio_reg_v, \ |
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| 52 | .start = start_v, \ |
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| 53 | .width = width_v, \ |
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| 54 | .value = value_v, \ |
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| 55 | .reserved = 0 \ |
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| 56 | } |
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| 57 | |
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| 58 | typedef struct { |
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| 59 | uint16_t afio_reg : 3; |
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| 60 | uint16_t start : 5; |
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| 61 | uint16_t width : 2; |
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| 62 | uint16_t value : 3; |
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| 63 | uint16_t reserved : 3; |
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| 64 | } stm32f4_afio_remap_entry; |
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| 65 | |
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| 66 | static const stm32f4_afio_remap_entry stm32f4_afio_remap_table [] = { |
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| 67 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_DONT_CHANGE, 0, 0, 0, 0), |
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| 68 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_SPI1_0, 1, 0, 1, 0), |
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| 69 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_SPI1_1, 1, 0, 1, 1), |
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| 70 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_I2C1_0, 1, 1, 1, 0), |
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| 71 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_I2C1_1, 1, 1, 1, 1), |
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| 72 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_USART1_0, 1, 2, 1, 0), |
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| 73 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_USART1_1, 1, 2, 1, 1), |
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| 74 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_USART2_0, 1, 3, 1, 0), |
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| 75 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_USART2_1, 1, 3, 1, 1), |
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| 76 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_USART3_0, 1, 4, 2, 0), |
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| 77 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_USART3_1, 1, 4, 2, 1), |
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| 78 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_USART3_3, 1, 4, 2, 3), |
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| 79 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM1_0, 1, 6, 2, 0), |
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| 80 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM1_1, 1, 6, 2, 1), |
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| 81 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM1_3, 1, 6, 2, 3), |
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| 82 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM2_0, 1, 8, 2, 0), |
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| 83 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM2_1, 1, 8, 2, 1), |
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| 84 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM2_2, 1, 8, 2, 2), |
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| 85 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM2_3, 1, 8, 2, 3), |
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| 86 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM3_0, 1, 10, 2, 0), |
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| 87 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM3_2, 1, 10, 2, 2), |
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| 88 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM3_3, 1, 10, 2, 3), |
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| 89 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM4_0, 1, 12, 1, 0), |
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| 90 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM4_1, 1, 12, 1, 1), |
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| 91 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_CAN1_0, 1, 13, 2, 0), |
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| 92 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_CAN1_2, 1, 13, 2, 2), |
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| 93 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_CAN1_3, 1, 13, 2, 3), |
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| 94 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_PD01_0, 1, 15, 1, 0), |
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| 95 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_PD01_1, 1, 15, 1, 1), |
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| 96 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM5CH4_0, 1, 16, 1, 0), |
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| 97 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM5CH4_1, 1, 16, 1, 1), |
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| 98 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ADC1_ETRGINJ_0, 1, 17, 1, 0), |
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| 99 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ADC1_ETRGINJ_1, 1, 17, 1, 1), |
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| 100 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ADC1_ETRGREG_0, 1, 18, 1, 0), |
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| 101 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ADC1_ETRGREG_1, 1, 18, 1, 1), |
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| 102 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ADC2_ETRGINJ_0, 1, 19, 1, 0), |
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| 103 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ADC2_ETRGINJ_1, 1, 19, 1, 1), |
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| 104 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ADC2_ETRGREG_0, 1, 20, 1, 0), |
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| 105 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ADC2_ETRGREG_1, 1, 20, 1, 1), |
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| 106 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ETH_0, 1, 21, 1, 0), |
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| 107 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_ETH_1, 1, 21, 1, 1), |
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| 108 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_CAN2_0, 1, 22, 1, 0), |
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| 109 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_CAN2_1, 1, 22, 1, 1), |
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| 110 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_MII_RMII_0, 1, 23, 1, 0), |
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| 111 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_MII_RMII_1, 1, 23, 1, 1), |
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| 112 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_SWJ_0, 1, 24, 3, 0), |
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| 113 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_SWJ_1, 1, 24, 3, 1), |
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| 114 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_SWJ_2, 1, 24, 3, 2), |
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| 115 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_SWJ_4, 1, 24, 3, 4), |
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| 116 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_SPI3_0, 1, 28, 1, 0), |
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| 117 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_SPI3_1, 1, 28, 1, 1), |
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| 118 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM2ITR1_0, 1, 29, 1, 0), |
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| 119 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM2ITR1_1, 1, 29, 1, 1), |
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| 120 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_PTP_PPS_0, 1, 30, 1, 0), |
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| 121 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_PTP_PPS_1, 1, 30, 1, 1), |
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| 122 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM15_0, 6, 0, 1, 0), |
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| 123 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM15_1, 6, 0, 1, 1), |
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| 124 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM16_0, 6, 1, 1, 0), |
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| 125 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM16_1, 6, 1, 1, 1), |
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| 126 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM17_0, 6, 2, 1, 0), |
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| 127 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM17_1, 6, 2, 1, 1), |
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| 128 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_CEC_0, 6, 3, 1, 0), |
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| 129 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_CEC_1, 6, 3, 1, 1), |
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| 130 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM1_DMA_0, 6, 4, 1, 0), |
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| 131 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM1_DMA_1, 6, 4, 1, 1), |
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| 132 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM9_0, 6, 5, 1, 0), |
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| 133 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM9_1, 6, 5, 1, 1), |
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| 134 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM10_0, 6, 6, 1, 0), |
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| 135 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM10_1, 6, 6, 1, 1), |
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| 136 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM11_0, 6, 7, 1, 0), |
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| 137 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM11_1, 6, 7, 1, 1), |
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| 138 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM13_0, 6, 8, 1, 0), |
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| 139 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM13_1, 6, 8, 1, 1), |
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| 140 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM14_0, 6, 9, 1, 0), |
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| 141 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM14_1, 6, 9, 1, 1), |
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| 142 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_FSMC_0, 6, 10, 1, 0), |
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| 143 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_FSMC_1, 6, 10, 1, 1), |
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| 144 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM67_DAC_DMA_0, 6, 11, 1, 0), |
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| 145 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM67_DAC_DMA_1, 6, 11, 1, 1), |
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| 146 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM12_0, 6, 12, 1, 0), |
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| 147 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_TIM12_1, 6, 12, 1, 1), |
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| 148 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_MISC_0, 6, 13, 1, 0), |
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| 149 | STM32F4_AFIO_REMAP_ENTRY(STM32F4_GPIO_REMAP_MISC_1, 6, 13, 1, 1), |
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| 150 | }; |
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| 151 | |
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| 152 | static void set_remap_config(stm32f4_gpio_remap remap) |
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| 153 | { |
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| 154 | if(remap != STM32F4_GPIO_REMAP_DONT_CHANGE) |
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| 155 | { |
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| 156 | stm32f4_afio_remap_entry entry = stm32f4_afio_remap_table[remap]; |
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| 157 | volatile stm32f4_afio *afio = STM32F4_AFIO; |
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| 158 | volatile uint32_t *reg = ((uint32_t*) afio) + entry.afio_reg; |
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| 159 | uint32_t mask = (1 << entry.width) - 1; |
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| 160 | uint32_t value = *reg; |
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| 161 | |
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| 162 | value &= mask << entry.start; |
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| 163 | value |= entry.value << entry.start; |
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| 164 | |
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| 165 | *reg = value; |
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| 166 | } |
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| 167 | } |
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| 168 | |
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| 169 | #endif /* STM32F4_FAMILY_F10XXX */ |
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| 170 | |
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[7be19f8] | 171 | static void set_config(unsigned pin, const stm32f4_gpio_config *config) |
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[228ece9] | 172 | { |
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| 173 | unsigned port = STM32F4_GPIO_PORT_OF_PIN(pin); |
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| 174 | volatile stm32f4_gpio *gpio = STM32F4_GPIO(port); |
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| 175 | unsigned index = STM32F4_GPIO_INDEX_OF_PIN(pin); |
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[1485a58] | 176 | rtems_interrupt_level level; |
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| 177 | int set_or_clear_offset = config->fields.output ? 0 : 16; |
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| 178 | #ifdef STM32F4_FAMILY_F4XXXX |
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[7be19f8] | 179 | unsigned af_reg = index >> 3; |
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| 180 | unsigned af_index = index & 0x7; |
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[228ece9] | 181 | |
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| 182 | rtems_interrupt_disable(level); |
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[7be19f8] | 183 | gpio->bsrr = 1U << (index + set_or_clear_offset); |
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| 184 | clear_and_set(&gpio->pupdr, index, 2, config->fields.pupd); |
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| 185 | clear_and_set(&gpio->otyper, index, 1, config->fields.otype); |
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| 186 | clear_and_set(&gpio->ospeedr, index, 2, config->fields.ospeed); |
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| 187 | clear_and_set(&gpio->afr [af_reg], af_index, 4, config->fields.af); |
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| 188 | clear_and_set(&gpio->moder, index, 2, config->fields.mode); |
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[228ece9] | 189 | rtems_interrupt_enable(level); |
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[1485a58] | 190 | |
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| 191 | #endif /* STM32F4_FAMILY_F4XXXX */ |
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| 192 | #ifdef STM32F4_FAMILY_F10XXX |
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| 193 | unsigned cr_reg = index >> 3; |
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| 194 | unsigned cr_index = index & 3; |
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| 195 | |
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| 196 | rtems_interrupt_disable(level); |
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| 197 | gpio->bsrr = 1U << (index + set_or_clear_offset); |
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| 198 | clear_and_set(&gpio->cr[cr_reg], cr_index, 4, |
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| 199 | (config->fields.cnf << 2) | config->fields.mode); |
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| 200 | set_remap_config(config->fields.remap); |
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| 201 | rtems_interrupt_enable(level); |
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| 202 | |
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| 203 | #endif /* STM32F4_FAMILY_F10XXX */ |
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[228ece9] | 204 | } |
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| 205 | |
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[7be19f8] | 206 | void stm32f4_gpio_set_config(const stm32f4_gpio_config *config) |
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| 207 | { |
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| 208 | int current = config->fields.pin_first; |
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| 209 | int last = config->fields.pin_last; |
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| 210 | |
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[1485a58] | 211 | #ifdef STM32F4_FAMILY_F10XXX |
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| 212 | stm32f4_rcc_set_clock(STM32F4_RCC_AFIO, true); |
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| 213 | #endif /* STM32F4_FAMILY_F10XXX */ |
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| 214 | |
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[7be19f8] | 215 | while (current <= last) { |
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| 216 | stm32f4_gpio_set_clock(current, true); |
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| 217 | set_config(current, config); |
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| 218 | ++current; |
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| 219 | } |
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| 220 | } |
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| 221 | |
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| 222 | void stm32f4_gpio_set_config_array(const stm32f4_gpio_config *configs) |
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| 223 | { |
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| 224 | stm32f4_gpio_config terminal = STM32F4_GPIO_CONFIG_TERMINAL; |
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| 225 | |
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| 226 | while (configs->value != terminal.value) { |
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| 227 | stm32f4_gpio_set_config(configs); |
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| 228 | ++configs; |
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| 229 | } |
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| 230 | } |
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| 231 | |
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[228ece9] | 232 | void stm32f4_gpio_set_output(int pin, bool set) |
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| 233 | { |
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| 234 | int port = STM32F4_GPIO_PORT_OF_PIN(pin); |
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| 235 | volatile stm32f4_gpio *gpio = STM32F4_GPIO(port); |
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| 236 | int index = STM32F4_GPIO_INDEX_OF_PIN(pin); |
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[7be19f8] | 237 | int set_or_clear_offset = set ? 0 : 16; |
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[228ece9] | 238 | |
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[7be19f8] | 239 | gpio->bsrr = 1U << (index + set_or_clear_offset); |
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[228ece9] | 240 | } |
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| 241 | |
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| 242 | bool stm32f4_gpio_get_input(int pin) |
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| 243 | { |
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| 244 | int port = STM32F4_GPIO_PORT_OF_PIN(pin); |
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| 245 | volatile stm32f4_gpio *gpio = STM32F4_GPIO(port); |
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| 246 | int index = STM32F4_GPIO_INDEX_OF_PIN(pin); |
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| 247 | |
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[7be19f8] | 248 | return (gpio->idr & (1U << index)) != 0; |
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[228ece9] | 249 | } |
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