source: rtems/c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h @ e230fb4

4.115
Last change on this file since e230fb4 was e230fb4, checked in by Sebastian Huber <sebastian.huber@…>, on 03/29/12 at 19:23:14

bsp/stm32f4: New BSP
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*
2 * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Obere Lagerstr. 30
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#ifndef LIBBSP_ARM_STM32F4_STM32F4_H
16#define LIBBSP_ARM_STM32F4_STM32F4_H
17
18#include <bsp/utility.h>
19
20#define STM32F4_BASE 0x00
21
22typedef struct {
23        uint32_t reserved_00 [16];
24        uint32_t apb1enr;
25#define STM32F4_RCC_APB1ENR_DAC_EN BSP_BIT32(29)
26#define STM32F4_RCC_APB1ENR_PWR_EN BSP_BIT32(28)
27#define STM32F4_RCC_APB1ENR_CAN2_EN BSP_BIT32(26)
28#define STM32F4_RCC_APB1ENR_CAN1_EN BSP_BIT32(25)
29#define STM32F4_RCC_APB1ENR_I2C3_EN BSP_BIT32(23)
30#define STM32F4_RCC_APB1ENR_I2C2_EN BSP_BIT32(22)
31#define STM32F4_RCC_APB1ENR_I2C1_EN BSP_BIT32(21)
32#define STM32F4_RCC_APB1ENR_UART5_EN BSP_BIT32(20)
33#define STM32F4_RCC_APB1ENR_UART4_EN BSP_BIT32(19)
34#define STM32F4_RCC_APB1ENR_USART3_EN BSP_BIT32(18)
35#define STM32F4_RCC_APB1ENR_USART2_EN BSP_BIT32(17)
36#define STM32F4_RCC_APB1ENR_SPI3_EN BSP_BIT32(15)
37#define STM32F4_RCC_APB1ENR_SPI2_EN BSP_BIT32(14)
38#define STM32F4_RCC_APB1ENR_WWDG_EN BSP_BIT32(11)
39#define STM32F4_RCC_APB1ENR_TIM14_EN BSP_BIT32(8)
40#define STM32F4_RCC_APB1ENR_TIM13_EN BSP_BIT32(7)
41#define STM32F4_RCC_APB1ENR_TIM12_EN BSP_BIT32(6)
42#define STM32F4_RCC_APB1ENR_TIM7_EN BSP_BIT32(5)
43#define STM32F4_RCC_APB1ENR_TIM6_EN BSP_BIT32(4)
44#define STM32F4_RCC_APB1ENR_TIM5_EN BSP_BIT32(3)
45#define STM32F4_RCC_APB1ENR_TIM4_EN BSP_BIT32(2)
46#define STM32F4_RCC_APB1ENR_TIM3_EN BSP_BIT32(1)
47#define STM32F4_RCC_APB1ENR_TIM2_EN BSP_BIT32(0)
48        uint32_t apb2enr;
49#define STM32F4_RCC_APB2ENR_TIM11 BSP_BIT32(18)
50#define STM32F4_RCC_APB2ENR_TIM10_EN BSP_BIT32(17)
51#define STM32F4_RCC_APB2ENR_TIM9_EN BSP_BIT32(16)
52#define STM32F4_RCC_APB2ENR_SYSCFG_EN BSP_BIT32(14)
53#define STM32F4_RCC_APB2ENR_SPI1_EN BSP_BIT32(12)
54#define STM32F4_RCC_APB2ENR_SDIO_EN BSP_BIT32(11)
55#define STM32F4_RCC_APB2ENR_ADC3_EN BSP_BIT32(10)
56#define STM32F4_RCC_APB2ENR_ADC2_EN BSP_BIT32(9)
57#define STM32F4_RCC_APB2ENR_ADC1_EN BSP_BIT32(8)
58#define STM32F4_RCC_APB2ENR_USART6_EN BSP_BIT32(5)
59#define STM32F4_RCC_APB2ENR_USART1_EN BSP_BIT32(4)
60#define STM32F4_RCC_APB2ENR_TIM8_EN BSP_BIT32(1)
61#define STM32F4_RCC_APB2ENR_TIM1_EN BSP_BIT32(0)
62} stm32f4_rcc;
63
64#define STM32F4_RCC (*(volatile stm32f4_rcc *) (STM32F4_BASE + 0x40023800))
65
66typedef struct {
67        uint32_t sr;
68#define STM32F4_USART_SR_CTS BSP_BIT32(9)
69#define STM32F4_USART_SR_LBD BSP_BIT32(8)
70#define STM32F4_USART_SR_TXE BSP_BIT32(7)
71#define STM32F4_USART_SR_TC BSP_BIT32(6)
72#define STM32F4_USART_SR_RXNE BSP_BIT32(5)
73#define STM32F4_USART_SR_IDLE BSP_BIT32(4)
74#define STM32F4_USART_SR_ORE BSP_BIT32(3)
75#define STM32F4_USART_SR_NF BSP_BIT32(2)
76#define STM32F4_USART_SR_FE BSP_BIT32(1)
77#define STM32F4_USART_SR_PE BSP_BIT32(0)
78        uint32_t dr;
79#define STM32F4_USART_DR(val) BSP_FLD32(val, 0, 7)
80#define STM32F4_USART_DR_GET(reg) BSP_FLD32GET(reg, 0, 7)
81#define STM32F4_USART_DR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
82        uint32_t bbr;
83#define STM32F4_USART_BBR_DIV_MANTISSA(val) BSP_FLD32(val, 4, 15)
84#define STM32F4_USART_BBR_DIV_MANTISSA_GET(reg) BSP_FLD32GET(reg, 4, 15)
85#define STM32F4_USART_BBR_DIV_MANTISSA_SET(reg, val) BSP_FLD32SET(reg, val, 4, 15)
86#define STM32F4_USART_BBR_DIV_FRACTION(val) BSP_FLD32(val, 0, 3)
87#define STM32F4_USART_BBR_DIV_FRACTION_GET(reg) BSP_FLD32GET(reg, 0, 3)
88#define STM32F4_USART_BBR_DIV_FRACTION_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
89        uint32_t cr1;
90#define STM32F4_USART_CR1_OVER8 BSP_BIT32(15)
91#define STM32F4_USART_CR1_UE BSP_BIT32(13)
92#define STM32F4_USART_CR1_M BSP_BIT32(12)
93#define STM32F4_USART_CR1_WAKE BSP_BIT32(11)
94#define STM32F4_USART_CR1_PCE BSP_BIT32(10)
95#define STM32F4_USART_CR1_PS BSP_BIT32(9)
96#define STM32F4_USART_CR1_PEIE BSP_BIT32(8)
97#define STM32F4_USART_CR1_TXEIE BSP_BIT32(7)
98#define STM32F4_USART_CR1_TCIE BSP_BIT32(6)
99#define STM32F4_USART_CR1_RXNEIE BSP_BIT32(5)
100#define STM32F4_USART_CR1_IDLEIE BSP_BIT32(4)
101#define STM32F4_USART_CR1_TE BSP_BIT32(3)
102#define STM32F4_USART_CR1_RE BSP_BIT32(2)
103#define STM32F4_USART_CR1_RWU BSP_BIT32(1)
104#define STM32F4_USART_CR1_SBK BSP_BIT32(0)
105        uint32_t cr2;
106#define STM32F4_USART_CR2_LINEN BSP_BIT32(14)
107#define STM32F4_USART_CR2_STOP(val) BSP_FLD32(val, 12, 13)
108#define STM32F4_USART_CR2_STOP_GET(reg) BSP_FLD32GET(reg, 12, 13)
109#define STM32F4_USART_CR2_STOP_SET(reg, val) BSP_FLD32SET(reg, val, 12, 13)
110#define STM32F4_USART_CR2_CLKEN BSP_BIT32(11)
111#define STM32F4_USART_CR2_CPOL BSP_BIT32(10)
112#define STM32F4_USART_CR2_CPHA BSP_BIT32(9)
113#define STM32F4_USART_CR2_LBCL BSP_BIT32(8)
114#define STM32F4_USART_CR2_LBDIE BSP_BIT32(6)
115#define STM32F4_USART_CR2_LBDL BSP_BIT32(5)
116#define STM32F4_USART_CR2_ADD(val) BSP_FLD32(val, 0, 3)
117#define STM32F4_USART_CR2_ADD_GET(reg) BSP_FLD32GET(reg, 0, 3)
118#define STM32F4_USART_CR2_ADD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
119        uint32_t cr3;
120#define STM32F4_USART_CR3_ONEBIT BSP_BIT32(11)
121#define STM32F4_USART_CR3_CTSIE BSP_BIT32(10)
122#define STM32F4_USART_CR3_CTSE BSP_BIT32(9)
123#define STM32F4_USART_CR3_RTSE BSP_BIT32(8)
124#define STM32F4_USART_CR3_DMAT BSP_BIT32(7)
125#define STM32F4_USART_CR3_DMAR BSP_BIT32(6)
126#define STM32F4_USART_CR3_SCEN BSP_BIT32(5)
127#define STM32F4_USART_CR3_NACK BSP_BIT32(4)
128#define STM32F4_USART_CR3_HDSEL BSP_BIT32(3)
129#define STM32F4_USART_CR3_IRLP BSP_BIT32(2)
130#define STM32F4_USART_CR3_IREN BSP_BIT32(1)
131#define STM32F4_USART_CR3_EIE BSP_BIT32(0)
132        uint32_t gtpr;
133#define STM32F4_USART_GTPR_GT(val) BSP_FLD32(val, 8, 15)
134#define STM32F4_USART_GTPR_GT_GET(reg) BSP_FLD32GET(reg, 8, 15)
135#define STM32F4_USART_GTPR_GT_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
136#define STM32F4_USART_GTPR_PSC(val) BSP_FLD32(val, 0, 7)
137#define STM32F4_USART_GTPR_PSC_GET(reg) BSP_FLD32GET(reg, 0, 7)
138#define STM32F4_USART_GTPR_PSC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
139} stm32f4_usart;
140
141#define STM32F4_USART_1 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40011000))
142#define STM32F4_USART_2 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40004400))
143#define STM32F4_USART_3 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40004800))
144#define STM32F4_USART_4 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40004c00))
145#define STM32F4_USART_5 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40005000))
146#define STM32F4_USART_6 (*(volatile stm32f4_usart *) (STM32F4_BASE + 0x40011400))
147
148typedef struct {
149        uint32_t reserved_00 [268439808];
150        stm32f4_usart usart_2;
151        uint32_t reserved_4000441c [249];
152        stm32f4_usart usart_3;
153        uint32_t reserved_4000481c [249];
154        stm32f4_usart usart_4;
155        uint32_t reserved_40004c1c [249];
156        stm32f4_usart usart_5;
157        uint32_t reserved_4000501c [12281];
158        stm32f4_usart usart_1;
159        uint32_t reserved_4001101c [249];
160        stm32f4_usart usart_6;
161        uint32_t reserved_4001141c [18681];
162        stm32f4_rcc rcc;
163} stm32f4;
164
165#define STM32F4 (*(volatile stm32f4 *) (STM32F4_BASE))
166
167#endif /* LIBBSP_ARM_STM32F4_STM32F4_H */
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