source: rtems/c/src/lib/libbsp/arm/stm32f4/include/stm32f4.h @ 0282e83

4.115
Last change on this file since 0282e83 was 228ece9, checked in by Sebastian Huber <sebastian.huber@…>, on 04/12/12 at 19:27:56

bsp/stm32f4: Add IO and RCC
  • Property mode set to 100644
File size: 5.7 KB
Line 
1/*
2 * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Obere Lagerstr. 30
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#ifndef LIBBSP_ARM_STM32F4_STM32F4_H
16#define LIBBSP_ARM_STM32F4_STM32F4_H
17
18#include <bsp/utility.h>
19
20#define STM32F4_BASE 0x00
21
22typedef struct {
23        uint32_t moder;
24        uint32_t otyper;
25        uint32_t ospeedr;
26        uint32_t pupdr;
27        uint32_t idr;
28        uint32_t odr;
29        uint32_t bsrr;
30        uint32_t lckr;
31        uint32_t afr [2];
32        uint32_t reserved_28 [246];
33} stm32f4_gpio;
34
35#define STM32F4_GPIO(i) ((volatile stm32f4_gpio *) (STM32F4_BASE + 0x40020000) + (i))
36
37typedef struct {
38        uint32_t cr;
39        uint32_t pllcfgr;
40        uint32_t cfgr;
41        uint32_t cir;
42        uint32_t ahbrstr [3];
43        uint32_t reserved_1c;
44        uint32_t apbrstr [2];
45        uint32_t reserved_28 [2];
46        uint32_t ahbenr [3];
47        uint32_t reserved_3c;
48        uint32_t apbenr [2];
49        uint32_t reserved_48 [2];
50        uint32_t ahblpenr [3];
51        uint32_t reserved_5c;
52        uint32_t apblpenr [2];
53        uint32_t reserved_68 [2];
54        uint32_t bdcr;
55        uint32_t csr;
56        uint32_t reserved_78 [2];
57        uint32_t sscgr;
58        uint32_t plli2scfgr;
59} stm32f4_rcc;
60
61#define STM32F4_RCC ((volatile stm32f4_rcc *) (STM32F4_BASE + 0x40023800))
62
63typedef struct {
64        uint32_t sr;
65#define STM32F4_USART_SR_CTS BSP_BIT32(9)
66#define STM32F4_USART_SR_LBD BSP_BIT32(8)
67#define STM32F4_USART_SR_TXE BSP_BIT32(7)
68#define STM32F4_USART_SR_TC BSP_BIT32(6)
69#define STM32F4_USART_SR_RXNE BSP_BIT32(5)
70#define STM32F4_USART_SR_IDLE BSP_BIT32(4)
71#define STM32F4_USART_SR_ORE BSP_BIT32(3)
72#define STM32F4_USART_SR_NF BSP_BIT32(2)
73#define STM32F4_USART_SR_FE BSP_BIT32(1)
74#define STM32F4_USART_SR_PE BSP_BIT32(0)
75        uint32_t dr;
76#define STM32F4_USART_DR(val) BSP_FLD32(val, 0, 7)
77#define STM32F4_USART_DR_GET(reg) BSP_FLD32GET(reg, 0, 7)
78#define STM32F4_USART_DR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
79        uint32_t bbr;
80#define STM32F4_USART_BBR_DIV_MANTISSA(val) BSP_FLD32(val, 4, 15)
81#define STM32F4_USART_BBR_DIV_MANTISSA_GET(reg) BSP_FLD32GET(reg, 4, 15)
82#define STM32F4_USART_BBR_DIV_MANTISSA_SET(reg, val) BSP_FLD32SET(reg, val, 4, 15)
83#define STM32F4_USART_BBR_DIV_FRACTION(val) BSP_FLD32(val, 0, 3)
84#define STM32F4_USART_BBR_DIV_FRACTION_GET(reg) BSP_FLD32GET(reg, 0, 3)
85#define STM32F4_USART_BBR_DIV_FRACTION_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
86        uint32_t cr1;
87#define STM32F4_USART_CR1_OVER8 BSP_BIT32(15)
88#define STM32F4_USART_CR1_UE BSP_BIT32(13)
89#define STM32F4_USART_CR1_M BSP_BIT32(12)
90#define STM32F4_USART_CR1_WAKE BSP_BIT32(11)
91#define STM32F4_USART_CR1_PCE BSP_BIT32(10)
92#define STM32F4_USART_CR1_PS BSP_BIT32(9)
93#define STM32F4_USART_CR1_PEIE BSP_BIT32(8)
94#define STM32F4_USART_CR1_TXEIE BSP_BIT32(7)
95#define STM32F4_USART_CR1_TCIE BSP_BIT32(6)
96#define STM32F4_USART_CR1_RXNEIE BSP_BIT32(5)
97#define STM32F4_USART_CR1_IDLEIE BSP_BIT32(4)
98#define STM32F4_USART_CR1_TE BSP_BIT32(3)
99#define STM32F4_USART_CR1_RE BSP_BIT32(2)
100#define STM32F4_USART_CR1_RWU BSP_BIT32(1)
101#define STM32F4_USART_CR1_SBK BSP_BIT32(0)
102        uint32_t cr2;
103#define STM32F4_USART_CR2_LINEN BSP_BIT32(14)
104#define STM32F4_USART_CR2_STOP(val) BSP_FLD32(val, 12, 13)
105#define STM32F4_USART_CR2_STOP_GET(reg) BSP_FLD32GET(reg, 12, 13)
106#define STM32F4_USART_CR2_STOP_SET(reg, val) BSP_FLD32SET(reg, val, 12, 13)
107#define STM32F4_USART_CR2_CLKEN BSP_BIT32(11)
108#define STM32F4_USART_CR2_CPOL BSP_BIT32(10)
109#define STM32F4_USART_CR2_CPHA BSP_BIT32(9)
110#define STM32F4_USART_CR2_LBCL BSP_BIT32(8)
111#define STM32F4_USART_CR2_LBDIE BSP_BIT32(6)
112#define STM32F4_USART_CR2_LBDL BSP_BIT32(5)
113#define STM32F4_USART_CR2_ADD(val) BSP_FLD32(val, 0, 3)
114#define STM32F4_USART_CR2_ADD_GET(reg) BSP_FLD32GET(reg, 0, 3)
115#define STM32F4_USART_CR2_ADD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3)
116        uint32_t cr3;
117#define STM32F4_USART_CR3_ONEBIT BSP_BIT32(11)
118#define STM32F4_USART_CR3_CTSIE BSP_BIT32(10)
119#define STM32F4_USART_CR3_CTSE BSP_BIT32(9)
120#define STM32F4_USART_CR3_RTSE BSP_BIT32(8)
121#define STM32F4_USART_CR3_DMAT BSP_BIT32(7)
122#define STM32F4_USART_CR3_DMAR BSP_BIT32(6)
123#define STM32F4_USART_CR3_SCEN BSP_BIT32(5)
124#define STM32F4_USART_CR3_NACK BSP_BIT32(4)
125#define STM32F4_USART_CR3_HDSEL BSP_BIT32(3)
126#define STM32F4_USART_CR3_IRLP BSP_BIT32(2)
127#define STM32F4_USART_CR3_IREN BSP_BIT32(1)
128#define STM32F4_USART_CR3_EIE BSP_BIT32(0)
129        uint32_t gtpr;
130#define STM32F4_USART_GTPR_GT(val) BSP_FLD32(val, 8, 15)
131#define STM32F4_USART_GTPR_GT_GET(reg) BSP_FLD32GET(reg, 8, 15)
132#define STM32F4_USART_GTPR_GT_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
133#define STM32F4_USART_GTPR_PSC(val) BSP_FLD32(val, 0, 7)
134#define STM32F4_USART_GTPR_PSC_GET(reg) BSP_FLD32GET(reg, 0, 7)
135#define STM32F4_USART_GTPR_PSC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
136} stm32f4_usart;
137
138#define STM32F4_USART_1 ((volatile stm32f4_usart *) (STM32F4_BASE + 0x40011000))
139#define STM32F4_USART_2 ((volatile stm32f4_usart *) (STM32F4_BASE + 0x40004400))
140#define STM32F4_USART_3 ((volatile stm32f4_usart *) (STM32F4_BASE + 0x40004800))
141#define STM32F4_USART_4 ((volatile stm32f4_usart *) (STM32F4_BASE + 0x40004c00))
142#define STM32F4_USART_5 ((volatile stm32f4_usart *) (STM32F4_BASE + 0x40005000))
143#define STM32F4_USART_6 ((volatile stm32f4_usart *) (STM32F4_BASE + 0x40011400))
144
145typedef struct {
146        uint32_t reserved_00 [268439808];
147        stm32f4_usart usart_2;
148        uint32_t reserved_4000441c [249];
149        stm32f4_usart usart_3;
150        uint32_t reserved_4000481c [249];
151        stm32f4_usart usart_4;
152        uint32_t reserved_40004c1c [249];
153        stm32f4_usart usart_5;
154        uint32_t reserved_4000501c [12281];
155        stm32f4_usart usart_1;
156        uint32_t reserved_4001101c [249];
157        stm32f4_usart usart_6;
158        uint32_t reserved_4001141c [15097];
159        stm32f4_gpio gpio [9];
160        uint32_t reserved_40022400 [1280];
161        stm32f4_rcc rcc;
162} stm32f4;
163
164#define STM32F4 (*(volatile stm32f4 *) (STM32F4_BASE))
165
166#endif /* LIBBSP_ARM_STM32F4_STM32F4_H */
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