source: rtems/c/src/lib/libbsp/arm/stm32f4/include/stm32_i2c.h @ c499856

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Last change on this file since c499856 was c499856, checked in by Chris Johns <chrisj@…>, on 03/20/14 at 21:10:47

Change all references of rtems.com to rtems.org.
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1/**
2 * @file
3 * @ingroup stm32_i2c
4 * @brief STM32 I2C support.
5 */
6
7/*
8 * Copyright (c) 2013 Christian Mauderer.  All rights reserved.
9 *
10 *  embedded brains GmbH
11 *  Obere Lagerstr. 30
12 *  82178 Puchheim
13 *  Germany
14 *  <rtems@embedded-brains.de>
15 *
16 * The license and distribution terms for this file may be
17 * found in the file LICENSE in this distribution or at
18 * http://www.rtems.org/license/LICENSE.
19 */
20
21#ifndef LIBBSP_ARM_STM32F4_STM32_I2C_H
22#define LIBBSP_ARM_STM32F4_STM32_I2C_H
23
24#include <bsp/utility.h>
25
26/**
27 * @defgroup stm32_i2c STM32 I2C Support
28 * @ingroup stm32f4_i2c
29 * @brief STM32 I2C Support
30 * @{
31 */
32
33typedef struct {
34        uint32_t cr1;
35#define STM32F4_I2C_CR1_SWRST BSP_BIT32(15)
36#define STM32F4_I2C_CR1_ALERT BSP_BIT32(13)
37#define STM32F4_I2C_CR1_PEC BSP_BIT32(12)
38#define STM32F4_I2C_CR1_POS BSP_BIT32(11)
39#define STM32F4_I2C_CR1_ACK BSP_BIT32(10)
40#define STM32F4_I2C_CR1_STOP BSP_BIT32(9)
41#define STM32F4_I2C_CR1_START BSP_BIT32(8)
42#define STM32F4_I2C_CR1_NOSTRETCH BSP_BIT32(7)
43#define STM32F4_I2C_CR1_ENGC BSP_BIT32(6)
44#define STM32F4_I2C_CR1_ENPEC BSP_BIT32(5)
45#define STM32F4_I2C_CR1_ENARP BSP_BIT32(4)
46#define STM32F4_I2C_CR1_SMBTYPE BSP_BIT32(3)
47#define STM32F4_I2C_CR1_SMBUS BSP_BIT32(1)
48#define STM32F4_I2C_CR1_PE BSP_BIT32(0)
49        uint32_t cr2;
50#define STM32F4_I2C_CR2_LAST BSP_BIT32(12)
51#define STM32F4_I2C_CR2_DMAEN BSP_BIT32(11)
52#define STM32F4_I2C_CR2_ITBUFEN BSP_BIT32(10)
53#define STM32F4_I2C_CR2_ITEVTEN BSP_BIT32(9)
54#define STM32F4_I2C_CR2_ITERREN BSP_BIT32(8)
55#define STM32F4_I2C_CR2_FREQ(val) BSP_FLD32(val, 0, 5)
56#define STM32F4_I2C_CR2_FREQ_GET(reg) BSP_FLD32GET(reg, 0, 5)
57#define STM32F4_I2C_CR2_FREQ_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
58        uint32_t oar1;
59#define STM32F4_I2C_OAR1_ADDMODE BSP_BIT32(15)
60#define STM32F4_I2C_OAR1_ADD(val) BSP_FLD32(val, 0, 9)
61#define STM32F4_I2C_OAR1_ADD_GET(reg) BSP_FLD32GET(reg, 0, 9)
62#define STM32F4_I2C_OAR1_ADD_SET(reg, val) BSP_FLD32SET(reg, val, 0, 9)
63        uint32_t oar2;
64#define STM32F4_I2C_OAR2_ADD2(val) BSP_FLD32(val, 1, 7)
65#define STM32F4_I2C_OAR2_ADD2_GET(reg) BSP_FLD32GET(reg, 1, 7)
66#define STM32F4_I2C_OAR2_ADD2_SET(reg, val) BSP_FLD32SET(reg, val, 1, 7)
67#define STM32F4_I2C_OAR2_ENDUAL BSP_BIT32(0)
68        uint32_t dr;
69#define STM32F4_I2C_DR(val) BSP_FLD32(val, 0, 7)
70#define STM32F4_I2C_DR_GET(reg) BSP_FLD32GET(reg, 0, 7)
71#define STM32F4_I2C_DR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7)
72        uint32_t sr1;
73#define STM32F4_I2C_SR1_SMBALERT BSP_BIT32(15)
74#define STM32F4_I2C_SR1_TIMEOUT BSP_BIT32(14)
75#define STM32F4_I2C_SR1_PECERR BSP_BIT32(12)
76#define STM32F4_I2C_SR1_OVR BSP_BIT32(11)
77#define STM32F4_I2C_SR1_AF BSP_BIT32(10)
78#define STM32F4_I2C_SR1_ARLO BSP_BIT32(9)
79#define STM32F4_I2C_SR1_BERR BSP_BIT32(8)
80#define STM32F4_I2C_SR1_TxE BSP_BIT32(7)
81#define STM32F4_I2C_SR1_RxNE BSP_BIT32(6)
82#define STM32F4_I2C_SR1_STOPF BSP_BIT32(4)
83#define STM32F4_I2C_SR1_ADD10 BSP_BIT32(3)
84#define STM32F4_I2C_SR1_BTF BSP_BIT32(2)
85#define STM32F4_I2C_SR1_ADDR BSP_BIT32(1)
86#define STM32F4_I2C_SR1_SB BSP_BIT32(0)
87        uint32_t sr2;
88#define STM32F4_I2C_SR2_PEC(val) BSP_FLD32(val, 8, 15)
89#define STM32F4_I2C_SR2_PEC_GET(reg) BSP_FLD32GET(reg, 8, 15)
90#define STM32F4_I2C_SR2_PEC_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15)
91#define STM32F4_I2C_SR2_DUALF BSP_BIT32(7)
92#define STM32F4_I2C_SR2_SMBHOST BSP_BIT32(6)
93#define STM32F4_I2C_SR2_SMBDEFAULT BSP_BIT32(5)
94#define STM32F4_I2C_SR2_GENCALL BSP_BIT32(4)
95#define STM32F4_I2C_SR2_TRA BSP_BIT32(2)
96#define STM32F4_I2C_SR2_BUSY BSP_BIT32(1)
97#define STM32F4_I2C_SR2_MSL BSP_BIT32(0)
98        uint32_t ccr;
99#define STM32F4_I2C_CCR_FS BSP_BIT32(15)
100#define STM32F4_I2C_CCR_DUTY BSP_BIT32(14)
101#define STM32F4_I2C_CCR_CCR(val) BSP_FLD32(val, 0, 11)
102#define STM32F4_I2C_CCR_CCR_GET(reg) BSP_FLD32GET(reg, 0, 11)
103#define STM32F4_I2C_CCR_CCR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 11)
104#define STM32F4_I2C_CCR_CCR_MAX STM32F4_I2C_CCR_CCR_GET(BSP_MSK32(0, 11))
105        uint32_t trise;
106#define STM32F4_I2C_TRISE(val) BSP_FLD32(val, 0, 5)
107#define STM32F4_I2C_TRISE_GET(reg) BSP_FLD32GET(reg, 0, 5)
108#define STM32F4_I2C_TRISE_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5)
109} stm32f4_i2c;
110
111/** @} */
112
113#endif /* LIBBSP_ARM_STM32F4_STM32_I2C_H */
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