source: rtems/c/src/lib/libbsp/arm/stm32f4/include/io.h @ bce41f4

4.115
Last change on this file since bce41f4 was 228ece9, checked in by Sebastian Huber <sebastian.huber@…>, on 04/12/12 at 19:27:56

bsp/stm32f4: Add IO and RCC

  • Property mode set to 100644
File size: 2.6 KB
Line 
1/*
2 * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Obere Lagerstr. 30
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#ifndef LIBBSP_ARM_STM32F4_IO_H
16#define LIBBSP_ARM_STM32F4_IO_H
17
18#include <stdbool.h>
19
20#include <bsp/stm32f4.h>
21
22#ifdef __cplusplus
23extern "C" {
24#endif /* __cplusplus */
25
26typedef enum {
27  STM32F4_GPIO_MODE_INPUT,
28  STM32F4_GPIO_MODE_OUTPUT,
29  STM32F4_GPIO_MODE_AF,
30  STM32F4_GPIO_MODE_ANALOG
31} stm32f4_gpio_mode;
32
33typedef enum {
34  STM32F4_GPIO_OTYPE_PUSH_PULL,
35  STM32F4_GPIO_OTYPE_OPEN_DRAIN
36} stm32f4_gpio_otype;
37
38typedef enum {
39  STM32F4_GPIO_OSPEED_2_MHZ,
40  STM32F4_GPIO_OSPEED_25_MHZ,
41  STM32F4_GPIO_OSPEED_50_MHZ,
42  STM32F4_GPIO_OSPEED_100_MHZ
43} stm32f4_gpio_ospeed;
44
45typedef enum {
46  STM32F4_GPIO_NO_PULL,
47  STM32F4_GPIO_PULL_UP,
48  STM32F4_GPIO_PULL_DOWN
49} stm32f4_gpio_pull;
50
51typedef enum {
52  STM32F4_GPIO_AF_SYSTEM = 0,
53  STM32F4_GPIO_AF_TIM1 = 1,
54  STM32F4_GPIO_AF_TIM2 = 1,
55  STM32F4_GPIO_AF_TIM3 = 2,
56  STM32F4_GPIO_AF_TIM4 = 2,
57  STM32F4_GPIO_AF_TIM5 = 2,
58  STM32F4_GPIO_AF_TIM8 = 3,
59  STM32F4_GPIO_AF_TIM9 = 3,
60  STM32F4_GPIO_AF_TIM10 = 3,
61  STM32F4_GPIO_AF_TIM11 = 3,
62  STM32F4_GPIO_AF_I2C1 = 4,
63  STM32F4_GPIO_AF_I2C2 = 4,
64  STM32F4_GPIO_AF_I2C3 = 4,
65  STM32F4_GPIO_AF_SPI1 = 5,
66  STM32F4_GPIO_AF_SPI2 = 5,
67  STM32F4_GPIO_AF_SPI3 = 6,
68  STM32F4_GPIO_AF_USART1 = 7,
69  STM32F4_GPIO_AF_USART2 = 7,
70  STM32F4_GPIO_AF_USART3 = 7,
71  STM32F4_GPIO_AF_UART4 = 8,
72  STM32F4_GPIO_AF_UART5 = 8,
73  STM32F4_GPIO_AF_USART6 = 8,
74  STM32F4_GPIO_AF_CAN1 = 9,
75  STM32F4_GPIO_AF_CAN2 = 9,
76  STM32F4_GPIO_AF_TIM12 = 9,
77  STM32F4_GPIO_AF_TIM13 = 9,
78  STM32F4_GPIO_AF_TIM14 = 9,
79  STM32F4_GPIO_AF_OTG_FS = 10,
80  STM32F4_GPIO_AF_OTG_HS = 10,
81  STM32F4_GPIO_AF_ETH = 11,
82  STM32F4_GPIO_AF_FSMC = 12,
83  STM32F4_GPIO_AF_OTG_HS_FS = 12,
84  STM32F4_GPIO_AF_SDIO = 12,
85  STM32F4_GPIO_AF_DCMI = 13,
86  STM32F4_GPIO_AF_EVENTOUT = 15
87} stm32f4_gpio_af;
88
89#define STM32F4_GPIO_PIN(port, index) ((((port) << 4) | (index)) & 0xff)
90
91#define STM32F4_GPIO_PORT_OF_PIN(pin) (((pin) >> 4) & 0xf)
92
93#define STM32F4_GPIO_INDEX_OF_PIN(pin) ((pin) & 0xf)
94
95typedef struct {
96  uint32_t pin : 8;
97  uint32_t mode : 2;
98  uint32_t otype : 1;
99  uint32_t ospeed : 2;
100  uint32_t pupd : 2;
101  uint32_t af : 4;
102} stm32f4_gpio_config;
103
104void stm32f4_gpio_set_config(const stm32f4_gpio_config *config);
105
106void stm32f4_gpio_set_output(int pin, bool set);
107
108bool stm32f4_gpio_get_input(int pin);
109
110#ifdef __cplusplus
111}
112#endif /* __cplusplus */
113
114#endif /* LIBBSP_ARM_STM32F4_IO_H */
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