source: rtems/c/src/lib/libbsp/arm/stm32f4/include/io.h @ 7be19f8

4.115
Last change on this file since 7be19f8 was 7be19f8, checked in by Sebastian Huber <sebastian.huber@…>, on Apr 15, 2012 at 7:15:22 PM

bsp/stm32f4: API changes

  • Property mode set to 100644
File size: 5.1 KB
Line 
1/*
2 * Copyright (c) 2012 Sebastian Huber.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Obere Lagerstr. 30
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#ifndef LIBBSP_ARM_STM32F4_IO_H
16#define LIBBSP_ARM_STM32F4_IO_H
17
18#include <stdbool.h>
19
20#include <bsp/stm32f4.h>
21
22#ifdef __cplusplus
23extern "C" {
24#endif /* __cplusplus */
25
26typedef enum {
27  STM32F4_GPIO_MODE_INPUT,
28  STM32F4_GPIO_MODE_OUTPUT,
29  STM32F4_GPIO_MODE_AF,
30  STM32F4_GPIO_MODE_ANALOG
31} stm32f4_gpio_mode;
32
33typedef enum {
34  STM32F4_GPIO_OTYPE_PUSH_PULL,
35  STM32F4_GPIO_OTYPE_OPEN_DRAIN
36} stm32f4_gpio_otype;
37
38typedef enum {
39  STM32F4_GPIO_OSPEED_2_MHZ,
40  STM32F4_GPIO_OSPEED_25_MHZ,
41  STM32F4_GPIO_OSPEED_50_MHZ,
42  STM32F4_GPIO_OSPEED_100_MHZ
43} stm32f4_gpio_ospeed;
44
45typedef enum {
46  STM32F4_GPIO_NO_PULL,
47  STM32F4_GPIO_PULL_UP,
48  STM32F4_GPIO_PULL_DOWN
49} stm32f4_gpio_pull;
50
51typedef enum {
52  STM32F4_GPIO_AF_SYSTEM = 0,
53  STM32F4_GPIO_AF_TIM1 = 1,
54  STM32F4_GPIO_AF_TIM2 = 1,
55  STM32F4_GPIO_AF_TIM3 = 2,
56  STM32F4_GPIO_AF_TIM4 = 2,
57  STM32F4_GPIO_AF_TIM5 = 2,
58  STM32F4_GPIO_AF_TIM8 = 3,
59  STM32F4_GPIO_AF_TIM9 = 3,
60  STM32F4_GPIO_AF_TIM10 = 3,
61  STM32F4_GPIO_AF_TIM11 = 3,
62  STM32F4_GPIO_AF_I2C1 = 4,
63  STM32F4_GPIO_AF_I2C2 = 4,
64  STM32F4_GPIO_AF_I2C3 = 4,
65  STM32F4_GPIO_AF_SPI1 = 5,
66  STM32F4_GPIO_AF_SPI2 = 5,
67  STM32F4_GPIO_AF_SPI3 = 6,
68  STM32F4_GPIO_AF_USART1 = 7,
69  STM32F4_GPIO_AF_USART2 = 7,
70  STM32F4_GPIO_AF_USART3 = 7,
71  STM32F4_GPIO_AF_UART4 = 8,
72  STM32F4_GPIO_AF_UART5 = 8,
73  STM32F4_GPIO_AF_USART6 = 8,
74  STM32F4_GPIO_AF_CAN1 = 9,
75  STM32F4_GPIO_AF_CAN2 = 9,
76  STM32F4_GPIO_AF_TIM12 = 9,
77  STM32F4_GPIO_AF_TIM13 = 9,
78  STM32F4_GPIO_AF_TIM14 = 9,
79  STM32F4_GPIO_AF_OTG_FS = 10,
80  STM32F4_GPIO_AF_OTG_HS = 10,
81  STM32F4_GPIO_AF_ETH = 11,
82  STM32F4_GPIO_AF_FSMC = 12,
83  STM32F4_GPIO_AF_OTG_HS_FS = 12,
84  STM32F4_GPIO_AF_SDIO = 12,
85  STM32F4_GPIO_AF_DCMI = 13,
86  STM32F4_GPIO_AF_EVENTOUT = 15
87} stm32f4_gpio_af;
88
89#define STM32F4_GPIO_PIN(port, index) ((((port) << 4) | (index)) & 0xff)
90
91#define STM32F4_GPIO_PORT_OF_PIN(pin) (((pin) >> 4) & 0xf)
92
93#define STM32F4_GPIO_INDEX_OF_PIN(pin) ((pin) & 0xf)
94
95typedef union {
96  struct {
97    uint32_t pin_first : 8;
98    uint32_t pin_last : 8;
99    uint32_t mode : 2;
100    uint32_t otype : 1;
101    uint32_t ospeed : 2;
102    uint32_t pupd : 2;
103    uint32_t output : 1;
104    uint32_t af : 4;
105    uint32_t reserved : 4;
106  } fields;
107
108  uint32_t value;
109} stm32f4_gpio_config;
110
111extern const stm32f4_gpio_config stm32f4_start_config_gpio [];
112
113void stm32f4_gpio_set_clock(int pin, bool set);
114
115void stm32f4_gpio_set_config(const stm32f4_gpio_config *config);
116
117#define STM32F4_GPIO_CONFIG_TERMINAL \
118  { { 0xff, 0xff, 0x3, 0x1, 0x3, 0x3, 0x1, 0xf, 0xf } }
119
120/**
121 * @brief Sets the GPIO configuration of an array terminated by
122 * STM32F4_GPIO_CONFIG_TERMINAL.
123 */
124void stm32f4_gpio_set_config_array(const stm32f4_gpio_config *configs);
125
126void stm32f4_gpio_set_output(int pin, bool set);
127
128bool stm32f4_gpio_get_input(int pin);
129
130#define STM32F4_PIN_USART(port, idx, altfunc) \
131  { \
132    { \
133      .pin_first = STM32F4_GPIO_PIN(port, idx), \
134      .pin_last = STM32F4_GPIO_PIN(port, idx), \
135      .mode = STM32F4_GPIO_MODE_AF, \
136      .otype = STM32F4_GPIO_OTYPE_PUSH_PULL, \
137      .ospeed = STM32F4_GPIO_OSPEED_2_MHZ, \
138      .pupd = STM32F4_GPIO_PULL_UP, \
139      .af = altfunc \
140    } \
141  }
142
143#define STM32F4_PIN_USART1_TX_PA9 STM32F4_PIN_USART(0, 9, STM32F4_GPIO_AF_USART1)
144#define STM32F4_PIN_USART1_TX_PB6 STM32F4_PIN_USART(1, 6, STM32F4_GPIO_AF_USART1)
145#define STM32F4_PIN_USART1_RX_PA10 STM32F4_PIN_USART(0, 10, STM32F4_GPIO_AF_USART1)
146#define STM32F4_PIN_USART1_RX_PB7 STM32F4_PIN_USART(1, 7, STM32F4_GPIO_AF_USART1)
147
148#define STM32F4_PIN_USART2_TX_PA2 STM32F4_PIN_USART(0, 2, STM32F4_GPIO_AF_USART2)
149#define STM32F4_PIN_USART2_TX_PD5 STM32F4_PIN_USART(3, 5, STM32F4_GPIO_AF_USART2)
150#define STM32F4_PIN_USART2_RX_PA3 STM32F4_PIN_USART(0, 3, STM32F4_GPIO_AF_USART2)
151#define STM32F4_PIN_USART2_RX_PD6 STM32F4_PIN_USART(3, 6, STM32F4_GPIO_AF_USART2)
152
153#define STM32F4_PIN_USART3_TX_PC10 STM32F4_PIN_USART(2, 10, STM32F4_GPIO_AF_USART3)
154#define STM32F4_PIN_USART3_TX_PD8 STM32F4_PIN_USART(3, 8, STM32F4_GPIO_AF_USART3)
155#define STM32F4_PIN_USART3_RX_PC11 STM32F4_PIN_USART(2, 11, STM32F4_GPIO_AF_USART3)
156#define STM32F4_PIN_USART3_RX_PD9 STM32F4_PIN_USART(3, 9, STM32F4_GPIO_AF_USART3)
157
158#define STM32F4_PIN_UART4_TX_PA0 STM32F4_PIN_USART(0, 0, STM32F4_GPIO_AF_UART4)
159#define STM32F4_PIN_UART4_TX_PC10 STM32F4_PIN_USART(2, 10, STM32F4_GPIO_AF_UART4)
160#define STM32F4_PIN_UART4_RX_PA1 STM32F4_PIN_USART(0, 1, STM32F4_GPIO_AF_UART4)
161#define STM32F4_PIN_UART4_RX_PC11 STM32F4_PIN_USART(2, 11, STM32F4_GPIO_AF_UART4)
162
163#define STM32F4_PIN_UART5_TX_PC12 STM32F4_PIN_USART(2, 12, STM32F4_GPIO_AF_UART5)
164#define STM32F4_PIN_UART5_RX_PD2 STM32F4_PIN_USART(3, 2, STM32F4_GPIO_AF_UART5)
165
166#define STM32F4_PIN_USART6_TX_PC6 STM32F4_PIN_USART(2, 6, STM32F4_GPIO_AF_USART6)
167#define STM32F4_PIN_USART6_RX_PC7 STM32F4_PIN_USART(2, 7, STM32F4_GPIO_AF_USART6)
168
169#ifdef __cplusplus
170}
171#endif /* __cplusplus */
172
173#endif /* LIBBSP_ARM_STM32F4_IO_H */
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