[228ece9] | 1 | /* |
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| 2 | * Copyright (c) 2012 Sebastian Huber. All rights reserved. |
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| 3 | * |
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| 4 | * embedded brains GmbH |
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| 5 | * Obere Lagerstr. 30 |
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| 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <rtems@embedded-brains.de> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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| 12 | * http://www.rtems.com/license/LICENSE. |
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| 13 | */ |
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| 14 | |
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| 15 | #ifndef LIBBSP_ARM_STM32F4_IO_H |
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| 16 | #define LIBBSP_ARM_STM32F4_IO_H |
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| 17 | |
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| 18 | #include <stdbool.h> |
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| 19 | |
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| 20 | #include <bsp/stm32f4.h> |
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| 21 | |
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| 22 | #ifdef __cplusplus |
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| 23 | extern "C" { |
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| 24 | #endif /* __cplusplus */ |
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| 25 | |
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| 26 | typedef enum { |
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| 27 | STM32F4_GPIO_MODE_INPUT, |
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| 28 | STM32F4_GPIO_MODE_OUTPUT, |
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| 29 | STM32F4_GPIO_MODE_AF, |
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| 30 | STM32F4_GPIO_MODE_ANALOG |
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| 31 | } stm32f4_gpio_mode; |
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| 32 | |
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| 33 | typedef enum { |
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| 34 | STM32F4_GPIO_OTYPE_PUSH_PULL, |
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| 35 | STM32F4_GPIO_OTYPE_OPEN_DRAIN |
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| 36 | } stm32f4_gpio_otype; |
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| 37 | |
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| 38 | typedef enum { |
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| 39 | STM32F4_GPIO_OSPEED_2_MHZ, |
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| 40 | STM32F4_GPIO_OSPEED_25_MHZ, |
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| 41 | STM32F4_GPIO_OSPEED_50_MHZ, |
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| 42 | STM32F4_GPIO_OSPEED_100_MHZ |
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| 43 | } stm32f4_gpio_ospeed; |
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| 44 | |
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| 45 | typedef enum { |
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| 46 | STM32F4_GPIO_NO_PULL, |
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| 47 | STM32F4_GPIO_PULL_UP, |
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| 48 | STM32F4_GPIO_PULL_DOWN |
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| 49 | } stm32f4_gpio_pull; |
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| 50 | |
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| 51 | typedef enum { |
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| 52 | STM32F4_GPIO_AF_SYSTEM = 0, |
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| 53 | STM32F4_GPIO_AF_TIM1 = 1, |
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| 54 | STM32F4_GPIO_AF_TIM2 = 1, |
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| 55 | STM32F4_GPIO_AF_TIM3 = 2, |
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| 56 | STM32F4_GPIO_AF_TIM4 = 2, |
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| 57 | STM32F4_GPIO_AF_TIM5 = 2, |
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| 58 | STM32F4_GPIO_AF_TIM8 = 3, |
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| 59 | STM32F4_GPIO_AF_TIM9 = 3, |
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| 60 | STM32F4_GPIO_AF_TIM10 = 3, |
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| 61 | STM32F4_GPIO_AF_TIM11 = 3, |
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| 62 | STM32F4_GPIO_AF_I2C1 = 4, |
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| 63 | STM32F4_GPIO_AF_I2C2 = 4, |
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| 64 | STM32F4_GPIO_AF_I2C3 = 4, |
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| 65 | STM32F4_GPIO_AF_SPI1 = 5, |
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| 66 | STM32F4_GPIO_AF_SPI2 = 5, |
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| 67 | STM32F4_GPIO_AF_SPI3 = 6, |
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| 68 | STM32F4_GPIO_AF_USART1 = 7, |
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| 69 | STM32F4_GPIO_AF_USART2 = 7, |
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| 70 | STM32F4_GPIO_AF_USART3 = 7, |
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| 71 | STM32F4_GPIO_AF_UART4 = 8, |
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| 72 | STM32F4_GPIO_AF_UART5 = 8, |
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| 73 | STM32F4_GPIO_AF_USART6 = 8, |
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| 74 | STM32F4_GPIO_AF_CAN1 = 9, |
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| 75 | STM32F4_GPIO_AF_CAN2 = 9, |
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| 76 | STM32F4_GPIO_AF_TIM12 = 9, |
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| 77 | STM32F4_GPIO_AF_TIM13 = 9, |
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| 78 | STM32F4_GPIO_AF_TIM14 = 9, |
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| 79 | STM32F4_GPIO_AF_OTG_FS = 10, |
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| 80 | STM32F4_GPIO_AF_OTG_HS = 10, |
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| 81 | STM32F4_GPIO_AF_ETH = 11, |
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| 82 | STM32F4_GPIO_AF_FSMC = 12, |
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| 83 | STM32F4_GPIO_AF_OTG_HS_FS = 12, |
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| 84 | STM32F4_GPIO_AF_SDIO = 12, |
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| 85 | STM32F4_GPIO_AF_DCMI = 13, |
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| 86 | STM32F4_GPIO_AF_EVENTOUT = 15 |
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| 87 | } stm32f4_gpio_af; |
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| 88 | |
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| 89 | #define STM32F4_GPIO_PIN(port, index) ((((port) << 4) | (index)) & 0xff) |
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| 90 | |
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| 91 | #define STM32F4_GPIO_PORT_OF_PIN(pin) (((pin) >> 4) & 0xf) |
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| 92 | |
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| 93 | #define STM32F4_GPIO_INDEX_OF_PIN(pin) ((pin) & 0xf) |
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| 94 | |
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[7be19f8] | 95 | typedef union { |
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| 96 | struct { |
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| 97 | uint32_t pin_first : 8; |
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| 98 | uint32_t pin_last : 8; |
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| 99 | uint32_t mode : 2; |
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| 100 | uint32_t otype : 1; |
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| 101 | uint32_t ospeed : 2; |
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| 102 | uint32_t pupd : 2; |
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| 103 | uint32_t output : 1; |
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| 104 | uint32_t af : 4; |
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| 105 | uint32_t reserved : 4; |
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| 106 | } fields; |
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| 107 | |
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| 108 | uint32_t value; |
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[228ece9] | 109 | } stm32f4_gpio_config; |
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| 110 | |
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[7be19f8] | 111 | extern const stm32f4_gpio_config stm32f4_start_config_gpio []; |
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| 112 | |
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| 113 | void stm32f4_gpio_set_clock(int pin, bool set); |
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| 114 | |
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[228ece9] | 115 | void stm32f4_gpio_set_config(const stm32f4_gpio_config *config); |
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| 116 | |
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[7be19f8] | 117 | #define STM32F4_GPIO_CONFIG_TERMINAL \ |
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| 118 | { { 0xff, 0xff, 0x3, 0x1, 0x3, 0x3, 0x1, 0xf, 0xf } } |
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| 119 | |
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| 120 | /** |
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| 121 | * @brief Sets the GPIO configuration of an array terminated by |
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| 122 | * STM32F4_GPIO_CONFIG_TERMINAL. |
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| 123 | */ |
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| 124 | void stm32f4_gpio_set_config_array(const stm32f4_gpio_config *configs); |
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| 125 | |
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[228ece9] | 126 | void stm32f4_gpio_set_output(int pin, bool set); |
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| 127 | |
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| 128 | bool stm32f4_gpio_get_input(int pin); |
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| 129 | |
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[7be19f8] | 130 | #define STM32F4_PIN_USART(port, idx, altfunc) \ |
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| 131 | { \ |
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| 132 | { \ |
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| 133 | .pin_first = STM32F4_GPIO_PIN(port, idx), \ |
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| 134 | .pin_last = STM32F4_GPIO_PIN(port, idx), \ |
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| 135 | .mode = STM32F4_GPIO_MODE_AF, \ |
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| 136 | .otype = STM32F4_GPIO_OTYPE_PUSH_PULL, \ |
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| 137 | .ospeed = STM32F4_GPIO_OSPEED_2_MHZ, \ |
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| 138 | .pupd = STM32F4_GPIO_PULL_UP, \ |
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| 139 | .af = altfunc \ |
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| 140 | } \ |
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| 141 | } |
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| 142 | |
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| 143 | #define STM32F4_PIN_USART1_TX_PA9 STM32F4_PIN_USART(0, 9, STM32F4_GPIO_AF_USART1) |
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| 144 | #define STM32F4_PIN_USART1_TX_PB6 STM32F4_PIN_USART(1, 6, STM32F4_GPIO_AF_USART1) |
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| 145 | #define STM32F4_PIN_USART1_RX_PA10 STM32F4_PIN_USART(0, 10, STM32F4_GPIO_AF_USART1) |
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| 146 | #define STM32F4_PIN_USART1_RX_PB7 STM32F4_PIN_USART(1, 7, STM32F4_GPIO_AF_USART1) |
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| 147 | |
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| 148 | #define STM32F4_PIN_USART2_TX_PA2 STM32F4_PIN_USART(0, 2, STM32F4_GPIO_AF_USART2) |
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| 149 | #define STM32F4_PIN_USART2_TX_PD5 STM32F4_PIN_USART(3, 5, STM32F4_GPIO_AF_USART2) |
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| 150 | #define STM32F4_PIN_USART2_RX_PA3 STM32F4_PIN_USART(0, 3, STM32F4_GPIO_AF_USART2) |
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| 151 | #define STM32F4_PIN_USART2_RX_PD6 STM32F4_PIN_USART(3, 6, STM32F4_GPIO_AF_USART2) |
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| 152 | |
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| 153 | #define STM32F4_PIN_USART3_TX_PC10 STM32F4_PIN_USART(2, 10, STM32F4_GPIO_AF_USART3) |
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| 154 | #define STM32F4_PIN_USART3_TX_PD8 STM32F4_PIN_USART(3, 8, STM32F4_GPIO_AF_USART3) |
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| 155 | #define STM32F4_PIN_USART3_RX_PC11 STM32F4_PIN_USART(2, 11, STM32F4_GPIO_AF_USART3) |
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| 156 | #define STM32F4_PIN_USART3_RX_PD9 STM32F4_PIN_USART(3, 9, STM32F4_GPIO_AF_USART3) |
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| 157 | |
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| 158 | #define STM32F4_PIN_UART4_TX_PA0 STM32F4_PIN_USART(0, 0, STM32F4_GPIO_AF_UART4) |
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| 159 | #define STM32F4_PIN_UART4_TX_PC10 STM32F4_PIN_USART(2, 10, STM32F4_GPIO_AF_UART4) |
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| 160 | #define STM32F4_PIN_UART4_RX_PA1 STM32F4_PIN_USART(0, 1, STM32F4_GPIO_AF_UART4) |
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| 161 | #define STM32F4_PIN_UART4_RX_PC11 STM32F4_PIN_USART(2, 11, STM32F4_GPIO_AF_UART4) |
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| 162 | |
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| 163 | #define STM32F4_PIN_UART5_TX_PC12 STM32F4_PIN_USART(2, 12, STM32F4_GPIO_AF_UART5) |
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| 164 | #define STM32F4_PIN_UART5_RX_PD2 STM32F4_PIN_USART(3, 2, STM32F4_GPIO_AF_UART5) |
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| 165 | |
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| 166 | #define STM32F4_PIN_USART6_TX_PC6 STM32F4_PIN_USART(2, 6, STM32F4_GPIO_AF_USART6) |
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| 167 | #define STM32F4_PIN_USART6_RX_PC7 STM32F4_PIN_USART(2, 7, STM32F4_GPIO_AF_USART6) |
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| 168 | |
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[228ece9] | 169 | #ifdef __cplusplus |
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| 170 | } |
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| 171 | #endif /* __cplusplus */ |
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| 172 | |
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| 173 | #endif /* LIBBSP_ARM_STM32F4_IO_H */ |
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