source: rtems/c/src/lib/libbsp/arm/smdk2410/startup/memmap.c @ 1781f59f

4.104.114.95
Last change on this file since 1781f59f was 1781f59f, checked in by Joel Sherrill <joel.sherrill@…>, on May 6, 2008 at 9:01:27 PM

2008-05-06 Ray Xu <rayx.cn@…>

  • ChangeLog?, Makefile.am, README, bsp_specs, configure.ac, preinstall.am, include/bsp.h, include/bspopts.h.in, startup/linkcmds, startup/memmap.c: New files.
  • Property mode set to 100644
File size: 1.0 KB
Line 
1/*
2 *  GP32 Memory Map
3 *
4 *  Copyright (c) 2004 by Cogent Computer Systems
5 *  Written by Jay Monkman <jtm@lopingdog.com>
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14#include <rtems.h>
15#include <libcpu/mmu.h>
16
17/* Remember, the ARM920 has 64 TLBs. If you have more 1MB sections than
18 * that, you'll have TLB lookups, which could hurt performance.
19 */
20mmu_sect_map_t mem_map[] = {
21/*  <phys addr>  <virt addr> <size> <flags> */
22    {0x30000000, 0x00000000,   1,   MMU_CACHE_NONE},     /* SDRAM for vectors */
23    {0x30000000, 0x30000000,   32,  MMU_CACHE_WTHROUGH}, /* SDRAM W cache */
24    {0x32000000, 0x32000000,   32,  MMU_CACHE_NONE},     /* SDRAM W/O cache */
25    {0x48000000, 0x48000000,   256, MMU_CACHE_NONE},    /* Internals Regs - */
26    {0x50000000, 0x50000000,   256, MMU_CACHE_NONE},    /* Internal Regs - */
27    {0x00000000, 0x00000000,   0,    0}                /* The end */
28};
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